Toshiba Semiconductor and Storage TC7MPB9326FT(EL)
- Part No.:
- TC7MPB9326FT(EL)
- Manufacturer:
- Toshiba Semiconductor and Storage
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TC7MPB9326FT(EL).pdf
- Description:
- IC BUS SWITCH 2 X 1:2 14TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,580
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TC7MPB9326FT(EL) from Toshiba is a low-voltage, dual SPDT supply bus switch IC designed for bidirectional level-shifting between mismatched voltage domains. It features independent VCCA (1.65–5.0 V) and VCCB (2.3–5.5 V) supplies, 5.0 Ω typical ON-resistance, active-high OE control, and ESD protection (HBM ≥ ±2000 V). It enables signal routing in mixed-voltage SoC interconnects and I²C/SPI level translation.
For engineers reviewing the TC7MPB9326FT(EL) datasheet, TC7MPB9326FT(EL) pinout, TC7MPB9326FT(EL) application, or TC7MPB9326FT(EL) equivalent, key selection criteria include dual-channel SPDT switching, 5.5 V-tolerant OE input, TSSOP14 package compatibility, and verified level-shifting performance across 1.8 V/3.3 V/5.0 V interface combinations.
Technical Context
The TC7MPB9326FT(EL) implements two independent n-channel MOSFET-based SPDT switches with shared select (S) and active-high output enable (OE) inputs. Each channel connects 1A/2A to either 1B1/2B1 or 1B2/2B2 based on S state, enabling multiplexer/demultiplexer operation.
Level translation is achieved via external pull-up resistors-no internal voltage regulation-supporting up-translation (e.g., 1.8 V → 3.3 V) and down-translation (e.g., 3.3 V → 1.8 V) without directionality constraints. Power-down protection isolates channels when OE is low, limiting ICCBA leakage to ≤20 μA at 3.3 V/5.0 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | VCCA = 1.65–5.0 V; VCCB = 2.3–5.5 V - supports interoperability between 1.8 V, 2.5 V, 3.3 V, and 5.0 V logic domains |
| ON-Resistance (typ.) | 5.0 Ω @ VCCA=3.0 V, VCCB=4.5 V - ensures minimal signal attenuation and <100 mV drop at 30 mA per channel |
| Propagation Delay | ≤0.3 ns tpLH / ≤1.2 ns tpHL @ VCCA=3.3 V, VCCB=5.0 V - preserves high-speed digital integrity for ≤100 MHz signals |
| ESD Protection | HBM ≥ ±2000 V, MM ≥ ±200 V - meets industrial-grade robustness requirements without external protection |
| OE Input Tolerance | 5.5 V tolerant - allows direct connection to 5 V control logic even when VCCA is 1.8 V |
| Leakage Current (off) | ±1.0 μA max at all I/O pins - prevents unintended biasing in powered-down subsystems |
Pinout & Package
TSSOP14 package (JEDEC MO-153, 4.4 mm × 5.0 mm × 1.2 mm), 0.65 mm pitch, lead-free and RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4, 5, 6, 7 | 1A, NC, 2A, NC, S, GND, OE | Channel A inputs (1A/2A), shared select (S), ground reference, and active-high output enable - OE must be driven to VCCA for channel activation |
| 8, 9, 10, 11, 12, 13, 14 | VCCA, 1B1, 1B2, 2B1, 2B2, NC, VCCB | VCCA powers control logic; VCCB powers B-side switching; 1B1/1B2/2B1/2B2 are bidirectional switched outputs; NC pins must remain unconnected |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent SPDT switches | Enables simultaneous routing of two separate data paths (e.g., I²C SDA/SCL or dual SPI lines) with shared control |
| Bidirectional level shifting | Supports arbitrary voltage combinations (e.g., 1.8 V ↔ 5.0 V) using only external pull-ups-no direction pin required |
| Power-down isolation | When OE = low, all channels exhibit ≤±1.0 μA leakage and 5.5 V-tolerant OE input remains functional during VCCA/VCCB power sequencing |
| Low capacitance I/O | CI/O = 14 pF (ON), 7 pF (OFF) - minimizes signal distortion and crosstalk in high-frequency bus applications |
Applications
| Mobile SoC Interconnect | I²C Bus Level Translation |
|---|---|
Use Scenario: Connecting a 1.8 V application processor core to a 3.3 V sensor hub or PMIC over shared parallel buses. IC Role / Device Role / Timing Role: Dual SPDT bus switch providing isolated, direction-agnostic signal routing between voltage domains. Use Value: Eliminates need for discrete level translators or complex GPIO-controlled analog switches while maintaining sub-nanosecond timing fidelity. |
Use Scenario: Translating I²C SDA/SCL lines between a 3.3 V microcontroller and 1.8 V EEPROM or temperature sensor. IC Role / Device Role / Timing Role: Bidirectional level shifter with integrated OE control enabling dynamic bus partitioning during firmware updates. Use Value: Supports standard I²C rise/fall times with ≤1.2 ns propagation delay and eliminates external pull-up conflicts across voltage rails. |
| Industrial PLC Backplane | FPGA Configuration Interface |
Use Scenario: Isolating legacy 5.0 V fieldbus peripherals from a 2.5 V FPGA-based controller during hot-swap events. IC Role / Device Role / Timing Role: Voltage-domain firewall with OE-driven channel disable for safe insertion/removal of modules. Use Value: Prevents back-powering of 2.5 V logic through I/O pins during 5.0 V peripheral power-up sequences. |
Use Scenario: Routing configuration bitstreams from a 3.3 V flash memory to multiple 1.8 V FPGA banks with independent enable control. IC Role / Device Role / Timing Role: Dual-channel multiplexer enabling selective programming of FPGA banks without bus contention. Use Value: Reduces PCB layer count by consolidating two independent 1:2 mux functions into one TSSOP14 footprint. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual SPDT bus switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74AVC4T245RGYR | Quad 2-bit translator with auto-direction sensing; no OE pin; higher drive strength (24 mA); 1.65–3.6 V only | Requires no external OE control but lacks independent channel disable; unsuitable for asymmetric VCCB > 3.6 V systems | Prefer TC7MPB9326FT(EL) when 5.0 V B-side support, explicit OE control, or lower ON-resistance (<6 Ω) is required |
| PCA9544APW | 4-channel I²C switch with reset and interrupt; operates only at 2.3–5.5 V; includes addressable control via I²C bus | Designed for multi-drop I²C arbitration-not for general-purpose level-shifting; adds protocol overhead | Choose TC7MPB9326FT(EL) for deterministic, zero-latency analog-level switching without software stack dependency |
Compared with SN74AVC4T245RGYR and PCA9544APW, the TC7MPB9326FT(EL) uniquely delivers 5.5 V-tolerant OE control, sub-6 Ω ON-resistance across 1.8 V–5.0 V domain pairs, and true hardware-isolated dual SPDT operation-critical for mixed-rail SoC interconnects where timing predictability and voltage flexibility outweigh protocol convenience.
Availability
TC7MPB9326FT(EL) is available at Aetrix Electronics and suitable for mobile SoC interconnects, industrial PLC backplanes, and FPGA configuration interfaces requiring stable component supply, long-lifecycle assurance, and RoHS-compliant packaging.
Supply support for TC7MPB9326FT(EL) includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Toshiba Electronic Devices & Storage Corporation designs high-reliability semiconductor solutions for automotive, industrial, and consumer applications, with leadership in power management, logic, and memory technologies.
The TC7MPB9326FT(EL) belongs to Toshiba's TC7MPB series of low-voltage bus switches, engineered specifically for voltage-domain bridging in portable and embedded systems where power efficiency, small footprint, and robust level-shifting are essential.
FAQ
What is the maximum allowable voltage difference between VCCA and VCCB for reliable operation of TC7MPB9326FT(EL)?
The TC7MPB9326FT(EL) supports any combination within its rated ranges: VCCA = 1.65–5.0 V and VCCB = 2.3–5.5 V, with VCCA required to be lower than VCCB. For example, TC7MPB9326FT(EL) operates correctly with VCCA = 1.8 V and VCCB = 5.0 V - a 3.2 V differential - provided absolute maximum ratings (−0.5 V to 7.0 V per supply) are not exceeded. This makes TC7MPB9326FT(EL) suitable for wide-range level translation without external clamping.
Does TC7MPB9326FT(EL) support hot-swapping between powered domains?
Yes - TC7MPB9326FT(EL) provides power-down protection on the OE pin (5.5 V tolerant) and limits off-state leakage to ±1.0 μA per channel. When OE is low, TC7MPB9326FT(EL) isolates A- and B-side nodes even if one supply is active and the other is absent or ramping. This prevents back-driving and latch-up during hot-plug events in modular systems.
Can TC7MPB9326FT(EL) be used for USB 2.0 data line level shifting?
No - TC7MPB9326FT(EL) is not specified for USB 2.0 signaling. Its 14 pF ON-state capacitance and lack of impedance-controlled routing violate USB 2.0 differential pair requirements (90 Ω ±15%). TC7MPB9326FT(EL) targets general-purpose digital buses (I²C, SPI, GPIO, address/data lines) up to ~100 MHz, not high-speed serial protocols requiring strict signal integrity.
What is the recommended pull-up resistor value for level-shifting with TC7MPB9326FT(EL)?
Toshiba recommends 1 kΩ pull-up resistors for optimal level-shifting performance, as validated in Figures 7–10 of the TC7MPB9326FT(EL) datasheet. At 1 kΩ, TC7MPB9326FT(EL) achieves full VOH/VOH transitions within 10% of rail under 30 mA load, balancing speed and power. Values between 470 Ω and 10 kΩ are usable but trade off rise time versus static current.
Is TC7MPB9326FT(EL) pin-compatible with TC7MPB9327FT(EL)?
No - TC7MPB9326FT(EL) and TC7MPB9327FT(EL) share identical pinouts and package (TSSOP14), but differ in OE polarity: TC7MPB9326FT(EL) uses active-high OE, while TC7MPB9327FT(EL) uses active-low OE. Swapping them requires inverting the OE control signal; they are functionally complementary, not drop-in replacements.
TC7MPB9326FT(EL) Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Toshiba Semiconductor and Storage
- Series:
- TC7MP
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Bus Switch
- Circuit:
- 2 x 1:2
- Independent Circuits:
- 1
- Current - Output High, Low:
- -
- Voltage Supply Source:
- Dual Supply
- Voltage - Supply:
- 1.65V ~ 5V, 2.3V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-TSSOP
TC7MPB9326FT(EL) FAQ
1.How can I place an order for TC7MPB9326FT(EL) through Aetrix?
Please submit a Request for Quotation (RFQ) for TC7MPB9326FT(EL) on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC7MPB9326FT(EL) reliable?
The price and inventory of TC7MPB9326FT(EL) are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC7MPB9326FT(EL) is usually 5 days.
3.What payment methods are accepted for TC7MPB9326FT(EL)?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC7MPB9326FT(EL) transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC7MPB9326FT(EL)?
TC7MPB9326FT(EL) orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC7MPB9326FT(EL) order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC7MPB9326FT(EL)?
For technical support, including TC7MPB9326FT(EL) datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC7MPB9326FT(EL) requirements.
6.How does Aetrix verify that TC7MPB9326FT(EL) is sourced from the original manufacturer or authorized distributors?
All TC7MPB9326FT(EL) products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC7MPB9326FT(EL) meets industry standards.
7.What is the process for return or replacement of TC7MPB9326FT(EL)?
All TC7MPB9326FT(EL) units undergo pre-shipment inspection (PSI). If there is an issue with TC7MPB9326FT(EL), returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC7MPB9326FT(EL) part is unused and in its original packaging.
Return procedure for TC7MPB9326FT(EL):
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TC7MPB9326FT(EL) Tags
-
SN74HC138DR
Texas Instruments

-
TC7SB3157CFU,LF(CT
Toshiba Semiconductor and Storage

-
74CBTLV3257PW,118
Nexperia USA Inc.
-
SN74CBTLV3257PWR
Texas Instruments

-
74CBTLV3257GUX
Nexperia USA Inc.

-
74HC154BQ,118
Nexperia USA Inc.

-
P3S0200GMX
NXP USA Inc.

-
SN74CB3Q3245PWR
Texas Instruments
-
SN74CB3Q3257RGYR
Texas Instruments

-
TCA9543APWR
Texas Instruments
-
TCA9546APWR
Texas Instruments

-
SN74HC138N
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
