Toshiba Semiconductor and Storage TCR3DM13,LF(SE
- Part No.:
- TCR3DM13,LF(SE
- Manufacturer:
- Toshiba Semiconductor and Storage
- Package:
- 4-UDFN Exposed Pad
- Datasheet:
-
TCR3DM13,LF(SE.pdf
- Description:
- LDO REG IOUT: 300MA VIN: 6V VOUT
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TCR3DM13,LF(SE) from Toshiba Electronic Devices & Storage Corporation is a 1.3 V fixed-output CMOS low-dropout regulator with inrush current protection, delivering up to 300 mA output current, 450 mV typical dropout at full load, and 38 μVrms output noise. It serves as a primary power supply for core logic rails in space-constrained portable electronics.
For engineers reviewing the TCR3DM13,LF(SE) datasheet, TCR3DM13,LF(SE) pinout, TCR3DM13,LF(SE) application, or TCR3DM13,LF(SE) equivalent, key selection criteria include ultra-small DFN4E (1.0 mm × 1.0 mm) footprint compatibility, guaranteed 1.3 V ±18 mV output accuracy at 50 mA, fast load transient response (±80 mV), and integrated auto-discharge functionality for system-level power sequencing.
Technical Context
The TCR3DM13,LF(SE) employs a CMOS pass transistor architecture enabling low quiescent current (65 μA typ. at 1.3 V output) and stable operation with ceramic input/output capacitors (1.0 μF each). Its on/off control input accepts 0–0.4 V for shutdown and 1.0–5.5 V for enable, with internal pull-down ensuring default-off behavior.
It integrates four protection mechanisms: over-current protection, over-temperature shutdown, inrush current limiting at startup, and auto-discharge via internal FET when disabled-ensuring safe power cycling without external discharge circuitry. Dropout voltage is specified at 450 mV (typ.) under 300 mA load for the 1.3 V variant, scaling inversely with output voltage across the series.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.3 V ±18 mV (at IOUT = 50 mA), enabling precise biasing of 1.3 V logic cores without external feedback. |
| Max Output Current | 300 mA continuous, supporting moderate-power microcontrollers, sensors, or RF front-end ICs in compact designs. |
| Dropout Voltage | 450 mV (typ.) at 300 mA, allowing operation from 1.75 V input-critical for single-cell Li-ion or Li-poly battery systems. |
| Output Noise | 38 μVrms (10 Hz–100 kHz), minimizing noise coupling into sensitive analog or RF sections powered from same rail. |
| Load Transient Response | ±80 mV deviation (1 mA ↔ 300 mA step, COUT = 1.0 μF), maintaining stable voltage during processor wake/sleep transitions. |
| Ripple Rejection | 70 dB (typ., 1 kHz), suppressing switching noise from upstream DC/DC converters feeding the LDO input. |
| Quiescent Current | 65 μA (typ. at 1.3 V output, IOUT = 0 mA), extending battery life in always-on sensor nodes or standby modes. |
| Standby Current | 0.1 μA (typ. at VCT = 0 V), enabling ultra-low-power system-level shutdown with negligible leakage. |
Pinout & Package
TCR3DM13,LF(SE) is housed in an ultra-compact DFN4E package (1.0 mm × 1.0 mm, 0.58 mm height, 1.3 mg weight) with wettable flank side walls for automated optical inspection. The exposed center pad must be connected to GND for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN | Input power supply connection | Accepts 1.75–5.5 V input; requires 1.0 μF ceramic capacitor placed adjacent to minimize high-frequency impedance. |
| VOUT | Regulated output voltage node | Delivers stable 1.3 V; connects directly to load; 1.0 μF ceramic capacitor mandatory for stability and transient performance. |
| GND | Ground reference and thermal path | Common return for input/output circuits; center pad must be soldered to PCB GND plane for thermal dissipation and noise reduction. |
| CONTROL | Enable/disable logic input | Active-high control: <0.4 V = OFF (auto-discharge enabled), ≥1.0 V = ON; internal pull-down ensures safe default-off state. |
Key Features
| Feature | Design Value |
|---|---|
| Inrush current protection | Prevents input voltage sag and system reset during cold-start by limiting initial charge current into output capacitor. |
| Auto-discharge function | Internally discharges VOUT to GND within milliseconds after CONTROL goes low-eliminates need for external bleed resistor. |
| Ceramic capacitor compatibility | Stable with 1.0 μF X5R/X7R ceramics on both input and output-reducing board area and cost vs. tantalum or electrolytic alternatives. |
| Low temperature coefficient | 75 ppm/°C output drift over −40°C to +85°C-ensures consistent voltage margin for temperature-sensitive logic interfaces. |
| Over-temperature shutdown | Thermal protection activates at ~150°C junction temperature, latching off until cooldown-preventing permanent damage under overload. |
| Over-current protection | Current-limiting engages at ~400 mA (typ.), sustaining regulated output during short-term overload without latch-off. |
Applications
| Wearable Sensor Node | Bluetooth LE Module Power |
|---|---|
|
Use Scenario: Compact wearable device with accelerometer, gyroscope, and BLE radio operating from single 3.0 V coin cell or Li-poly battery. IC Role / Device Role / Timing Role: Primary 1.3 V supply for digital baseband and sensor interface logic, sequenced via CONTROL pin during sleep/wake cycles. Use Value: Ultra-low 65 μA quiescent current extends battery life beyond 12 months; auto-discharge prevents residual voltage from blocking MCU reset. |
Use Scenario: Low-power Bluetooth 5.0 module requiring clean, tightly regulated 1.3 V for RF synthesizer and digital core. IC Role / Device Role / Timing Role: Post-regulator for RF section, decoupling noise from shared 3.3 V system rail generated by buck converter. Use Value: 38 μVrms output noise and 70 dB ripple rejection suppress phase noise in local oscillator paths, improving BLE sensitivity by ≥2 dB. |
| Smart Card Reader IC | Industrial IoT Edge Node |
|
Use Scenario: Contactless smart card reader powered from USB 5 V, requiring isolated 1.3 V rail for secure element communication. IC Role / Device Role / Timing Role: Dedicated LDO for ISO/IEC 14443-A/B interface logic, controlled via microcontroller GPIO for power gating. Use Value: Inrush protection prevents USB port brown-out during card insertion; 1.3 V ±18 mV accuracy meets EMVCo timing margin requirements. |
Use Scenario: DIN-rail mounted industrial sensor node with wide ambient temperature range (−40°C to +85°C) and long service life. IC Role / Device Role / Timing Role: Main 1.3 V supply for ARM Cortex-M0+ MCU and analog front-end, operating continuously from 24 V DC-DC intermediate bus. Use Value: 75 ppm/°C tempco and −40°C to +85°C rating ensure stable timing margins across factory environments; DFN4E footprint enables conformal coating compatibility. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar low-noise, ultra-small LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R1190H131B-TR-FE | 1.3 V output, 300 mA, 250 mV dropout (typ.), but no inrush protection or auto-discharge; SOT-23-5 package (2.9 mm × 2.8 mm). | Larger footprint; lacks integrated power sequencing features-requires external discharge circuit and soft-start design. | Choose only if board space permits larger package and system-level control handles sequencing. |
| MCP1703T-1302E/MB | 1.3 V output, 250 mA, 600 mV dropout (typ.), no inrush protection; SOT-23-5 package; higher 125 μA quiescent current. | Lower max current and higher dropout limit use to lower-power peripherals; no auto-discharge necessitates external FET for rapid discharge. | Select when cost is prioritized over size and sequencing simplicity, and load current remains ≤250 mA. |
Compared with R1190H131B-TR-FE and MCP1703T-1302E/MB, TCR3DM13,LF(SE) delivers superior integration in half the footprint-enabling direct replacement in space-critical designs where inrush control and automatic discharge reduce BOM count and firmware complexity.
Availability
TCR3DM13,LF(SE) is available at Aetrix Electronics and suitable for wearable electronics, BLE modules, smart card readers, and industrial IoT edge nodes requiring stable component supply, long-lifecycle support, and RoHS-compliant packaging.
Supply support for TCR3DM13,LF(SE) includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Toshiba Electronic Devices & Storage Corporation designs high-reliability semiconductor solutions for consumer, industrial, and automotive markets, with expertise in analog, power, and logic ICs.
The TCR3DM series targets portable and battery-powered applications demanding ultra-small size, low noise, and intelligent power management-delivering integrated LDO functionality in sub-1 mm² packages without external components.
FAQ
What is the maximum input voltage rating for TCR3DM13,LF(SE)?
The absolute maximum input voltage for TCR3DM13,LF(SE) is 6.0 V. However, the recommended operating range is 1.75 V to 5.5 V per electrical characteristics testing conditions. Exceeding 5.5 V may trigger over-voltage stress not covered by standard reliability testing, and sustained operation above this level risks accelerated degradation even if within absolute maximum ratings.
Does TCR3DM13,LF(SE) require an external discharge resistor?
No, TCR3DM13,LF(SE) includes an integrated auto-discharge function activated when the CONTROL pin is pulled low. This internal circuit rapidly discharges the output capacitor to GND without external components-reducing BOM count and eliminating timing uncertainty associated with discrete resistor values.
Can TCR3DM13,LF(SE) operate with a 1.0 μF ceramic capacitor on both input and output?
Yes, TCR3DM13,LF(SE) is fully stable with 1.0 μF X5R or X7R ceramic capacitors on VIN and VOUT, as validated in the datasheet's application note and electrical characteristics tables. Toshiba specifies ESR <10 Ω for optimal transient response and phase margin, which standard 1.0 μF 0402/0603 ceramics meet.
What is the typical dropout voltage of TCR3DM13,LF(SE) at full 300 mA load?
The typical dropout voltage of TCR3DM13,LF(SE) is 450 mV at 300 mA output current and 25°C junction temperature. This value is confirmed in the "Dropout voltage" table on page 4 of the datasheet for 1.3 V output variants, with a maximum of 550 mV across process and temperature extremes.
Is the center thermal pad of the DFN4E package required to be connected to GND?
Yes, the center electrode (exposed pad) of the TCR3DM13,LF(SE) DFN4E package must be connected to GND. This connection provides critical thermal conduction to the PCB and establishes low-impedance ground return for noise suppression. Leaving it unconnected or floating degrades thermal performance and may cause instability or premature thermal shutdown.
TCR3DM13,LF(SE Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Toshiba Semiconductor and Storage
- Series:
- -
- Package/Case:
- 4-UDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.55V @ 300mA
- Current - Output:
- 300mA
- Current - Quiescent (Iq):
- -
- Current - Supply (Max):
- -
- PSRR:
- -
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 4-DFN (1x1)
TCR3DM13,LF(SE FAQ
1.How can I place an order for TCR3DM13,LF(SE through Aetrix?
Please submit a Request for Quotation (RFQ) for TCR3DM13,LF(SE on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TCR3DM13,LF(SE reliable?
The price and inventory of TCR3DM13,LF(SE are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TCR3DM13,LF(SE is usually 5 days.
3.What payment methods are accepted for TCR3DM13,LF(SE?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TCR3DM13,LF(SE transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TCR3DM13,LF(SE?
TCR3DM13,LF(SE orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TCR3DM13,LF(SE order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TCR3DM13,LF(SE?
For technical support, including TCR3DM13,LF(SE datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TCR3DM13,LF(SE requirements.
6.How does Aetrix verify that TCR3DM13,LF(SE is sourced from the original manufacturer or authorized distributors?
All TCR3DM13,LF(SE products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TCR3DM13,LF(SE meets industry standards.
7.What is the process for return or replacement of TCR3DM13,LF(SE?
All TCR3DM13,LF(SE units undergo pre-shipment inspection (PSI). If there is an issue with TCR3DM13,LF(SE, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TCR3DM13,LF(SE part is unused and in its original packaging.
Return procedure for TCR3DM13,LF(SE:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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