NXP Semiconductors TDA19988BHN/C1,518
- Part No.:
- TDA19988BHN/C1,518
- Manufacturer:
- NXP Semiconductors
- Category:
- Video Processing
- Package:
- 64-VFQFN Dual Rows, Exposed Pad
- Datasheet:
-
TDA19988BHN/C1,518.pdf
- Description:
- IC VIDEO HDMI TRANS 64HVQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TDA19988BHN/C1,518 from NXP Semiconductors is an HDMI 1.4a transmitter IC designed for mobile and STB applications requiring low power (55 mW at 720p/24 Hz) and compact size (HVQFN64, 9 mm × 9 mm). It supports 3 × 8-bit RGB/YCbCr video input up to 165 MHz pixel rate, S/PDIF or I²S audio up to 192 kHz, xvYCC color space, CEC control, and programmable input formatting with ITU-R BT.656 compatibility.
For engineers reviewing the TDA19988BHN/C1,518 datasheet, TDA19988BHN/C1,518 pinout, TDA19988BHN/C1,518 application, or TDA19988BHN/C1,518 equivalent, key selection considerations include its HDCP-free status (vs. AHN/AET variants), HVQFN64 package footprint, TMDS output swing adjustability via EXT_SWING, and dual-edge ITU656 clock support for legacy video digitizers.
Technical Context
The TDA19988BHN/C1,518 integrates a programmable video input formatter supporting RGB 4:4:4, YCbCr 4:4:4, YCbCr 4:2:2 semi-planar (up to 2×12-bit), and ITU-R BT.656 (up to 1×12-bit) with selectable single/dual-edge pixel clock sampling. Its internal color space converter enables RGB↔YCbCr conversion and supports embedded sync or external HSYNC/VSYNC/DE timing.
It features a dedicated PLL-based serializer generating TMDS clock at ≥10× pixel rate, HDMI packet insertion for infoframes and ACR, and a master I²C interface for DDC-bus EDID readout. The device lacks HDCP cipher logic (confirmed by ordering table: "without HDCP"), distinguishing it from TDA19988AHN/C1 and TDA19988AET/C1 variants.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| HDMI Version | HDMI 1.4a compliant; supports xvYCC, 3D frame packing/side-by-side/top-and-bottom, and CEC protocol. |
| Video Input Rate | Up to 165 MHz pixel clock; enables 1080p60 (TV), UXGA60 (1600×1200), and 720p/1080i50/60 in ITU656 mode. |
| Audio Interface | Supports 4×I²S or 1×S/PDIF; audio sampling up to 192 kHz - sufficient for high-resolution stereo and multichannel streams. |
| Power Consumption | 55 mW typical in 720p/24 Hz operation; 18 µW in standby - critical for battery-powered DVC/DSC/MID designs. |
| Package | HVQFN64 (SOT804-4); 9 mm × 9 mm × 0.85 mm body with exposed die pad - optimized for thermal dissipation in space-constrained layouts. |
| HDCP Support | No HDCP logic integrated; explicitly designated "without HDCP" per ordering table - eliminates licensing overhead for non-DRM applications. |
| Supply Voltages | 1.8 V only: VDDA(TMDS), VDDD(IO), VDDA(PLL), VDDA, VDDDC - simplifies power rail design with single LDO requirement. |
Pinout & Package
HVQFN64 package (SOT804-4), 9 mm × 9 mm × 0.85 mm body with exposed die pad connected to ground. Pin 1 index located at top-left corner of top view.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VPA[0]–VPA[7] | Video port A data inputs | Accept LSB-to-MSB bits of first 8-bit video channel (e.g., B in RGB, Cb in YCbCr); configurable via I²C swap/mirror registers. |
| VPB[0]–VPB[7] | Video port B data inputs | Accept second 8-bit channel (e.g., G in RGB, Y in YCbCr); supports ITU656 Y0/Y1 interleaving when paired with VPB[0–7]. |
| VPC[0]–VPC[7] | Video port C data inputs | Accept third 8-bit channel (e.g., R in RGB, Cr in YCbCr); enables full 24-bit parallel RGB or YCbCr 4:4:4 capture. |
| TX0+/TX0− to TXC+/TXC− | TMDS differential outputs | Four differential pairs (3 data + 1 clock) compliant with HDMI 1.4a electrical specs; output swing adjustable via EXT_SWING resistor. |
| CEC | Consumer Electronics Control I/O | Open-drain bidirectional bus for remote command relay (e.g., Standby); eliminates discrete CEC transceiver and reduces BOM count. |
| INT | Interrupt output / calibration input | Dual-function pin: open-drain interrupt for HDMI/CEC events in operation mode; accepts 10 ms ±1% calibration pulse in calibration mode. |
| HPD | Hot Plug Detect input | 5 V tolerant; monitors HDMI sink connection status to trigger reinitialization or power-state transitions. |
| DSDA/DSCL | DDC-bus interface | I²C-compatible master interface (5 V tolerant) for reading EDID from display - required for automatic resolution/format negotiation. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable input formatter | Maps 3×8-bit parallel ports to RGB/YCbCr/ITU656 formats via I²C-configurable SWAP/MIRR registers - eliminates external format translation logic. |
| ITU656 dual-edge sampling | Enables 74.25 MHz pixel clock support in ITU656 mode using both rising and falling edges - matches SMPTE293M 1080p timing without external clock doubling. |
| Low-power standby mode | 18 µW consumption halts TMDS transmission and PLL while preserving register state - extends battery life in portable devices during display idle periods. |
| CEC protocol integration | Hardware-accelerated CEC message handling reduces MCU firmware load and ensures timing-compliant command transmission over shared home network bus. |
| LV-CMOS I/O compatibility | 1.8 V core logic with 3.3 V tolerance on DDC/HPD pins - interfaces directly with common SoC GPIOs without level shifters. |
Applications
| Digital Video Camera (DVC) | Set-Top Box (STB) |
|---|---|
Use Scenario: High-resolution video capture and HDMI output from compact DVC units with limited PCB area and battery capacity. IC Role / Device Role / Timing Role: HDMI transmitter converting parallel YCbCr 4:2:2 sensor output to serialized TMDS stream; manages EDID handshake and CEC remote passthrough. Use Value: Enables 1080p60 recording playback via HDMI with <55 mW active power - extends recording time per charge and fits sub-20 mm module height. | Use Scenario: HDMI output stage in cost-sensitive STBs where HDCP is not required (e.g., analog-only content distribution). IC Role / Device Role / Timing Role: Format-agnostic video serializer accepting RGB/YCbCr from video processor; provides HPD monitoring and DDC-based EDID read for auto-configuration. Use Value: Replaces legacy TDA9981 with higher pixel rate (165 MHz vs. 150 MHz) and lower power - reduces thermal load in fanless enclosures. |
| Portable Multimedia Player (PMP) | Ultra-Mobile PC (UMPC) |
Use Scenario: HDMI mirroring from PMP SoC to external displays while maintaining >8-hour battery life. IC Role / Device Role / Timing Role: Low-latency video/audio multiplexer and serializer; handles I²S audio injection and xvYCC color metadata embedding. Use Value: 18 µW standby mode cuts background power during screen-off states; 9 mm × 9 mm HVQFN64 footprint allows placement under display flex cable. | Use Scenario: Compact HDMI output for UMPCs targeting 1080p60 desktop extension with minimal board space. IC Role / Device Role / Timing Role: Parallel-to-TMDS bridge with programmable input formatter - adapts varying SoC video bus configurations (RGB vs. YCbCr) without redesign. Use Value: Eliminates need for external video format converters; supports dual-edge ITU656 sampling to interface legacy video digitizers at 74.25 MHz. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar HDMI transmitter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TDA19988AHN/C1 | Includes HDCP 1.4 cipher block and OTP key storage; identical pinout and electrical specs otherwise. | Required for DRM-protected content distribution (e.g., Blu-ray playback, streaming services). | Select TDA19988AHN/C1 only if HDCP compliance is mandated by content providers or platform certification. |
| TLK10024RGZR | TI 24-bit LVDS-to-HDMI serializer; no built-in video formatter, CEC, or DDC master; requires external FPGA/ASIC for format conversion. | Suitable for LVDS-source systems (e.g., automotive displays) but adds system-level complexity for parallel video sources. | Choose TLK10024RGZR only when migrating from LVDS interfaces and external video processing is already present. |
Compared with TDA19988AHN/C1, TDA19988BHN/C1,518 removes HDCP logic to reduce cost and eliminate licensing, while retaining identical video/audio formatting, CEC, and power management. Versus TLK10024RGZR, it integrates full input formatting and DDC/CEC functions - reducing BOM count and firmware effort in consumer electronics.
Availability
TDA19988BHN/C1,518 is available at Aetrix Electronics and suitable for Digital Video Camera (DVC), Set-Top Box (STB), and Portable Multimedia Player (PMP) applications requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for TDA19988BHN/C1,518 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer markets.
The TDA19988 product line targets mobile and STB HDMI output applications, emphasizing ultra-low power, small footprint, and integrated CEC/DDC functionality to simplify system design and reduce bill-of-materials cost.
FAQ
Does TDA19988BHN/C1,518 support HDCP encryption?
No, TDA19988BHN/C1,518 does not include HDCP logic. Per the official ordering information table, this variant is explicitly labeled "without HDCP". For HDCP 1.4 compliance, select TDA19988AHN/C1 or TDA19988AET/C1. The TDA19988BHN/C1,518 retains all other HDMI 1.4a features including xvYCC, 3D, and CEC.
What is the maximum pixel clock rate supported by TDA19988BHN/C1,518?
The TDA19988BHN/C1,518 supports a maximum pixel clock rate of 165 MHz, enabling full 1080p60 (1920×1080 @ 60 Hz) video transmission. This specification is confirmed across multiple sections of the datasheet, including General Description and Table 7, and applies to RGB 4:4:4 and YCbCr 4:4:4 input formats.
Can TDA19988BHN/C1,518 interface with ITU-R BT.656 video sources?
Yes, TDA19988BHN/C1,518 supports ITU-R BT.656-like formats with up to 1×12-bit data depth and dual-edge pixel clock sampling (up to 74.25 MHz). This capability is documented in Section 7.2.3.3–7.2.3.6 and Table 7, allowing direct connection to broadcast-grade video digitizers without external clock domain conversion.
What package type is used for TDA19988BHN/C1,518?
TDA19988BHN/C1,518 uses the HVQFN64 package (SOT804-4), measuring 9 mm × 9 mm × 0.85 mm with an exposed die pad. This thermal-enhanced quad flat no-lead package is specified in Table 1 of the datasheet and differs from the TFBGA64 option used by TDA19988AET/C1.
How does the EXT_SWING pin function on TDA19988BHN/C1,518?
The EXT_SWING pin on TDA19988BHN/C1,518 adjusts TMDS output voltage swing by connecting a 10 kΩ ±1% resistor to analog ground. This external tuning enables precise compliance with HDMI 1.4a differential amplitude specifications (±100 mV to ±300 mV) across varying PCB trace impedances and connector losses.
TDA19988BHN/C1,518 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 64-VFQFN Dual Rows, Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Function:
- Transmitter
- Applications:
- Consumer Video
- Standards:
- HDMI 1.4a, ITU656
- Control Interface:
- I2S
- Voltage - Supply:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 64-HVQFN (9x9)
TDA19988BHN/C1,518 FAQ
1.How can I place an order for TDA19988BHN/C1,518 through Aetrix?
Please submit a Request for Quotation (RFQ) for TDA19988BHN/C1,518 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TDA19988BHN/C1,518 reliable?
The price and inventory of TDA19988BHN/C1,518 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TDA19988BHN/C1,518 is usually 5 days.
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TDA19988BHN/C1,518 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TDA19988BHN/C1,518 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TDA19988BHN/C1,518?
For technical support, including TDA19988BHN/C1,518 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TDA19988BHN/C1,518 requirements.
6.How does Aetrix verify that TDA19988BHN/C1,518 is sourced from the original manufacturer or authorized distributors?
All TDA19988BHN/C1,518 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TDA19988BHN/C1,518 meets industry standards.
7.What is the process for return or replacement of TDA19988BHN/C1,518?
All TDA19988BHN/C1,518 units undergo pre-shipment inspection (PSI). If there is an issue with TDA19988BHN/C1,518, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TDA19988BHN/C1,518 part is unused and in its original packaging.
Return procedure for TDA19988BHN/C1,518:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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