NXP Semiconductors TDA19988BHN/C1,551
- Part No.:
- TDA19988BHN/C1,551
- Manufacturer:
- NXP Semiconductors
- Category:
- Video Processing
- Package:
- 64-VFQFN Dual Rows, Exposed Pad
- Datasheet:
-
TDA19988BHN/C1,551.pdf
- Description:
- IC VIDEO HDMI TRANS 64HVQFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,343
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Product details
Overview
TDA19988BHN/C1,551 from NXP Semiconductors is an HDMI 1.4a transmitter IC designed for mobile and STB applications, supporting 3×8-bit RGB/YCbCr video input at up to 165 MHz pixel rate, S/PDIF or I²S audio up to 192 kHz, CEC control, and low-power standby mode (18 µW typical). It targets battery-powered devices including digital cameras, portable media players, tablets, and set-top boxes.
For engineers reviewing the TDA19988BHN/C1,551 datasheet, TDA19988BHN/C1,551 pinout, TDA19988BHN/C1,551 application, or TDA19988BHN/C1,551 equivalent, this page delivers verified functional context, HVQFN64 package mapping, TMDS output configuration, HDCP exclusion confirmation, and real-world integration guidance for HDMI interface design in space- and power-constrained systems.
Technical Context
The TDA19988BHN/C1,551 integrates a programmable video input formatter with support for RGB 4:4:4, YCbCr 4:4:4, YCbCr 4:2:2 semi-planar (up to 2×12-bit), and ITU-R BT.656-like formats - all configurable via I²C registers. Its internal color space converter enables bidirectional RGB↔YCbCr conversion and supports double-edge sampling for ITU656 inputs.
It embeds a PLL-based serializer generating TMDS clock rates from 250 MHz to 1.5 GHz, HDMI packet insertion logic for infoframes and ACR, and a dedicated CEC transceiver with open-drain I/O. Unlike TDA19988AHN/AET variants, this part omits HDCP 1.4 cipher and OTP key storage, confirmed by ordering information and feature tables.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| HDMI Version | HDMI 1.4a compliant; supports xvYCC, 3D frame packing/side-by-side/top-and-bottom, and CEC protocol per HDMI spec. |
| Video Input Rate | Up to 165 MHz pixel clock; enables 1080p60 (TV), UXGA60 (1600×1200), and 720p/1080i50/60 in ITU656 format. |
| Audio Interface | Supports four I²S lanes or one S/PDIF lane; audio sampling rate up to 192 kHz, synchronized to video timing. |
| Power Consumption | 18 µW typical in Standby mode; 55 mW at 720p24 operation; optimized for battery autonomy in portable devices. |
| Supply Voltages | 1.8 V only: VDDA(TMDS), VDDD(IO), VDDA(PLL), VDDA, and VDDDC - all require regulated 1.8 V supplies. |
| HDCP Support | No HDCP functionality; explicitly excluded per ordering table (TDA19988BHN/C1 = "without HDCP"); no cipher block or OTP memory. |
| TMDS Output | Four differential channels (TX0±, TX1±, TX2±, TXC±) compliant with HDMI electrical specifications; swing adjustable via EXT_SWING pin. |
Pinout & Package
HVQFN64 package (SOT804-4), 9 mm × 9 mm × 0.85 mm body, exposed die pad connected to ground.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VPA[0]–VPA[7] | Video port A input (LSB to MSB) | Accepts 8-bit video data (e.g., R[7:0], Y[7:0], or Cb[7:0]) depending on configured input format and SWAP register settings. |
| VPB[0]–VPB[7] | Video port B input (LSB to MSB) | Accepts second 8-bit video stream (e.g., G[7:0], Y[7:0], or Cr[7:0]); supports 12-bit ITU656 via dual-sample alignment. |
| VPC[0]–VPC[7] | Video port C input (LSB to MSB) | Accepts third 8-bit video stream (e.g., B[7:0], Y[7:0], or Cb[7:0]); used with VPB for YCbCr 4:2:2 semi-planar input. |
| TX0±, TX1±, TX2±, TXC± | TMDS differential outputs | Drive HDMI sink with serialized video/audio/data island packets; require 100 Ω differential PCB routing and proper termination. |
| CEC | CEC bus I/O (open-drain) | Connects directly to HDMI connector's CEC line; requires external 27 kΩ pull-up to 3.3 V per HDMI spec. |
| HPD | Hot Plug Detect input | 5 V tolerant; monitors HDMI sink presence; asserts interrupt when sink connects/disconnects. |
| EXT_SWING | TMDS output swing adjustment | Requires 10 kΩ ±1 % resistor to analog ground to set output amplitude per HDMI compliance requirements. |
| I²C-bus (CSCL/CSDA) | Configuration interface | 1.8 V–3.3 V tolerant; used to program video format, color space, CEC, HPD behavior, and power modes. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable input formatter | Maps three independent 8-bit video ports (VPA/VBP/VPC) to internal 24-bit bus via configurable SWAP/MIRR registers for RGB/YCbCr/ITU656 alignment. |
| CEC protocol engine | Integrated bidirectional CEC transceiver eliminates need for external level-shifter or controller; enables single-remote control of connected HDMI devices. |
| Flexible synchronization | Supports external DE/HSYNC/VSYNC or embedded timing (VREF/HREF/FREF); ITU656 mode allows selectable single/dual-edge pixel clock sampling. |
| Low-power architecture | Dedicated Standby (18 µW) and Sleep modes reduce system power when HDMI link is inactive - critical for mobile battery life. |
| Multi-format color space conversion | Bidirectional RGB ↔ YCbCr conversion with programmable coefficients; bypassable to reduce latency in fixed-format pipelines. |
Applications
| Digital Video Camera (DVC) | Set-Top Box (STB) |
|---|---|
Use Scenario: Transmitting high-resolution video from CMOS image sensor to HDMI display during recording or live preview. IC Role / Device Role / Timing Role: HDMI transmitter converting parallel RGB/YCbCr sensor output into serialized TMDS stream with embedded audio and CEC control. Use Value: Enables compact 1080p60 HDMI output using only 1.8 V supplies and minimal board area (HVQFN64), while supporting CEC for remote-triggered recording start/stop. |
Use Scenario: Delivering decoded video/audio from MPEG-4/H.264 decoder to TV via HDMI with consumer electronics control. IC Role / Device Role / Timing Role: Final-stage HDMI interface IC handling pixel formatting, audio multiplexing, EDID read via DDC, and CEC command relay. Use Value: Replaces legacy TDA9981 with higher pixel rate (165 MHz vs. 150 MHz), lower power, and native CEC - reducing BOM count and enabling unified remote control. |
| Portable Media Player (PMP) | Tablet/MID |
Use Scenario: Driving HDMI output from application processor's parallel video interface to external monitor or projector. IC Role / Device Role / Timing Role: Format-agnostic video bridge accepting RGB/YCbCr from SoC and generating HDMI-compliant TMDS with audio embedding. Use Value: Supports 720p60 playback with <55 mW active power, extending battery runtime; programmable input mapping accommodates varied SoC video port layouts. |
Use Scenario: Adding HDMI output capability to ARM-based tablet platforms where space and thermal envelope are constrained. IC Role / Device Role / Timing Role: Low-profile HDMI transmitter interfacing with GPU's LV-CMOS video bus and providing hot-plug detection, EDID management, and CEC. Use Value: 9×9 mm HVQFN64 footprint fits tight layout constraints; 1.8 V-only supply simplifies PMIC design; CEC integration avoids discrete transceiver. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar HDMI transmitter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TDA19988AHN/C1 | Includes HDCP 1.4 cipher block and internal OTP key storage; identical pinout and core functionality. | Required for content-protected HDMI sources (e.g., Blu-ray players, premium STBs); not suitable for non-HDCP use cases due to licensing overhead. | Select TDA19988AHN/C1 only when HDCP compliance is mandated by content providers or platform requirements. |
| Si2177-A30 | Single-chip tuner + demodulator + HDMI transmitter; supports DVB-T2/C/S2 but lacks CEC and programmable video formatter. | Targeted at broadcast receiver front-ends; not a drop-in replacement - requires redesign of video path and removal of separate tuner stage. | Choose Si2177-A30 only for integrated broadcast-to-HDMI designs; TDA19988BHN/C1,551 remains optimal for baseband video source interfacing. |
Compared with TDA19988AHN/C1, the TDA19988BHN/C1,551 removes HDCP complexity and cost for non-protected applications, while matching all video/audio/CEC performance specs; versus Si2177-A30, it provides superior flexibility for generic parallel video sources but requires external video processing upstream.
Availability
TDA19988BHN/C1,551 is available at Aetrix Electronics and suitable for digital video camera, set-top box, and portable media player applications requiring stable component supply, long-term industrial availability, and RoHS-compliant packaging.
Supply support for TDA19988BHN/C1,551 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer electronics.
The TDA19988 series belongs to NXP's HDMI interface product line, engineered specifically for ultra-low-power, small-form-factor HDMI transmission in mobile and embedded video systems - emphasizing integration, power efficiency, and CEC-enabled ecosystem control.
FAQ
Does TDA19988BHN/C1,551 support HDCP encryption?
No, TDA19988BHN/C1,551 does not include HDCP functionality. Per NXP's official ordering information, the "BHN" suffix explicitly denotes "without HDCP", and the device lacks both the HDCP 1.4 cipher block and internal OTP key memory present in TDA19988AHN/AET variants. This makes TDA19988BHN/C1,551 suitable for non-content-protected HDMI applications such as industrial displays, medical monitors, or developer evaluation platforms where HDCP licensing is unnecessary.
What video input formats does TDA19988BHN/C1,551 accept?
TDA19988BHN/C1,551 accepts RGB 4:4:4 (3×8-bit), YCbCr 4:4:4 (3×8-bit), YCbCr 4:2:2 semi-planar (up to 2×12-bit), and YCbCr 4:2:2 ITU-R BT.656-like formats. Input mapping is fully programmable via I²C registers (VIP_CNTRL_0/1/2), allowing flexible assignment of VPA/VBP/VPC pins to R/G/B, Y/Cb/Cr, or time-multiplexed Y/CbCr streams - validated across all supported pixel clocks up to 165 MHz.
How is CEC implemented on TDA19988BHN/C1,551?
TDA19988BHN/C1,551 integrates a hardware CEC transceiver on the CEC pin (pin 30 in HVQFN64), operating as an open-drain I/O compliant with HDMI 1.4a CEC specification. It handles physical layer signaling, message framing, arbitration, and error detection without host CPU intervention. External 27 kΩ pull-up to 3.3 V is required, and CEC commands (e.g., Standby, Routing Control) are processed autonomously, reducing firmware overhead and enabling true one-remote control of connected HDMI devices.
What power supply requirements must be met for TDA19988BHN/C1,551?
TDA19988BHN/C1,551 requires five dedicated 1.8 V supplies: VDDA(TMDS), VDDD(IO), VDDA(PLL), VDDA, and VDDDC - each with local decoupling (100 nF + 1 µF). All I/Os (video ports, I²C, CEC, HPD) are 1.8 V LV-CMOS compatible and 3.3 V tolerant. No 3.3 V or 5 V supplies are needed. The 18 µW Standby current draws exclusively from VDDA(PLL) and VDDD(IO), enabling ultra-low quiescent power in always-on monitoring scenarios.
Is TDA19988BHN/C1,551 pin-compatible with other TDA19988 variants?
Yes, TDA19988BHN/C1,551 shares identical HVQFN64 pinout (SOT804-4) and ball/pad mapping with TDA19988AHN/C1, TDA19988AET/C1, and TDA19988BET/C1. All variants use the same mechanical footprint, thermal pad connection, and signal assignments - enabling direct PCB reuse across HDCP-enabled and HDCP-free designs. Functional differences (e.g., HDCP presence, oscillator configuration) are software-configurable or determined by internal mask options, not pinout.
TDA19988BHN/C1,551 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 64-VFQFN Dual Rows, Exposed Pad
- Packaging:
- Tray
- Product Status:
- Obsolete
- Function:
- Transmitter
- Applications:
- Consumer Video
- Standards:
- HDMI 1.4a, ITU656
- Control Interface:
- I2S
- Voltage - Supply:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 64-HVQFN (9x9)
TDA19988BHN/C1,551 FAQ
1.How can I place an order for TDA19988BHN/C1,551 through Aetrix?
Please submit a Request for Quotation (RFQ) for TDA19988BHN/C1,551 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TDA19988BHN/C1,551 reliable?
The price and inventory of TDA19988BHN/C1,551 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TDA19988BHN/C1,551 is usually 5 days.
3.What payment methods are accepted for TDA19988BHN/C1,551?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TDA19988BHN/C1,551 transactions.
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4.How is shipping managed for TDA19988BHN/C1,551?
TDA19988BHN/C1,551 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TDA19988BHN/C1,551 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TDA19988BHN/C1,551?
For technical support, including TDA19988BHN/C1,551 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TDA19988BHN/C1,551 requirements.
6.How does Aetrix verify that TDA19988BHN/C1,551 is sourced from the original manufacturer or authorized distributors?
All TDA19988BHN/C1,551 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TDA19988BHN/C1,551 meets industry standards.
7.What is the process for return or replacement of TDA19988BHN/C1,551?
All TDA19988BHN/C1,551 units undergo pre-shipment inspection (PSI). If there is an issue with TDA19988BHN/C1,551, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TDA19988BHN/C1,551 part is unused and in its original packaging.
Return procedure for TDA19988BHN/C1,551:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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