Infineon Technologies TDA38840AUMA1
- Part No.:
- TDA38840AUMA1
- Manufacturer:
- Infineon Technologies
- Package:
- 36-PowerVFQFN
- Datasheet:
-
TDA38840AUMA1.pdf
- Description:
- IC REG BUCK ADJ 40A IQFN-36
- Quantity:
- Payment:

- Shipping:

Inventory:5,610
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Product details
Overview
TDA38840AUMA1 from Infineon is a fully integrated 40 A synchronous Buck regulator with OptiMOS™ power stages, operating from 4.3 V to 17 V (or 2.0 V–17 V with external VCC), featuring 0.6 V ±0.5% reference voltage, fast Constant On-Time (COT) control, and monotonic soft-start with four selectable times. It delivers high-efficiency point-of-load power for server VRMs, telecom POLs, and storage subsystems.
For engineers reviewing the TDA38840AUMA1 datasheet, TDA38840AUMA1 pinout, TDA38840AUMA1 application, or TDA38840AUMA1 equivalent, key selection criteria include input voltage flexibility (2.0–17 V), programmable switching frequency (600 kHz–2 MHz), thermally compensated OCP with four settings, FCCM/DEM mode selection, and pre-bias start-up capability in distributed power architectures.
Technical Context
The TDA38840AUMA1 implements a fast COT control architecture with adaptive on-time generation, enabling stable regulation with ceramic output capacitors and sub-100 ns load transient response. Its internal LDO powers gate drivers and logic, supporting single-supply operation or extended PVin range via external VCC biasing.
It integrates dual OptiMOS™ MOSFETs (high-side and low-side), bootstrap diode, and current-sense circuitry. Protection includes thermally compensated over-current detection with four user-selectable thresholds, pre-bias start-up, and open-drain Power Good with adjustable threshold via feedback divider.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 40 A continuous DC output current capability at rated thermal conditions |
| Input Voltage Range | 4.3 V–17 V single supply; extends to 2.0 V–17 V when external VCC is applied |
| Reference Voltage | 0.6 V ±0.5% - enables precise output voltage setting down to 0.6 V with tight tolerance |
| Switching Frequency | 600 kHz–2 MHz programmable - allows optimization of size vs. efficiency and EMI performance |
| Soft-Start Time | Four selectable options (0.5 ms, 1 ms, 2 ms, 4 ms) - ensures monotonic startup into pre-biased rails |
| OCP Thresholds | Four user-configurable current limits via ILIM resistor - supports system-level fault margin tuning |
| Operating Junction Temp | –40 °C to +125 °C - qualified for industrial applications per JEDEC JESD22-A108 |
Pinout & Package
Package: 5 mm × 6 mm PQFN (37-pin, exposed thermal pad), halogen-free and RoHS2-compliant with exemption 7a.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 ILIM | Analog input | Sets OCP threshold via resistor-to-ground; selects one of four current limit levels |
| 2 PGood | Open-drain output | Signals valid output voltage; requires external pull-up to VCC or system rail |
| 3 Vin | Power input | Supplies internal LDO; shorted to VCC/LDO if external bias used |
| 4 VCC/LDO | Power I/O | Output of internal LDO or input for external VCC; decoupled with 2.2–10 µF ceramic cap |
| 5 VDRV | Power input | Bias for internal gate driver; must be shorted to VCC/LDO on PCB |
| 6,37 GATEL | Analog monitor | Low-side FET gate node; no external connection required |
| 7–10,19 PGND | Power ground | High-current return path for power stage; internally tied to AGND via lead frame |
| 11–18 SW | Power switch node | Connects to output inductor; multiple pins reduce resistance and inductance |
| 20–24 PVin | Power input | Main supply for power stage; separate from Vin/VCC to minimize noise coupling |
| 25 PHASE | Analog output | High-side FET source; connects to bootstrap capacitor and inductor |
| 26 BOOT | Analog input | Bootstrap supply for high-side driver; connected to PHASE via 0.1 µF+ X7R capacitor |
| 27 En | Multi-function input | Enable/disable control with voltage monitoring; asserts shutdown below 1.2 V threshold |
| 28 FB | Analog input | Feedback node for output voltage regulation; referenced to 0.6 V internal reference |
| 29 SS/Latch | Analog input | Soft-start timing and fault latch control; sets startup ramp and hiccup behavior |
| 30 TON/MODE | Analog input | Selects switching frequency and operation mode (FCCM or DEM) |
| 31–36 NC | No connect | Not internally bonded; must remain unconnected on PCB |
Key Features
| Feature | Design Value |
|---|---|
| Fast COT Control | Enables stable regulation with low-ESR ceramic output caps and <100 ns load-step response without loop compensation |
| Programmable Operation Modes | FCCM ensures continuous inductor current at light loads; DEM improves light-load efficiency by disabling low-side FET conduction |
| Thermally Compensated OCP | OCP threshold scales with junction temperature to maintain consistent current limiting across –40 °C to +125 °C |
| Pre-Bias Start-Up | Allows safe startup into an already biased output rail without reverse current or voltage overshoot |
| Four Soft-Start Options | Selectable ramp times (0.5/1/2/4 ms) via SS/Latch pin voltage - prevents inrush current in multi-rail systems |
Applications
| Server VRM | Telecom POL |
|---|---|
Use Scenario: Core voltage regulation for dual-socket x86 processors in 1U/2U rack servers. IC Role / Device Role / Timing Role: Primary 40 A buck regulator delivering 0.8–1.2 V at up to 1 MHz switching frequency with fast transient response. Use Value: Monotonic soft-start and pre-bias capability prevent rail collapse during hot-plug CPU insertion and multi-phase sequencing. |
Use Scenario: Point-of-load conversion for FPGA, ASIC, and SerDes supplies in 5G baseband units. IC Role / Device Role / Timing Role: High-density POL regulator powering 0.75–1.8 V rails with programmable frequency to avoid band interference. Use Value: FCCM/DEM mode selection maintains >90% efficiency from 1% to 100% load, critical for thermal-limited outdoor enclosures. |
| Enterprise Storage PSU | Distributed Datacenter Power |
Use Scenario: 12 V–1.05 V conversion for NVMe SSD controllers and DRAM buffers in all-flash arrays. IC Role / Device Role / Timing Role: Single-chip buck solution replacing discrete controller+FET designs to reduce BOM count and layout area. Use Value: Integrated OptiMOS™ FETs and bootstrap diode eliminate external components, reducing footprint by >30% vs. controller-based solutions. |
Use Scenario: Modular 48 V–12 V intermediate bus conversion feeding downstream POLs in disaggregated compute racks. IC Role / Device Role / Timing Role: High-current intermediate regulator with thermally compensated OCP to support dynamic workload bursts. Use Value: Four OCP settings allow matching current limit to upstream fuse rating and downstream capacitance, improving system-level fault containment. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP8772GQ-Z (Monolithic Power) | 35 A rated, fixed 0.6 V reference, no external VCC option, 500 kHz–3 MHz freq range | Lacks pre-bias start-up and thermally compensated OCP; limited to single-supply 4.5–18 V operation | Preferred where cost sensitivity outweighs industrial temp range and fault robustness requirements |
| TPS546D24 (Texas Instruments) | 40 A, PMBus-enabled, 0.5–2.2 V output, digital loop compensation, no integrated bootstrap diode | Requires external high-side driver bootstrap circuit; supports telemetry and dynamic voltage scaling | Chosen when digital monitoring, phase interleaving, or adaptive voltage positioning are required |
Compared with MP8772GQ-Z and TPS546D24, the TDA38840AUMA1 uniquely combines full integration (bootstrap diode, LDO, dual FETs), pre-bias start-up, and thermally compensated OCP in a 5×6 mm package-making it optimal for space-constrained, high-reliability industrial POLs where analog simplicity and fault resilience are prioritized over digital configurability.
Availability
TDA38840AUMA1 is available at Aetrix Electronics and suitable for server VRMs, telecom POLs, and enterprise storage power delivery requiring stable component supply, long-term industrial qualification, and consistent thermal performance across –40 °C to +125 °C.
Supply support for TDA38840AUMA1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies is a German semiconductor manufacturer specializing in power management, automotive, and industrial control ICs, with leadership in silicon and wide-bandgap power devices.
The TDA38840 belongs to Infineon's OptiMOS™ IPOL family-designed specifically for high-current, low-voltage point-of-load regulation in datacenter and communications infrastructure where integration, thermal robustness, and fast transient response are critical.
FAQ
What is the minimum recommended output capacitance for stable operation?
The TDA38840AUMA1 is optimized for ceramic output capacitors and requires ≥220 µF total effective capacitance with ≤5 mΩ ESR. Stability is maintained across the full 600 kHz–2 MHz frequency range without external compensation, provided the feedforward capacitor (Cff = 0.1 µF) is placed per Figure 3 in the datasheet and layout follows section 15 recommendations.
Can the TDA38840AUMA1 operate without an external VCC supply?
Yes. The device operates from a single PVin supply (4.3 V–17 V) using its internal LDO to power gate drivers and logic. When PVin drops below 4.3 V, an external VCC (2.0 V–5.5 V) must be supplied to VCC/LDO to extend input range - Vin is then shorted to VCC/LDO, sharing the same 10 µF decoupling capacitor.
How is over-current protection configured and what happens during a fault?
OCP is set by connecting a resistor from ILIM to AGND, selecting one of four thresholds (e.g., 45 A, 50 A, 55 A, 60 A). During over-current, the device enters hiccup mode after 20 ms delay: it shuts down, waits 10 ms, then attempts restart. Thermal compensation adjusts the trip point linearly with junction temperature to maintain consistent protection across operating range.
Is the TDA38840AUMA1 compatible with standard 5 mm × 6 mm QFN reflow profiles?
Yes. The PQFN package meets IPC/JEDEC J-STD-020D moisture sensitivity level 3 and is qualified for standard lead-free reflow profiles (peak 260 °C, 20–40 sec above 217 °C). The exposed thermal pad must be soldered to a solid copper thermal plane with ≥80% solder coverage and 6–8 vias to inner ground layers for reliable thermal performance at 40 A continuous load.
TDA38840AUMA1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Series:
- OptiMOS™ IPOL
- Package/Case:
- 36-PowerVFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2V
- Voltage - Input (Max):
- 17V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 6V
- Current - Output:
- 40A
- Frequency - Switching:
- 600kHz ~ 2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PG-IQFN-36-2
TDA38840AUMA1 FAQ
1.How can I place an order for TDA38840AUMA1 through Aetrix?
Please submit a Request for Quotation (RFQ) for TDA38840AUMA1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TDA38840AUMA1 reliable?
The price and inventory of TDA38840AUMA1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TDA38840AUMA1 is usually 5 days.
3.What payment methods are accepted for TDA38840AUMA1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TDA38840AUMA1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TDA38840AUMA1?
TDA38840AUMA1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TDA38840AUMA1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TDA38840AUMA1?
For technical support, including TDA38840AUMA1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TDA38840AUMA1 requirements.
6.How does Aetrix verify that TDA38840AUMA1 is sourced from the original manufacturer or authorized distributors?
All TDA38840AUMA1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TDA38840AUMA1 meets industry standards.
7.What is the process for return or replacement of TDA38840AUMA1?
All TDA38840AUMA1 units undergo pre-shipment inspection (PSI). If there is an issue with TDA38840AUMA1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TDA38840AUMA1 part is unused and in its original packaging.
Return procedure for TDA38840AUMA1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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