STMicroelectronics TDA7535
- Part No.:
- TDA7535
- Manufacturer:
- STMicroelectronics
- Category:
- ADCs/DACs - Special Purpose
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TDA7535.pdf
- Description:
- IC DAC/AUDIO 20BIT 14SO
- Quantity:
- Payment:

- Shipping:

Inventory:2,576
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TDA7535 from STMicroelectronics is a 20-bit stereo delta-sigma DAC with I²S interface, third-order Chebyshev analog reconstruction filter, on-chip PLL, and single-ended 0.9 VRMS outputs per channel. It operates from a single 3.3 V supply, supports 36–48 kHz sampling rates, and delivers 94 dB typical THD+N at 0 dBFS - designed for high-fidelity audio playback in CD players, digital radio, and MPEG audio systems.
For engineers reviewing the TDA7535 datasheet, TDA7535 pinout, TDA7535 application, or TDA7535 equivalent, key selection criteria include its 20-bit resolution, I²S timing compliance (64×Fs system clock), dual-channel single-ended output architecture, low 75 mW total power consumption, and SO14 package compatibility with legacy audio PCB layouts.
Technical Context
The TDA7535 integrates a 20-bit multi-bit delta-sigma modulator, digital interpolation FIR filters (FIR1–FIR3), and a thermally randomized noise shaper to achieve >94 dB dynamic range. Its analog signal path includes a third-order Chebyshev reconstruction filter with 0.12 dB passband ripple and 21.53 kHz stopband edge at 44.1 kHz sampling.
It accepts standard I²S data with left-right frame sync (FSYNC), uses an internal PLL locked to 64×Fs, and separates digital and analog domains via dedicated VDD_DIG/VDD_ANA supplies and isolated GND_DIG/GND_ANA pins - enabling clean 0.9 VRMS outputs without external op-amps.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 20-bit delta-sigma - enables ≥96 dB SNR and <0.01% THD+N at full scale |
| Sampling Rate | 36–48 kHz - matches CD, MPEG-1/2 Layer III, and digital radio broadcast standards |
| Output Type | Single-ended 0.9 VRMS per channel - directly drives line-level inputs without external amplification |
| Power Supply | Single 3.3 V (±4.5%) for both analog and digital domains - simplifies power design vs. dual-rail DACs |
| Interface | I²S with FSYNC, SCK, SDATA - compatible with standard audio SoCs and FPGA audio controllers |
| Total Power | <75 mW at 48 kHz - suitable for battery-powered portable audio with thermal margin |
| THD+N | 94 dB typ. @ 0 dBFS, 1 kHz - meets Hi-Fi line-output distortion requirements per IEC 60268-3 |
Pinout & Package
Package: SO14 (Small Outline, 14-pin, 3.9 mm width, 1.27 mm pitch) - RoHS-compliant ECOPACK® variant available.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 4, 11 | N.C. | No internal connection - must be left unconnected; no pull-up/down required |
| 2 | SDATA | I²S serial data input - accepts 20-bit MSB-first data aligned to SCK rising edge |
| 3 | SCK | I²S bit clock input - defines sample rate via 64×Fs PLL lock; jitter tolerance ≤212 ps RMS |
| 5 | GND_DIG | Digital ground reference - separate from analog ground to prevent digital noise coupling |
| 6 | GND_ANA | Analog ground reference - connects to analog PCB plane; star-grounded near VCM and output caps |
| 7, 8 | OUTSR / OUTSL | Right/Left single-ended analog outputs - 0.9 VRMS, DC-coupled, require local 100 nF bypass to GND_ANA |
| 9 | VCM | Internal 1.65 V reference - externally filtered with ≥10 μF capacitor to stabilize common-mode voltage |
| 10 | VDD_ANA | Analog 3.3 V supply - decoupled with 100 nF + 10 μF capacitors close to pin |
| 12 | VDD_DIG | Digital 3.3 V supply - decoupled separately from VDD_ANA to isolate switching noise |
| 13 | FSYNC | I²S left/right channel frame sync - active-high pulse aligning to SCK falling edge per I²S spec |
| 14 | RESETN | Active-low reset - requires ≥50 ms low pulse after power stabilization for reliable initialization |
Key Features
| Feature | Design Value |
|---|---|
| On-chip PLL | Locks to 64×Fs clock - eliminates need for external crystal or clock generator in I²S master systems |
| Third-order Chebyshev filter | 0.12 dB passband ripple, 90 dB stopband attenuation - ensures alias-free audio output without external filtering |
| Dual independent output channels | Separate OUTSL/OUTSR pins with matched gain (±0.1 dB interchannel mismatch) - preserves stereo imaging integrity |
| Low-voltage CMOS interface | 3.3 V logic compatible with modern SoCs and microcontrollers - no level-shifting required |
| Thermal noise shaping | Multi-bit ΔΣ modulator with thermocoding - reduces idle-tone artifacts and improves small-signal linearity |
Applications
| CD Player Audio Output | Digital Radio Receiver |
|---|---|
|
Use Scenario: Converts decoded digital audio streams from CD transport or EFM demodulator into analog line-level signals for headphone or amplifier input. IC Role / Device Role / Timing Role: Final-stage stereo DAC with integrated reconstruction filtering and I²S interface - replaces discrete filter + op-amp stages. Use Value: 94 dB THD+N and 0.1 dB interchannel gain match preserve stereo separation and dynamic range required by Red Book CD specifications. |
Use Scenario: Receives I²S audio from DAB/DAB+ or DRM demodulation ICs and drives analog audio outputs in portable or automotive digital radio modules. IC Role / Device Role / Timing Role: Low-power, single-supply stereo DAC synchronized to 44.1/48 kHz broadcast sampling rates via internal PLL. Use Value: 75 mW total power and SO14 footprint enable compact, thermally stable designs meeting ETSI EN 300 401 RF immunity requirements. |
| MPEG Audio Playback | CD-ROM Drive Audio Interface |
|
Use Scenario: Renders compressed audio (MP3, AAC) from PC or embedded media player into analog output for speakers or line-out jacks. IC Role / Device Role / Timing Role: I²S-input DAC with wide sampling rate support (36–48 kHz) - handles variable-rate streams from software decoders. Use Value: 96 dB dynamic range at -60 dBFS input enables quiet background passages without quantization noise floor elevation. |
Use Scenario: Provides analog audio output from CD-ROM drive controller ASICs during CD-DA or CD-Interactive playback. IC Role / Device Role / Timing Role: Legacy-compatible stereo DAC accepting standard I²S from Philips SAA7350 or similar CD controller chips. Use Value: SO14 package and 3.3 V operation allow drop-in replacement of older 5 V DACs in existing CD-ROM board designs with minimal layout change. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar stereo DAC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CS4344-CZZ | 24-bit, 96 kHz max sampling, 3.3 V only, no on-chip PLL - requires external MCLK | Higher resolution but lacks integrated PLL and Chebyshev filter - needs external op-amps and clock source | Choose for higher-resolution audio where external clocking and filtering are acceptable |
| PCM1754DBQR | 24-bit, 192 kHz capable, 5 V tolerant I/O, integrated analog filter - higher power (120 mW) | Supports wider sampling rates and mixed-voltage systems - not pin-compatible with SO14 layout | Choose for professional audio interfaces requiring extended bandwidth and 5 V logic compatibility |
Compared with CS4344-CZZ and PCM1754DBQR, the TDA7535 offers lower system cost and smaller PCB area due to its integrated PLL, Chebyshev filter, and SO14 footprint - ideal for cost-sensitive consumer audio where 48 kHz and 20-bit resolution meet performance targets.
Availability
TDA7535 is available at Aetrix Electronics and suitable for CD players, digital radio receivers, MPEG audio playback devices, and CD-ROM drive audio interfaces requiring stable component supply and long-term industrial availability.
Supply support for TDA7535 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in analog, power, microcontroller, and sensor technologies for automotive, industrial, and consumer markets.
The TDA7535 belongs to ST's legacy audio DAC product line, engineered specifically for cost-effective, high-fidelity stereo playback in mass-market consumer electronics - emphasizing integration, low power, and I²S interoperability.
FAQ
What is the minimum required reset pulse duration for reliable TDA7535 initialization?
The TDA7535 requires a minimum RESETN low pulse duration of 50 ms after both VDD_DIG and VDD_ANA reach stable 3.3 V. This ensures complete internal state machine reset and PLL lock acquisition. Shorter pulses may result in undefined output behavior or failure to lock to the I²S clock.
Can the TDA7535 operate with a 44.1 kHz sampling rate?
Yes - the TDA7535 supports 36–48 kHz sampling rates, including 44.1 kHz. Its internal PLL locks to 64×Fs, generating a 2.8224 MHz system clock. The device maintains specified THD+N (94 dB typ.) and passband ripple (0.12 dB) at this rate per Table 9 in the datasheet.
Is external filtering required on the VCM pin?
Yes - the VCM pin (Pin 9) supplies the internal 1.65 V reference and must be externally filtered with ≥10 μF low-ESR capacitor (e.g., 10 μF tantalum or ceramic) placed adjacent to the pin. Failure to do so causes increased output noise and potential instability in the analog output stage.
Does the TDA7535 support left-justified or right-justified I²S formats?
No - the TDA7535 only supports standard I²S format with MSB-first data, 32-bit frame length, and FSYNC active-high pulse aligned to the SCK falling edge. Left-justified or right-justified modes are not implemented; attempting them results in incorrect channel mapping or silence.
TDA7535 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Type:
- DAC, Audio
- Number of Channels:
- 1
- Resolution (Bits):
- 20 b
- Sampling Rate (Per Second):
- -
- Data Interface:
- PCM
- Voltage Supply Source:
- Analog and Digital
- Voltage - Supply:
- 3.15V ~ 3.45V
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 14-SO
TDA7535 FAQ
1.How can I place an order for TDA7535 through Aetrix?
Please submit a Request for Quotation (RFQ) for TDA7535 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TDA7535 reliable?
The price and inventory of TDA7535 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TDA7535 is usually 5 days.
3.What payment methods are accepted for TDA7535?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TDA7535 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TDA7535?
TDA7535 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TDA7535 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TDA7535?
For technical support, including TDA7535 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TDA7535 requirements.
6.How does Aetrix verify that TDA7535 is sourced from the original manufacturer or authorized distributors?
All TDA7535 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TDA7535 meets industry standards.
7.What is the process for return or replacement of TDA7535?
All TDA7535 units undergo pre-shipment inspection (PSI). If there is an issue with TDA7535, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TDA7535 part is unused and in its original packaging.
Return procedure for TDA7535:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TDA7535 Tags

-
PCM1808PWR
Texas Instruments

-
PCM5121PWR
Texas Instruments

-
PCM5100APWR
Texas Instruments

-
AK4432VT
Asahi Kasei Microdevices/AKM

-
PCM1803ADBR
Texas Instruments

-
WM8524CGEDT/R
Cirrus Logic Inc.

-
AK5704EN
Asahi Kasei Microdevices/AKM

-
AK5720VT
Asahi Kasei Microdevices/AKM

-
WM8523GEDT/R
Cirrus Logic Inc.

-
PCM5102APWR
Texas Instruments

-
AMC1306M05DWVR
Texas Instruments

-
AMC1106M05DWVR
Texas Instruments
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

