STMicroelectronics TDA7535013TR

Overview

TDA7535013TR from STMicroelectronics is a 20-bit stereo delta-sigma DAC with I²S interface, third-order Chebyshev analog reconstruction filter, on-chip PLL, and 0.9 V_RMS single-ended output per channel. It operates from a single 3.3 V supply, supports 36–48 kHz sampling rates, and delivers 94 dB typical THD+N at 0 dBFS. It is used in CD players, digital radio, and MPEG audio playback systems.

For engineers reviewing the TDA7535013TR datasheet, TDA7535013TR pinout, TDA7535013TR application, or TDA7535013TR equivalent, key selection criteria include its 20-bit resolution, I²S timing compliance (64×Fs system clock), dual-channel single-ended output architecture, and SO14 package compatibility with legacy audio signal chain layouts.

Technical Context

The TDA7535013TR implements a cascaded delta-sigma modulation architecture with three FIR interpolation stages followed by a multi-bit ΣΔ modulator and thermometric decoding. Its analog output path includes a third-order Chebyshev reconstruction filter and differential-to-single-ended conversion.

It accepts standard I²S data with left-justified frame sync (FSYNC), uses an internal PLL to derive clocks from SCK, and requires separate analog/digital ground (GND_ANA/GND_DIG) and power (VDD_ANA/VDD_DIG) domains to maintain 96 dB dynamic range and –95 dB crosstalk performance.

Key Specifications

Pinout & Package

The TDA7535013TR is housed in a 14-pin SOIC (SO14) package with 1.27 mm pitch, 8.65 mm body length, and ECOPACK® environmental compliance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar stereo DAC applications.

Compared with CS4344-KSZ and PCM1754DBQR, the TDA7535013TR offers superior integration (on-chip PLL, Chebyshev filter, single 3.3 V supply) and lower power (25 mA), making it optimal for cost-sensitive, space-constrained consumer audio where 48 kHz sampling suffices.

Availability

TDA7535013TR is available at Aetrix Electronics and suitable for CD players, digital radio receivers, MPEG audio playback systems, and CD-ROM drive audio subsystems requiring stable component supply and long-term obsolescence management.

Supply support for TDA7535013TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, analog ICs, power management devices, and MEMS sensors for industrial, automotive, and consumer markets.

The TDA7535013TR belongs to ST's legacy audio DAC product line, engineered specifically for high-fidelity, low-cost stereo playback in mass-market consumer electronics with minimal external components.

FAQ

What is the minimum reset pulse width required for reliable initialization?

The TDA7535013TR requires a minimum active-low RESETN pulse width of 50 ms after both VDD_ANA and VDD_DIG reach stable 3.3 V. This ensures complete internal state machine reset and PLL lock acquisition before I²S data acceptance. Shorter pulses may result in undefined output behavior or failure to lock to incoming SCK.

Can the TDA7535013TR operate with a 44.1 kHz sampling rate?

Yes - the TDA7535013TR supports 36–48 kHz sampling rates, including 44.1 kHz. At this rate, the internal PLL derives a 2.8224 MHz system clock (64 × 44.1 kHz), and the Chebyshev filter provides a 21.53 kHz passband edge with ±0.12 dB ripple, meeting CD audio specifications.

Is separate analog and digital ground mandatory?

Yes - GND_ANA (Pin 6) and GND_DIG (Pin 5) must be connected to physically separate ground planes joined at a single point near the device. This isolation prevents digital switching noise from modulating the analog output stage, preserving the specified 94 dB THD+N and –95 dB crosstalk performance.

What is the purpose of the VCM pin (Pin 9)?

VCM provides a 1.65 V DC bias reference for the internal differential-to-single-ended output converter. It must be supplied with a clean, low-noise 1.65 V source (e.g., resistor divider from 3.3 V with RC filtering), as any noise or drift on VCM directly appears as common-mode error at OUTSL/OUTSR outputs.