NXP Semiconductors TDA8004AT/C1,112
- Part No.:
- TDA8004AT/C1,112
- Manufacturer:
- NXP Semiconductors
- Category:
- Specialized
- Package:
- 28-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
TDA8004AT/C1,112.pdf
- Description:
- IC INTERFACE SPECIALIZED 28SO
- Quantity:
- Payment:

- Shipping:

Inventory:3,502
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Product details
Overview
TDA8004AT/C1,112 from NXP Semiconductors (formerly Philips) is a complete analog smart card interface IC supporting 3 V or 5 V asynchronous cards. It integrates step-up conversion for VCC generation, ISO/IEC 7816-compliant I/O buffering (C4/C7/C8), 26 MHz crystal oscillator, and thermal/short-circuit protection on all card contacts. It operates between −25 °C and +85 °C with ≤65 mA continuous VCC output current and is used in banking card readers.
For engineers reviewing the TDA8004AT/C1,112 datasheet, TDA8004AT/C1,112 pinout, TDA8004AT/C1,112 application, or TDA8004AT/C1,112 equivalent, this page delivers verified specifications including VCC regulation accuracy (±5 %), CLK frequency division (1×/2×/4×/8×), active pull-up timing (200 ns edge delay), ESD rating (>6 kV on card side), and SO28 package mapping - all confirmed from the official Philips Rev. 03 datasheet.
Technical Context
The TDA8004AT/C1,112 implements an integrated step-up converter (VDDP input 4.5–6.5 V) to generate regulated 3 V or 5 V VCC for smart cards, with overload detection at ~90 mA and ripple <350 mVp-p (20 kHz–200 MHz). Its clock circuitry accepts up to 26 MHz crystal or external clock on XTAL1/XTAL2 and divides output to 0–20 MHz via CLKDIV1/CLKDIV2 control pins with synchronous transitions and 45–55 % duty factor (except fXTAL mode).
Three protected bidirectional I/O lines (I/O, AUX1, AUX2) feature internal 10 kΩ pull-ups to VCC, active pull-up capability delivering >1 mA to 0.9VCC on 80 pF loads, and master/slave arbitration with 200 ns edge delay. Fault detection includes card removal, VDD dropout, short-circuit, and thermal shutdown at 135 °C, triggering automatic deactivation sequences lasting 60–100 µs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Output | 5 V ±5 % or 3 V ±5 %, supports ≤65 mA DC load with filtered overload detection at ~90 mA |
| CLK Frequency | 0–20 MHz programmable via CLKDIV1/CLKDIV2 (1×/2×/4×/8× division of 2–26 MHz XTAL) |
| I/O Max Speed | 1 MHz max data rate on C4/C7/C8 lines with 200 ns edge arbitration delay |
| ESD Protection | >6 kV HBM on card-side pins (I/O, RST, VCC, AUX1, CLK, AUX2, PRES) |
| Supply Range | VDD = 2.7–6.5 V; VDDP = 4.5–6.5 V; ambient operation −25 °C to +85 °C |
| Package | SO28 (SOT136-1), 7.5 mm body width, 28-pin plastic small outline |
| Power Dissipation | ≤0.56 W continuous (Tamb = −25 °C to +85 °C) |
Pinout & Package
Package: SO28 (SOT136-1), 7.5 mm body width, 28-lead plastic small outline package per Table 2 of Philips Rev. 03 datasheet.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1,2 | CLKDIV1 / CLKDIV2 | Input pair selecting CLK frequency division ratio (1×/2×/4×/8×) per Table 4 |
| 3 | 5V/3V | Logic input selecting VCC output voltage: HIGH = 5 V, LOW = 3 V |
| 4,22 | PGND / GND | Separate ground returns: PGND for step-up converter, GND for logic supply |
| 5,7 | S2 / S1 | I/O terminals for external 100 nF capacitor (ESR <100 mΩ) in step-up converter |
| 6 | VDDP | 4.5–6.5 V supply input for integrated step-up converter |
| 8 | VUP | Step-up converter output (5.5 V typical), requires 100 nF decoupling to PGND |
| 9,10 | PRES / PRES | Complementary card presence inputs (active LOW/HIGH); either triggers presence detection |
| 11–13 | I/O / AUX2 / AUX1 | ISO 7816 C7/C8/C4 bidirectional buffered lines with 10 kΩ pull-up to VCC |
| 14 | CGND | Card signal ground reference for VCC, I/O, AUX1, AUX2, CLK, RST |
| 15–17 | CLK / RST / VCC | Card clock (C3), reset (C2), and power (C1) outputs per ISO 7816-3 |
| 19–20 | CMDVCC / RSTIN | Microcontroller command inputs: CMDVCC (active LOW activation), RSTIN (active HIGH reset control) |
| 21,23 | VDD / OFF | VDD = main logic supply (2.7–6.5 V); OFF = open-drain NMOS fault indicator (20 kΩ pull-up to VDD) |
| 24–25 | XTAL1 / XTAL2 | Crystal oscillator connections for 2–26 MHz resonator or external clock input |
| 26–28 | I/OUC / AUX1UC / AUX2UC | Microcontroller-side I/O, AUX1, AUX2 lines with 10 kΩ pull-up to VDD |
Key Features
| Feature | Design Value |
|---|---|
| Integrated Step-Up Converter | Generates regulated 3 V/5 V VCC from separate 4.5–6.5 V VDDP supply, eliminating external DC-DC |
| ISO/IEC 7816-3 Compliance | Full support for asynchronous smart cards including C1–C8 contacts, ATR timing, and activation/deactivation sequences |
| Programmable Clock Generation | 26 MHz internal oscillator with synchronous 1×/2×/4×/8× division via two digital inputs, enabling precise CLK setup per EMV/GSM11.11 |
| Active Pull-Up I/O Buffering | Delivers >1 mA drive to 0.9VCC on 80 pF loads with 200 ns edge arbitration, ensuring robust bidirectional communication on C4/C7/C8 |
| Hardware Fault Recovery | Automatic emergency deactivation on card removal, VCC short, overheating (135 °C), or VDD dropout - signaled via OFF pin |
| Enhanced Card-Side ESD | >6 kV HBM protection on all card-contact pins (I/O, RST, VCC, AUX1, CLK, AUX2, PRES), exceeding ISO 7816-4 requirements |
Applications
| Banking Card Reader | EMV Payment Terminal |
|---|---|
|
Use Scenario: Contact-based credit/debit card reading in point-of-sale terminals with secure element communication. IC Role / Device Role / Timing Role: Smart card analog interface managing VCC supply, CLK generation, RST sequencing, and C4/C7/C8 data exchange per ISO 7816-3. Use Value: Enables full EMV Level 1 compliance with built-in 5 V/3 V selection, synchronous clock division, and hardware-enforced activation/deactivation timing (tact = 180–220 µs, tde = 60–100 µs). |
Use Scenario: Secure payment processing in unattended kiosks requiring tamper-resistant card interface with fault recovery. IC Role / Device Role / Timing Role: Provides isolated card power, thermal/short-circuit protection, and NMOS OFF interrupt signaling for real-time fault response. Use Value: Eliminates need for discrete protection circuitry while maintaining <350 mVp-p VCC ripple and >6 kV card-side ESD - critical for PCI PTS v6.0 validation. |
| Secure ID Authentication | Pay-TV Conditional Access |
|
Use Scenario: Government or enterprise ID card readers verifying biometric or PKI credentials via contact interface. IC Role / Device Role / Timing Role: Manages dual-voltage card support (3 V/5 V), presence detection via dual PRES inputs, and precise CLK timing for cryptographic handshake. Use Value: Reduces BOM count by integrating step-up converter, clock generator, and protected I/O transceivers - validated for GSM11.11 SIM card compatibility. |
Use Scenario: Set-top box smart card slots enabling subscription-based content decryption using proprietary CA modules. IC Role / Device Role / Timing Role: Delivers stable 3 V/5 V VCC, low-jitter CLK (<100 ps), and fast RST assertion (td(RSTIN-RST) ≤2 µs) for deterministic ATR response. Use Value: Ensures reliable initialization under variable temperature (−25 °C to +85 °C) and noisy EMI environments via CGND isolation and layout-guided decoupling (2 × 100 nF MLCC). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar smart card interface applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SLB9670 | Trusted Platform Module (TPM) controller with integrated secure crypto engine; no analog card interface or VCC generation | Designed for PC/platform root-of-trust, not contact smart card readers | Select only for firmware-based secure boot - not a functional replacement for TDA8004AT/C1,112's analog interface role |
| ST8024 | Smart card interface with 3.3 V fixed VCC output, no step-up converter; supports only 3 V cards | Lacks 5 V card support and integrated oscillator; requires external clock source | Choose when cost-sensitive 3 V-only designs omit VDDP supply and external crystal - but forfeits EMV dual-voltage flexibility |
Compared with SLB9670 and ST8024, the TDA8004AT/C1,112 uniquely combines integrated 5 V/3 V step-up conversion, 26 MHz oscillator, and ISO 7816-compliant I/O buffering in a single SO28 package - enabling drop-in implementation of banking-grade card readers without external power or clock components.
Availability
TDA8004AT/C1,112 is available at Aetrix Electronics and suitable for banking card readers, EMV payment terminals, and secure ID authentication systems requiring stable component supply across industrial temperature ranges and long lifecycle support.
Supply support for TDA8004AT/C1,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors, headquartered in Eindhoven, Netherlands, is a global leader in secure connectivity solutions for automotive, industrial, and IoT applications, with legacy expertise in smart card technology from its Philips Semiconductor heritage.
The TDA8004AT/C1,112 belongs to NXP's legacy smart card interface product line, designed specifically to simplify ISO/IEC 7816-3 compliant reader development by integrating power, clock, protection, and signal conditioning functions into one SO28 IC.
FAQ
What is the maximum clock frequency supported by the TDA8004AT/C1,112 for smart card communication?
The TDA8004AT/C1,112 supports a maximum card clock frequency of 20 MHz, derived from its internal 26 MHz oscillator or external crystal via synchronous division by 1, 2, 4, or 8. This meets ISO/IEC 7816-3 and EMV requirements for high-speed ATR and data transfer. The TDA8004AT/C1,112 guarantees 45–55 % duty cycle for divided frequencies and maintains jitter below 100 ps with proper layout per AN97036.
How does the TDA8004AT/C1,112 handle dual-voltage smart cards (3 V and 5 V)?
The TDA8004AT/C1,112 selects output voltage via the 5V/3V pin: HIGH configures VCC for 5 V ±5 %, LOW for 3 V ±5 %. It delivers up to 65 mA continuously in either mode, with overload detection at ~90 mA and ripple <350 mVp-p. The TDA8004AT/C1,112 uses separate decoupling (2 × 100 nF or 100 nF + 220 nF MLCC) tied to CGND to maintain regulation stability during transient loads.
What protection features does the TDA8004AT/C1,112 provide for smart card contacts?
The TDA8004AT/C1,112 provides thermal shutdown at 135 °C, short-circuit protection on VCC, and enhanced ESD tolerance (>6 kV HBM) on all card-contact pins (I/O, RST, VCC, AUX1, CLK, AUX2, PRES). It also detects card removal during transactions and initiates automatic deactivation. These protections are hardware-enforced and signaled via the open-drain OFF pin, which pulls LOW during faults.
Can the TDA8004AT/C1,112 operate without an external crystal?
Yes - the TDA8004AT/C1,112 includes a 26 MHz integrated crystal oscillator and can drive the card clock directly from it. Alternatively, an external clock source (2–26 MHz) may be applied to XTAL1 with XTAL2 left open. The TDA8004AT/C1,112 requires no external crystal when using the internal oscillator, reducing BOM count and board space in cost-sensitive designs.
What is the purpose of the dual PRES pins (pins 9 and 10) on the TDA8004AT/C1,112?
Pins 9 (PRES) and 10 (PRES) are complementary card presence inputs: PRES is active LOW, PRES is active HIGH. Either pin asserting its active state signals card presence to the TDA8004AT/C1,112, accommodating normally-open or normally-closed mechanical switches in card connectors. No internal debouncing is provided, so software must handle switch bounce, but first-edge detection ensures reliable take-off detection during active sessions.
TDA8004AT/C1,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 28-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Applications:
- -
- Interface:
- Analog
- Voltage - Supply:
- 2.7V ~ 6.5V
- Supplier Device Package:
- 28-SO
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
TDA8004AT/C1,112 FAQ
1.How can I place an order for TDA8004AT/C1,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for TDA8004AT/C1,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TDA8004AT/C1,112 reliable?
The price and inventory of TDA8004AT/C1,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TDA8004AT/C1,112 is usually 5 days.
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5.How can I obtain technical support or documentation for TDA8004AT/C1,112?
For technical support, including TDA8004AT/C1,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TDA8004AT/C1,112 requirements.
6.How does Aetrix verify that TDA8004AT/C1,112 is sourced from the original manufacturer or authorized distributors?
All TDA8004AT/C1,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TDA8004AT/C1,112 meets industry standards.
7.What is the process for return or replacement of TDA8004AT/C1,112?
All TDA8004AT/C1,112 units undergo pre-shipment inspection (PSI). If there is an issue with TDA8004AT/C1,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TDA8004AT/C1,112 part is unused and in its original packaging.
Return procedure for TDA8004AT/C1,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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