NXP Semiconductors TDA8763AM/3/C4,118
- Part No.:
- TDA8763AM/3/C4,118
- Manufacturer:
- NXP Semiconductors
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 28-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
TDA8763AM/3/C4,118.pdf
- Description:
- IC ADC 10BIT SIGMA-DELTA 28SSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TDA8763AM/3/C4,118 from NXP Semiconductors (formerly Philips) is a 10-bit high-speed low-power analog-to-digital converter optimized for professional video digitization and transient signal capture. It delivers up to 30 MHz sampling rate, 9.4 effective bits at 4.43 MHz input with 40 MHz clock, ±0.8 LSB integral non-linearity, and 175 mW typical power dissipation in SSOP28 package.
For engineers reviewing the TDA8763AM/3/C4,118 datasheet, TDA8763AM/3/C4,118 pinout, TDA8763AM/3/C4,118 application, or TDA8763AM/3/C4,118 equivalent, this page provides verified technical context, real-world design meaning of specifications, validated pin functions, confirmed application use cases, and two rigorously cross-checked alternative parts for video ADC selection.
Technical Context
The TDA8763AM/3/C4,118 implements a flash-based architecture with internal resistor ladder reference (VRB/VRM/VRT), requiring external regulation but eliminating need for sample-and-hold or buffer amplifiers. Its one-clock-cycle conversion enables deterministic timing critical for video line-synchronous sampling.
It supports both binary and two's complement output coding via TC pin, features In-Range (IR) CMOS output flag, and uses separate analog (VCCA), digital (VCCD1/VCCD2), and output-stage (VCCO) supplies - enabling independent 5 V analog/digital and 3–5 V output voltage control for noise isolation and level translation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 10-bit linear output with no missing codes guaranteed - ensures monotonicity for precision waveform reconstruction. |
| Max Sampling Rate | 30 MHz - matches PAL/NTSC video line rates and supports digitization of baseband video signals without undersampling. |
| Effective Bits @ 4.43 MHz | 9.4 bits - translates to ~58 dB SNR, sufficient for broadcast-quality video digitization with minimal quantization distortion. |
| INL / DNL | ±0.8 / ±0.5 LSB - enables accurate amplitude measurement in radar pulse analysis and medical imaging applications. |
| Power Dissipation | 175 mW typical at 40 MHz clock - allows thermal management in dense PCB layouts without forced cooling. |
| Analog Input Bandwidth | 15 MHz full-scale sine wave - supports digitization of composite video signals including chroma and luminance components. |
| Digital Output Compatibility | TTL/CMOS-compatible outputs with 3–5 V VCCO - permits direct interfacing to FPGA I/O banks or microcontroller parallel ports. |
Pinout & Package
Package: SSOP28 (SOT341-1), plastic shrink small outline, 28 leads, body width 5.3 mm.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CLK (1) | Clock input | Accepts low-level AC sine wave or digital clock; min 0.5 ns edge rate required for stable sampling. |
| TC (2) | Two's complement mode select | Active LOW; configures output coding format for DSP-friendly signed data handling. |
| VCCA (3) | Analog supply | +4.75 to +5.25 V; powers analog core and reference ladder - must be decoupled separately from digital rails. |
| AGND (4) | Analog ground | Reference for VI, VRB/VRM/VRT; requires star grounding to minimize noise coupling into analog path. |
| VRB (6), VRM (7), VRT (9) | Reference ladder terminals | Define 0-code and 1023-code thresholds; external regulation needed - matching across multiple ADCs improves channel-to-channel gain tracking. |
| VI (8) | Analog input | DC-coupled, 5 pF input capacitance, 8 kΩ impedance at 4.43 MHz - eliminates need for external buffer in most video applications. |
| OE (10) | Output enable | Active LOW; places D0–D9 and IR outputs in high-impedance state - enables bus sharing in multi-ADC systems. |
| VCCO (13) | Output stage supply | 3.0–5.25 V; sets logic-high level for D0–D9 and IR - allows interfacing to 3.3 V or 5 V digital systems without level shifters. |
| D0–D9 (16–25) | Data outputs | LSB (D0) to MSB (D9); CMOS outputs with 1 mA drive capability - compatible with standard FPGA parallel input banks. |
| IR (26) | In-range flag | Active HIGH when VI is within valid conversion range (1.475–3.495 V); used for clipping detection in real-time video processing. |
Key Features
| Feature | Design Value |
|---|---|
| One-clock-cycle conversion | Enables precise synchronization to video line clocks or radar trigger pulses without pipeline latency. |
| No sample-and-hold or buffer required | Reduces BOM count and board area - simplifies layout for high-density video acquisition modules. |
| Separate analog/digital/output supply domains | Allows independent power domain partitioning to suppress digital switching noise from degrading analog SNR. |
| Low analog input capacitance (5 pF) | Minimizes loading on preceding video amplifier stages - preserves bandwidth and settling behavior. |
| In-Range (IR) output flag | Provides real-time overrange/underrange indication without software polling - critical for automatic gain control loops. |
Applications
| Video Data Digitizing | Radar Pulse Analysis |
|---|---|
Use Scenario: Digitizing composite PAL/NTSC video signals in broadcast equipment or test instrumentation. IC Role / Device Role / Timing Role: Primary ADC capturing luminance/chroma components at 13.5 MHz or 27 MHz pixel clocks with line-synchronous sampling. Use Value: 9.4 effective bits and 0.8% differential gain error ensure broadcast-grade color fidelity and geometry stability. | Use Scenario: Capturing short-duration RF pulses in ground-penetrating radar or ultrasonic NDT systems. IC Role / Device Role / Timing Role: High-fidelity time-domain sampling of fast-rising pulses (≤1.5 ns settling) for time-of-flight calculation. Use Value: 30 MHz sampling rate and 15 MHz analog bandwidth preserve pulse rise time integrity for sub-centimeter resolution. |
| Transient Signal Analysis | Medical Imaging |
Use Scenario: Recording fast electrical transients in power electronics fault detection or ESD event characterization. IC Role / Device Role / Timing Role: Single-shot capture of nanosecond-scale voltage spikes using external trigger and FIFO buffering. Use Value: DC sampling support and no missing codes guarantee accurate amplitude and timing measurement of rare transient events. | Use Scenario: Digitizing ultrasound echo signals or MRI gradient waveforms in portable diagnostic devices. IC Role / Device Role / Timing Role: Low-noise, low-power ADC front-end converting analog beamformed signals before digital beamforming. Use Value: 175 mW typical power and 58 dB SNR meet battery-life and image contrast requirements in Class II medical systems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9203ARUZ | 10-bit, 40 MSPS, 3 V single-supply operation, integrated reference, no external VRB/VRM/VRT required. | Better suited for portable/battery-powered systems; lacks IR flag and separate VCCO for level translation. | Select when system-level power reduction and simplified reference design outweigh need for in-range monitoring and flexible output voltage. |
| MAX1186ETX+ | 10-bit, 40 MSPS, 3 V supply, internal reference, serial LVDS output (not parallel), 0.5 LSB INL. | Designed for high-density FPGA interfaces with reduced pin count; incompatible pinout and interface protocol. | Select when board space is constrained and FPGA supports LVDS deserialization - not a drop-in replacement for parallel-bus video systems. |
Compared with TDA8763AM/3/C4,118, AD9203ARUZ reduces external component count but sacrifices analog input flexibility and real-time clipping detection, while MAX1186ETX+ trades parallel simplicity for serial density and lower INL - neither replicates the TDA8763AM/3/C4,118's combination of 30 MSPS, IR flag, and programmable VCCO for legacy video bus interfacing.
Availability
TDA8763AM/3/C4,118 is available at Aetrix Electronics and suitable for video data digitizing, radar pulse analysis, and transient signal analysis requiring stable component supply and long-term industrial availability.
Supply support for TDA8763AM/3/C4,118 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and consumer applications.
The TDA8763A family was developed by Philips (now NXP) specifically for professional video digitization and high-fidelity transient capture - emphasizing low power, high linearity, and robust analog interface design for broadcast and test equipment.
FAQ
What is the maximum sampling frequency supported by the TDA8763AM/3/C4,118?
The TDA8763AM/3/C4,118 supports a maximum sampling frequency of 30 MHz, as specified in its ordering code "/3" and confirmed in the Quick Reference Data table. This rating is validated under ramp input conditions at 40 MHz clock, and it defines the upper limit for reliable Nyquist-compliant digitization of analog signals up to 15 MHz bandwidth. Exceeding 30 MHz may result in increased INL/DNL and degraded effective bits.
Does the TDA8763AM/3/C4,118 require an external sample-and-hold circuit?
No, the TDA8763AM/3/C4,118 does not require an external sample-and-hold circuit. Its architecture supports direct sampling of analog inputs with 1.5 ns settling time for full-scale transitions, and the datasheet explicitly states "No sample-and-hold circuit required." This simplifies front-end design and reduces propagation delay in time-critical applications like radar pulse capture.
What are the supply voltage requirements for the TDA8763AM/3/C4,118 analog and digital sections?
The TDA8763AM/3/C4,118 requires three independent supply domains: VCCA (analog supply) = 4.75–5.25 V, VCCD1/VCCD2 (digital supplies) = 4.75–5.25 V, and VCCO (output stage supply) = 3.0–5.25 V. The analog and digital grounds (AGND, DGND1/DGND2) must be separated and joined at a single point to prevent noise coupling. These requirements are essential to achieve the specified 9.4 effective bits and ±0.8 LSB INL.
How is the reference voltage configured on the TDA8763AM/3/C4,118?
The TDA8763AM/3/C4,118 uses an external three-terminal resistor ladder reference configuration: VRB (bottom), VRM (middle), and VRT (top) pins set the 0-code and 1023-code thresholds. The datasheet specifies typical values of VRB = 1.3 V and VRT = 3.67 V, yielding a 2.37 V differential reference. An external regulator must drive these pins - no internal reference is provided. Matching VRB/VRT across multiple TDA8763AM/3/C4,118 devices improves gain tracking in multi-channel systems.
What does the IR (In-Range) output indicate on the TDA8763AM/3/C4,118?
The IR (In-Range) output on the TDA8763AM/3/C4,118 is an active-HIGH CMOS signal that indicates whether the analog input VI falls within the valid conversion range (1.475 V to 3.495 V). When VI is below 1.475 V (under-range) or above 3.495 V (over-range), IR goes LOW. This flag enables real-time clipping detection in video systems and automatic gain control without software overhead - a key differentiator versus generic ADCs lacking dedicated range monitoring.
TDA8763AM/3/C4,118 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 28-SSOP (0.209", 5.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Number of Bits:
- 10
- Sampling Rate (Per Second):
- 30M
- Number of Inputs:
- 1
- Input Type:
- Single Ended
- Data Interface:
- Parallel
- Configuration:
- ADC
- Ratio - S/H:ADC:
- -
- Number of A/D Converters:
- 1
- Architecture:
- Sigma-Delta
- Reference Type:
- External
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 28-SSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
TDA8763AM/3/C4,118 FAQ
1.How can I place an order for TDA8763AM/3/C4,118 through Aetrix?
Please submit a Request for Quotation (RFQ) for TDA8763AM/3/C4,118 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TDA8763AM/3/C4,118 reliable?
The price and inventory of TDA8763AM/3/C4,118 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TDA8763AM/3/C4,118 is usually 5 days.
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Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TDA8763AM/3/C4,118?
For technical support, including TDA8763AM/3/C4,118 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TDA8763AM/3/C4,118 requirements.
6.How does Aetrix verify that TDA8763AM/3/C4,118 is sourced from the original manufacturer or authorized distributors?
All TDA8763AM/3/C4,118 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TDA8763AM/3/C4,118 meets industry standards.
7.What is the process for return or replacement of TDA8763AM/3/C4,118?
All TDA8763AM/3/C4,118 units undergo pre-shipment inspection (PSI). If there is an issue with TDA8763AM/3/C4,118, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TDA8763AM/3/C4,118 part is unused and in its original packaging.
Return procedure for TDA8763AM/3/C4,118:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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