NXP Semiconductors TEA1532BT/N1/S35,1
- Part No.:
- TEA1532BT/N1/S35,1
- Manufacturer:
- NXP Semiconductors
- Category:
- PFC (Power Factor Correction)
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TEA1532BT/N1/S35,1.pdf
- Description:
- IC PFC CTRLR CCM 150KHZ 8SO
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TEA1532BT/N1/S35,1 from NXP Semiconductors is a GreenChip II primary-side flyback SMPS controller IC supporting quasi-resonant (QR) and fixed-frequency continuous conduction mode (CCM) operation. It integrates high-voltage start-up, valley-switching detection, cycle-skipping standby (<300 mW no-load), and comprehensive protection including latched OCP, OTP, brown-out, and safe-restart modes. Designed for universal-input (70–276 VAC) adapters up to 250 W.
For engineers reviewing the TEA1532BT/N1/S35,1 datasheet, TEA1532BT/N1/S35,1 pinout, TEA1532BT/N1/S35,1 application, or TEA1532BT/N1/S35,1 equivalent, key selection considerations include its SO8 (SOT96-1) package, QR/CCM dual-mode capability, 125 kHz typical oscillator frequency, 650 V drain rating, and latched PROTECT input behavior distinguishing it from the TEA1532CT variant.
Technical Context
The TEA1532BT/N1/S35,1 implements multi-mode control: QR operation with valley detection at medium-to-high load, fixed-frequency PWM in CCM when DEM is grounded, and cycle-skipping at ultra-low load. Its proprietary BCD800 process enables direct HV start-up from rectified mains via the DRAIN pin, while internal bandgap references ensure stable voltage thresholds across temperature.
Protection architecture includes latched overtemperature shutdown (trip at 140 °C), undervoltage lockout with 2.3 V hysteresis, leading-edge blanking (400 ns typ), and adjustable OCP via SENSE pin with slope compensation on CTRL. The PROTECT pin triggers latched shutdown above 2.5 V-unconditionally for TEA1532BT, unlike the CT version's safe-restart option.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Operating Input Range | 70–276 VAC universal mains; enables single-design global adapter compliance |
| Oscillator Frequency | 125 kHz typical; sets base switching rate in CCM and influences QR timing resolution |
| Drain Voltage Rating | 650 V max; supports standard 600 V MOSFETs with margin for reflected transients |
| No-Load Power | <300 mW; achieved via cycle-skipping and valley detection, meeting Energy Star Tier 2 |
| Start-up Current | 1.2 mA typical from DRAIN; enables direct HV start without auxiliary winding during power-up |
| OCP Trip Level | 0.52 V typical at SENSE; programmable peak current limit via external Rsense resistor |
| PROTECT Behavior | Latched shutdown above 2.5 V; requires VCC drop below 4.5 V to reset-no automatic recovery |
| Package | SO8 (SOT96-1); 3.9 mm body width, industry-standard footprint for compact PCB layout |
Pinout & Package
TEA1532BT/N1/S35,1 is housed in an SO8 plastic small outline package (SOT96-1), 3.9 mm body width, with standard 1.27 mm lead pitch and gull-wing leads suitable for reflow soldering.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC (Pin 1) | IC supply rail | Powered by auxiliary winding post-startup; UVLO threshold 8.7 V with 2.3 V hysteresis |
| GND (Pin 2) | Reference ground | Common return for all analog and digital blocks; separate from power ground path |
| PROTECT (Pin 3) | Latched fault input | Triggers permanent shutdown above 2.5 V; reset only when VCC drops below 4.5 V |
| CTRL (Pin 4) | Duty cycle control | 0.63 V detection threshold; inverse relationship between voltage and duty cycle (1.0–1.5 V range) |
| DEM (Pin 5) | Demagnetization timing | Enables QR mode; −50 mV threshold for brown-out detection in QR; grounded for CCM |
| SENSE (Pin 6) | Current sense input | 0.52 V typical OCP trip; includes 400 ns leading-edge blanking to reject switch noise |
| DRIVER (Pin 7) | MOSFET gate driver | −170 mA source / +700 mA sink; drives standard 1 Ω gate resistance with <150 ns valley-delay |
| DRAIN (Pin 8) | HV start-up & valley sense | 650 V rated; supplies start-up current and detects valley via ∆V/∆t (±43 V/µs) |
Key Features
| Feature | Design Value |
|---|---|
| Quasi-resonant valley switching | Reduces switching losses across 70–276 VAC input by triggering MOSFET turn-on at minimum drain voltage |
| Fixed-frequency CCM support | Enables high-current, low-voltage designs (e.g., 5 V/10 A) by grounding DEM and using internal oscillator |
| Latched overtemperature protection | Shuts down permanently at 140 °C junction; prevents thermal runaway without external supervision |
| Integrated HV start-up current source | 1.2 mA from DRAIN pin eliminates need for start-up resistor network and associated power loss |
| Cycle-skipping standby mode | Delivers <300 mW no-load input power by disabling switching cycles until load demand increases |
| Adjustable slope compensation | Prevents subharmonic oscillation in CCM >50% duty cycle via external Rslopecomp on CTRL pin |
Applications
| Adapter Power Supplies | Open-Frame Flyback PSUs |
|---|---|
Use Scenario: 12 V/3 A universal-input wall adapter for consumer electronics with strict no-load power requirements. IC Role / Device Role / Timing Role: Primary-side controller managing QR flyback topology, valley detection, and cycle-skipping to meet Energy Star Tier 2. Use Value: Achieves <300 mW no-load consumption and >85% efficiency at 50% load without auxiliary bias winding. | Use Scenario: 24 V/10 A open-frame power supply for industrial control systems requiring robust overload handling. IC Role / Device Role / Timing Role: Fixed-frequency CCM controller with latched OCP and brown-out protection for high-current stability. Use Value: Enables 70% maximum duty cycle limiting and 650 V drain rating to sustain 250 W output under line sag conditions. |
| USB-C PD Adapters | LED Driver Power Stages |
Use Scenario: Dual-output (5 V/9 V/15 V/20 V) USB-C PD adapter with dynamic voltage selection and tight cross-regulation. IC Role / Device Role / Timing Role: Multi-mode controller adapting between QR (for light loads) and CCM (for full-power negotiation) via DEM pin configuration. Use Value: Maintains <1% output voltage deviation across load steps while enabling fast transient response via valley-synchronized switching. | Use Scenario: Constant-current LED driver for architectural lighting with dimming interface and thermal foldback. IC Role / Device Role / Timing Role: Primary-side controller implementing analog dimming via CTRL pin and OTP-triggered latched shutdown for LED thermal safety. Use Value: Provides precise current regulation (±3%) and immediate fault isolation when heatsink temperature exceeds 140 °C. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar SMPS controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TEA1532CT/N1/S35,1 | Same pinout and core functionality, but PROTECT pin supports safe-restart (not latched) when CTRL < 0.63 V | Preferred for applications requiring automatic recovery after overvoltage or short-circuit faults | Select TEA1532CT if system-level fault tolerance mandates restart capability without manual intervention |
| ICE2QS03G | Fixed-frequency QR controller with integrated 650 V MOSFET; no external PROTECT pin or CCM mode | Suitable for cost-sensitive, lower-power (<65 W) adapters where integration outweighs multi-mode flexibility | Choose ICE2QS03G only for simplified BOM count in sub-65 W designs lacking CCM or latched protection needs |
Compared with TEA1532CT/N1/S35,1, the TEA1532BT/N1/S35,1 provides unconditional latched protection ideal for safety-critical systems, while ICE2QS03G trades mode flexibility for monolithic integration-making TEA1532BT/N1/S35,1 optimal for 100–250 W universal-input supplies demanding both QR efficiency and robust fault containment.
Availability
TEA1532BT/N1/S35,1 is available at Aetrix Electronics and suitable for adapter power supplies, open-frame flyback PSUs, USB-C PD adapters, and LED driver power stages requiring stable component supply and long-term design continuity.
Supply support for TEA1532BT/N1/S35,1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer markets.
The TEA1532BT/N1/S35,1 belongs to NXP's GreenChip II family of high-efficiency SMPS controllers, designed specifically for cost-effective, low-noise, energy-compliant flyback converters targeting universal-input AC/DC adapter and power supply applications.
FAQ
What is the key functional difference between TEA1532BT/N1/S35,1 and TEA1532CT/N1/S35,1?
The TEA1532BT/N1/S35,1 features unconditional latched protection on the PROTECT pin-any voltage above 2.5 V forces permanent shutdown until VCC drops below 4.5 V. In contrast, the TEA1532CT/N1/S35,1 enters safe-restart mode when CTRL < 0.63 V, allowing automatic recovery after fault removal. This makes TEA1532BT/N1/S35,1 preferable for safety-critical applications where uncontrolled restart is unacceptable.
How does TEA1532BT/N1/S35,1 achieve <300 mW no-load power consumption?
The TEA1532BT/N1/S35,1 achieves <300 mW no-load power through three coordinated green functions: (1) cycle-skipping mode disables switching pulses entirely at ultra-low load, (2) valley detection minimizes switching losses by turning on the MOSFET only at drain voltage minima, and (3) the internal start-up current source shuts off once auxiliary winding takes over, eliminating HV supply leakage. These are confirmed in Section 2.2 and Table 5 of the datasheet.
Can TEA1532BT/N1/S35,1 operate in continuous conduction mode (CCM)?
Yes, TEA1532BT/N1/S35,1 supports fixed-frequency CCM operation by grounding the DEM pin (Pin 5) and connecting DRAIN (Pin 8) to rectified input. This activates the internal oscillator and limits duty cycle to 70%, enabling high-current, low-voltage designs like 5 V/10 A adapters. CCM mode is explicitly documented in Sections 1, 2.1, and 7.9 of the datasheet.
What is the purpose of the SENSE pin (Pin 6) on TEA1532BT/N1/S35,1?
The SENSE pin (Pin 6) on TEA1532BT/N1/S35,1 serves as the primary current sensing input for cycle-by-cycle overcurrent protection. It compares the voltage across an external Rsense resistor against an internal reference (0.52 V typical) to limit peak primary current. Leading-edge blanking (400 ns) suppresses noise during MOSFET turn-on, and slope compensation via CTRL pin prevents subharmonic oscillation in CCM-details confirmed in Sections 7.6 and 7.10.
Does TEA1532BT/N1/S35,1 require an external start-up resistor?
No, TEA1532BT/N1/S35,1 does not require an external start-up resistor. Its proprietary BCD800 process integrates a 1.2 mA start-up current source connected directly to the DRAIN pin (Pin 8), enabling self-powered start-up from rectified mains voltage. This eliminates external resistor networks and associated power loss, as stated in Section 1 and Table 5 of the datasheet.
TEA1532BT/N1/S35,1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- GreenChip™ II
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Mode:
- Continuous Conduction (CCM)
- Frequency - Switching:
- 100kHz ~ 150kHz
- Current - Startup:
- 1.2 mA
- Voltage - Supply:
- 8.7V ~ 20V
- Operating Temperature:
- -25°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SO
TEA1532BT/N1/S35,1 FAQ
1.How can I place an order for TEA1532BT/N1/S35,1 through Aetrix?
Please submit a Request for Quotation (RFQ) for TEA1532BT/N1/S35,1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TEA1532BT/N1/S35,1 reliable?
The price and inventory of TEA1532BT/N1/S35,1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TEA1532BT/N1/S35,1 is usually 5 days.
3.What payment methods are accepted for TEA1532BT/N1/S35,1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TEA1532BT/N1/S35,1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TEA1532BT/N1/S35,1?
TEA1532BT/N1/S35,1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TEA1532BT/N1/S35,1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TEA1532BT/N1/S35,1?
For technical support, including TEA1532BT/N1/S35,1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TEA1532BT/N1/S35,1 requirements.
6.How does Aetrix verify that TEA1532BT/N1/S35,1 is sourced from the original manufacturer or authorized distributors?
All TEA1532BT/N1/S35,1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TEA1532BT/N1/S35,1 meets industry standards.
7.What is the process for return or replacement of TEA1532BT/N1/S35,1?
All TEA1532BT/N1/S35,1 units undergo pre-shipment inspection (PSI). If there is an issue with TEA1532BT/N1/S35,1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TEA1532BT/N1/S35,1 part is unused and in its original packaging.
Return procedure for TEA1532BT/N1/S35,1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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