NXP Semiconductors TEA1742T/N1,118
- Part No.:
- TEA1742T/N1,118
- Manufacturer:
- NXP Semiconductors
- Category:
- PFC (Power Factor Correction)
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TEA1742T/N1,118.pdf
- Description:
- IC PFC CTRLR CCM 125KHZ 8SO
- Quantity:
- Payment:

- Shipping:

Inventory:2,661
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Product details
Overview
TEA1742T/N1,118 from NXP Semiconductors is a highly integrated GreenChip PFC controller for quasi-resonant and discontinuous conduction mode boost converters. It delivers accurate dual-boost output voltage regulation, valley/zero-voltage switching, and programmable overcurrent protection - enabling cost-effective, high-efficiency (up to 500 W) AC-DC front-end designs in PC power supplies and industrial SMPS.
For engineers reviewing the TEA1742T/N1,118 datasheet, TEA1742T/N1,118 pinout, TEA1742T/N1,118 application, or TEA1742T/N1,118 equivalent, this page provides verified functional context, validated pin-level design meanings, confirmed green-mode timing behavior, and real-world alternative selection guidance for PFC controller replacement or second-sourcing.
Technical Context
The TEA1742T/N1,118 implements ton-controlled quasi-resonant PFC with valley detection via the PFCAUX pin, using demagnetization timing to trigger MOSFET turn-on at minimum drain-source voltage. Its internal compensation circuit on VINSENSE maintains constant loop bandwidth across 70–276 VAC mains input, ensuring stable Class-D harmonic compliance.
Protection is implemented through latched OTP (140 °C trip), cycle-by-cycle OCP via PFCSENSE (0.52 V typical sense threshold), and open-loop detection on VOSENSE (1.15 V threshold). The PFCDRIVER delivers −0.5 A source / +1.2 A sink capability for fast MOSFET gate drive with 11 V max output swing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Max Output Power | 500 W - supports full-range PFC stage design without auxiliary controllers or external compensation networks |
| Input Voltage Range | 70–276 VAC - universal mains operation with built-in brownout lockout (0.89 V stop threshold on VINSENSE) |
| Switching Frequency | Up to 125 kHz max - frequency-limited to reduce EMI and transformer losses; switches to DCM above fsw(PFC)max |
| OCP Threshold | 0.52 V typical on PFCSENSE - enables precise peak current limiting with external sense resistor RSENSE1 |
| VOSENSE Regulation | 2.500 V ±25 mV - tight output voltage reference for dual-boost PFC output setting and OVP (2.63 V trip) |
| Driver Capability | −0.5 A source / +1.2 A sink on PFCDRIVER - ensures fast MOSFET turn-on/turn-off with minimal switching loss |
| Thermal Protection | 140 °C latch trip with 10 K hysteresis - prevents thermal runaway; reset requires VCC drop below 4 V |
Pinout & Package
TEA1742T/N1,118 is housed in an SO8 package (SOT96-1): plastic small outline, 8-lead, 3.9 mm body width, JEDEC MS-012 compliant, with 150 K/W junction-to-ambient thermal resistance in free air.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pin 1) | Reference ground | Primary return path for all internal circuits and external sense signals; must be low-impedance PCB plane |
| VINSENSE (Pin 2) | Mains voltage sensing input | Measures average rectified AC input for mains compensation; triggers UVLO (0.89 V) and dual-boost switch-over (2.2 V) |
| PFCCOMP (Pin 3) | Loop compensation node | Accepts RC network to set PFC regulation bandwidth; clamped at 2.7 V (low-power) and 3.9 V (active) |
| PFCAUX (Pin 4) | Demagnetization & valley detection | Detects transformer secondary stroke end and MOSFET valley point; timeout thresholds at 4 µs (demag) and 6 µs (valley) |
| VOSENSE (Pin 5) | PFC output voltage feedback | Sets regulated bus voltage; enables open-loop protection (1.15 V threshold) and OVP (2.63 V trip) |
| PFCSENSE (Pin 6) | Current sense input | Monitors MOSFET source voltage for cycle-by-cycle OCP; soft-start current sourced at −60 µA |
| PFCDRIVER (Pin 7) | Gate driver output | Drives external PFC MOSFET gate; −0.5 A source / +1.2 A sink; 11 V max swing; blanked during leading edge (310 ns) |
| VCC (Pin 8) | Supply voltage input | Starts at 10.6 V; UVLO hysteresis 0.3 V; latched protection resets below 4 V; max rating 38 V |
Key Features
| Feature | Design Value |
|---|---|
| Dual-boost PFC output modulation | Adjusts PFC bus voltage based on mains level (2.2 V VINSENSE threshold), reducing conduction loss at low line while maintaining regulation accuracy |
| Valley-switching with demagnetization detection | Uses PFCAUX pin to detect transformer reset and MOSFET valley point, minimizing switching loss and EMI without external resonant components |
| Integrated soft-start on PFCSENSE | −60 µA internal current charges external capacitor to ramp primary peak current smoothly, eliminating audible transformer noise at startup |
| Programmable OCP with blanking | 310 ns leading-edge blanking on PFCSENSE prevents false triggering from switching spikes; OCP threshold adjustable via RSENSE1 |
| Accurate mains-compensated control loop | VINSENSE-based correction maintains constant loop bandwidth across full 70–276 VAC range, ensuring fast transient response and Class-D compliance |
Applications
| PC Power Supplies | Industrial SMPS |
|---|---|
Use Scenario: ATX-compliant 350–500 W power supplies requiring >90% efficiency and EN 61000-3-2 Class-D compliance. IC Role / Device Role / Timing Role: Primary PFC controller managing boost stage timing, valley detection, and dual-boost voltage scaling. Use Value: Reduces external component count by eliminating separate OVP, OTP, and compensation ICs while maintaining full protection coverage. |
Use Scenario: DIN-rail mounted 400 W industrial AC-DC converters operating in wide ambient temperature ranges. IC Role / Device Role / Timing Role: Standalone PFC front-end controller with latched OTP and brownout recovery for unattended operation. Use Value: Enables reliable start-up and fault recovery under unstable grid conditions (e.g., 70 VAC brownout) without system reset. |
| LED Driver Front-Ends | Medical Equipment PSUs |
Use Scenario: High-power LED drivers for street lighting where PFC stage must meet IEC 61000-3-2 Class-C limits. IC Role / Device Role / Timing Role: Quasi-resonant PFC controller synchronizing MOSFET gate drive with valley points detected on PFCAUX. Use Value: Achieves <10% THD at full load via ton control and mains-compensated loop, avoiding costly post-PFC filtering. |
Use Scenario: Auxiliary power supplies in diagnostic imaging equipment requiring high reliability and low EMI. IC Role / Device Role / Timing Role: Protected PFC controller with open-loop detection (VOSENSE) and safe-restart mode for fault containment. Use Value: Prevents unregulated bus voltage during feedback loop failure, meeting IEC 60601-1 creepage and safety margin requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PFC controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ICE2PCS01G | Fixed-frequency CCM PFC controller; no valley switching; requires external OVP and OTP circuits | Better suited for lower-cost, fixed-line applications where EMI filtering budget allows higher switching noise | Select when board space permits additional protection components and quasi-resonant operation is not required |
| UCC28070 | Interleaved dual-channel CCM controller; 115 VAC min input; no integrated dual-boost or VINSENSE compensation | Targets high-power (>750 W), low-THD systems with interleaving benefits; lacks single-stage simplicity | Choose for >600 W designs needing interleaved ripple cancellation, not for compact 500 W quasi-resonant solutions |
Compared with ICE2PCS01G and UCC28070, the TEA1742T/N1,118 uniquely integrates valley detection, dual-boost voltage scaling, and mains-compensated loop control in an SO8 package - delivering lower BOM count and superior light-load efficiency for 500 W universal-input PFC stages.
Availability
TEA1742T/N1,118 is available at Aetrix Electronics and suitable for PC power supplies, industrial SMPS, LED driver front-ends, and medical auxiliary PSUs requiring stable component supply and long-term lifecycle support.
Supply support for TEA1742T/N1,118 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer applications.
The TEA1742T/N1,118 belongs to NXP's GreenChip PFC controller product line, designed specifically for high-efficiency, low-component-count AC-DC power factor correction in universal-input 350–500 W power supplies.
FAQ
What is the minimum mains input voltage supported by the TEA1742T/N1,118?
The TEA1742T/N1,118 supports universal mains input from 70 VAC to 276 VAC. Its VINSENSE pin detects brownout conditions and stops PFC operation when the sensed voltage drops below 0.89 V (typical), corresponding to ~70 VAC after rectification and scaling. This ensures reliable operation during low-line grid events without latch-up.
How does the TEA1742T/N1,118 implement valley switching without external resonant components?
The TEA1742T/N1,118 uses its PFCAUX pin to monitor the auxiliary winding voltage for transformer demagnetization completion and MOSFET drain-source valley detection. Internal comparators with −100 mV threshold and 4 µs demagnetization timeout enable self-timed valley switching - eliminating need for external resonant capacitors or timing ICs.
What protection features are integrated into the TEA1742T/N1,118?
The TEA1742T/N1,118 integrates six protection functions: latched OverTemperature Protection (140 °C), cycle-by-cycle OverCurrent Protection (0.52 V threshold on PFCSENSE), OverVoltage Protection (2.63 V on VOSENSE), open-loop detection (1.15 V VOSENSE threshold), mains undervoltage lockout (0.89 V VINSENSE), and safe-restart mode for fault recovery.
Can the TEA1742T/N1,118 be used in discontinuous conduction mode (DCM)?
Yes - the TEA1742T/N1,118 operates in both quasi-resonant and discontinuous conduction modes. When the calculated switching frequency exceeds 125 kHz (fsw(PFC)max), it automatically transitions to DCM while retaining valley-switching behavior. This ensures consistent efficiency and EMI performance across load and line variations.
What is the purpose of the dual-boost feature in the TEA1742T/N1,118?
The dual-boost feature modulates the PFC output voltage based on mains input level: at low line (<2.2 V on VINSENSE), the VOSENSE pin sources 8 mA to lower the regulated bus voltage, reducing conduction loss; at high line, current ceases, allowing maximum bus voltage. This improves overall efficiency across the full input range without compromising regulation accuracy.
TEA1742T/N1,118 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- GreenChip™
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Mode:
- Continuous Conduction (CCM)
- Frequency - Switching:
- 125kHz
- Current - Startup:
- 60 µA
- Voltage - Supply:
- 10.6V ~ 38V
- Operating Temperature:
- -20°C ~ 150°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SO
TEA1742T/N1,118 FAQ
1.How can I place an order for TEA1742T/N1,118 through Aetrix?
Please submit a Request for Quotation (RFQ) for TEA1742T/N1,118 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TEA1742T/N1,118 reliable?
The price and inventory of TEA1742T/N1,118 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TEA1742T/N1,118 is usually 5 days.
3.What payment methods are accepted for TEA1742T/N1,118?
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4.How is shipping managed for TEA1742T/N1,118?
TEA1742T/N1,118 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TEA1742T/N1,118 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TEA1742T/N1,118?
For technical support, including TEA1742T/N1,118 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TEA1742T/N1,118 requirements.
6.How does Aetrix verify that TEA1742T/N1,118 is sourced from the original manufacturer or authorized distributors?
All TEA1742T/N1,118 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TEA1742T/N1,118 meets industry standards.
7.What is the process for return or replacement of TEA1742T/N1,118?
All TEA1742T/N1,118 units undergo pre-shipment inspection (PSI). If there is an issue with TEA1742T/N1,118, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TEA1742T/N1,118 part is unused and in its original packaging.
Return procedure for TEA1742T/N1,118:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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