NXP Semiconductors TEA1892ATS/1Z

Overview

TEA1892ATS/1Z from NXP Semiconductors is a synchronous rectifier (SR) controller IC for secondary-side DCM and quasi-resonant flyback converters, fabricated in Silicon-On-Insulator (SOI) process. It delivers accurate SR timing with Vact(drv) = −220 mV (typ), driver output voltage up to 10 V (typ), and selectable regulation level (−42 mV or −30 mV) via SELREG pin - enabling high-efficiency adapter designs with minimal external components.

For engineers reviewing the TEA1892ATS/1Z datasheet, TEA1892ATS/1Z pinout, TEA1892ATS/1Z application, or TEA1892ATS/1Z equivalent, this page provides verified functional parameters, TSOP6 package mapping, zero-current switch-off behavior, UVLO thresholds (8.5 V start-up, 8.0 V stop), and real-world design implications for flyback SR stage optimization.

Technical Context

The TEA1892ATS/1Z implements adaptive synchronous rectification by sensing negative voltage excursions on the SRSENSE pin to trigger MOSFET gate drive, with blanking time (tact(sr)(min) = 0.8 μs) to suppress ringing-induced false turn-off. Its internal timer-coupled driver ensures fast switching: 400 mA source / 2.7 A sink capability enables rapid MOSFET turn-on and zero-current turn-off detection at Vdeact(drv) = −12 mV (typ).

Supply management uses an on-chip bandgap reference for temperature-stable operation; UVLO hysteresis (0.5 V typ) prevents oscillation near threshold, while SELREG pin selection (grounded vs. open) sets Vreg(drv) to −42 mV or −30 mV - directly determining conduction loss trade-offs in low-RDS(on) MOSFETs.

Key Specifications

Pinout & Package

TEA1892ATS/1Z is housed in a TSOP6 (SOT457) plastic surface-mounted package with 6 leads, optimized for compact adapter PCB layouts and thermal performance (Rth(j-a) = 259 K/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous rectifier controller applications.

Compared with NCP4306DR2G and IRS21531DPBF, the TEA1892ATS/1Z uniquely offers user-selectable regulation voltage, SOI-based dv/dt immunity, and integrated zero-current detection - making it optimal for cost-sensitive, high-efficiency DCM/QRFlyback adapters where flexibility and thermal robustness are prioritized over ultra-high frequency operation.

Availability

TEA1892ATS/1Z is available at Aetrix Electronics and suitable for USB-C PD adapters, industrial SMPS, and universal AC/DC wall adapters requiring stable component supply, long-term lifecycle support, and RoHS-compliant sourcing.

Supply support for TEA1892ATS/1Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer applications.

The TEA1892ATS/1Z belongs to NXP's GreenChip family of high-efficiency power conversion ICs, designed specifically to reduce energy waste in low-to-mid power AC/DC adapters and offline SMPS through intelligent synchronous rectification and ultra-low quiescent current.

FAQ

What is the function of the SELREG pin on the TEA1892ATS/1Z?

The SELREG pin on the TEA1892ATS/1Z selects the driver regulation voltage (Vreg(drv)): grounding it sets Vreg(drv) to −42 mV (typ), while leaving it open selects −30 mV (typ). This adjustment directly impacts MOSFET conduction duration and conduction loss trade-offs - critical for optimizing efficiency across varying load and RDS(on) conditions. The internal 10 µA pull-up ensures reliable open-state detection without external biasing.

How does the TEA1892ATS/1Z achieve zero-current switch-off?

The TEA1892ATS/1Z achieves zero-current switch-off by monitoring the SRSENSE pin for a voltage rise to Vdeact(drv) = −12 mV (typ), which corresponds to the point where secondary current reaches zero. Upon detection, the DRIVER output is actively pulled low, turning off the SR MOSFET precisely at current zero-crossing. This eliminates reverse recovery losses and removes the need for a separate standby mode, enabling <75 mW no-load consumption in compliant adapters.

What is the maximum switching frequency supported by the TEA1892ATS/1Z?

The TEA1892ATS/1Z supports a maximum switching frequency of 400 kHz, as specified in its Characteristics table. This limit is determined by internal timing resolution, driver slew rate, and blanking window duration (0.8 μs). Operation beyond 400 kHz risks insufficient time for accurate zero-current detection and may cause premature or delayed MOSFET turn-off, reducing efficiency and increasing thermal stress on the SR MOSFET.

Can the TEA1892ATS/1Z be used with high-side or low-side SR MOSFET configurations?

Yes, the TEA1892ATS/1Z supports both high-side and low-side synchronous rectification configurations, as confirmed by Figures 4 and 5 in the official datasheet. In high-side configuration, SRSENSE connects to the cathode of the secondary winding; in low-side, it connects to the source of the SR MOSFET. The IC's ground-referenced architecture and wide VCC range (8.5–38 V) ensure compatibility with either topology without modification.

What thermal considerations apply to the TEA1892ATS/1Z in continuous operation?

The TEA1892ATS/1Z has a maximum junction temperature of +150 °C and a thermal resistance from junction-to-ambient (Rth(j-a)) of 259 K/W on a JEDEC test board. For continuous operation at full load, PCB layout must include adequate copper pour under the TSOP6 package and thermal vias to inner layers. Total power dissipation must remain below 0.27 W (Ptot) - achievable with proper heatsinking and ambient temperature control below +80 °C.