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NXP Semiconductors TEA19051BABTK/1J
- Part No.:
- TEA19051BABTK/1J
- Manufacturer:
- NXP Semiconductors
- Category:
- Controllers
- Package:
- 16-VDFN Exposed Pad
- Datasheet:
-
TEA19051BABTK/1J.pdf
- Description:
- IC SMPS CTRLR SMART CHRG HVSON16
- Quantity:
- Payment:
- Shipping:
Inventory:3,900
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Product details
Overview
TEA19051BABTK/1J from NXP Semiconductors is a secondary-side USB-PD 3.0 and QC4+ controller IC for AC-DC SMPS, supporting programmable power supply (PPS), constant voltage (CV) regulation with <2% accuracy, constant current (CC) control with <2% full-load accuracy, and integrated NMOS gate drive via SW pin. It enables high-efficiency, low-no-load-power (<30 mW) USB-C chargers for smartphones and tablets.
For engineers reviewing the TEA19051BABTK/1J datasheet, TEA19051BABTK/1J pinout, TEA19051BABTK/1J application, or TEA19051BABTK/1J equivalent, key selection considerations include its HVSON16 package, hardware-enforced protections (OTP, OVP, OSP), MTP-programmable PDOs (up to 7, including 4 PPS), dual GPIO temperature sensing, and single-optocoupler feedback architecture compatible with TEA193x primary and TEA199x SR controllers.
Technical Context
The TEA19051BABTK/1J integrates a USB-PD PHY, Type-C CC1/CC2 detection logic, DP/DM QC interface, 12-bit CV DAC and 10-bit CC DAC, embedded MCU with ROM/RAM/MTP, charge pump for NMOS gate drive, and fast-discharge DISCH sink. Its analog control loops regulate output via VSNS (voltage sense) and ISNS (current sense) inputs with external resistor dividers and shunts.
All critical protections-including overtemperature (internal + two external), adaptive OVP/UVP, OCP, UVLO, OSP, OSUP, OGP, and CC-pin soft-short-are implemented in hardware and configurable as latched or safe-restart via MTP. The device supports vSafe0V discharge compliance and hard-reset sequencing without software dependency.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Protocol Support | USB-PD 2.0/3.0 (including PPS), QC2.0/QC3.0/QC4+, BC1.2, USB Type-C v1.3 |
| Output Voltage Range | 2.9 V to 21 V; CV accuracy better than ±2 % across full range |
| Output Current Accuracy | CC mode accuracy better than ±2 % at full load; 10-bit DAC resolution |
| No-Load Power | <30 mW system-level consumption with TEA193x/TEA199x companion ICs |
| Protection Architecture | Hardware-implemented OTP, OVP, UVP, OCP, UVLO, OSP, OSUP, OGP, CC-pin soft short |
| Package & Pin Count | HVSON16 (SOT1308-1), 3.5 × 5.5 × 0.85 mm, 16-pin + exposed pad (EDP) |
| MTP Memory | Non-volatile multi-time programmable memory storing up to 7 PDOs (4 PPS-capable), cable compensation, GPIO functions, VID/PID |
Pinout & Package
HVSON16 package (SOT1308-1) with 3.5 × 5.5 × 0.85 mm footprint and exposed die pad (EDP) for thermal dissipation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | Supply input | Secondary-side DC supply (up to 21 V); powers internal circuits and triggers UVLO/OVP/UVP |
| OPTO | Optocoupler driver output | Replaces TL431 cathode; drives optocoupler LED to regulate primary-side controller |
| SGND | Sense ground reference | Isolated ground return for ISNS and VSNS to avoid noise coupling into feedback paths |
| GPIO1 / GPIO2 | Configurable I/O | Selectable NTC thermistor interface (adapter/cable temp), NTC+OTP, or I2C slave supply |
| ISNS | Current sense input | Accepts mΩ-shunt voltage (×50 gain); enables CC regulation and OCP with 2–22.5 mΩ resistor options |
| VSNS | Voltage sense input | Resistive divider input for CV loop; reference-matched to MTP-programmed PDO max voltage (e.g., 1/8.325 for ≤20 V) |
| SCL / SDA | I²C interface | Host communication for MTP programming, VDM exchange, and real-time parameter readback |
| DM / DP | QC protocol interface | Dedicated pins for Qualcomm QuickCharge handshake and voltage negotiation (QC2.0/QC3.0/QC4+) |
| CC1 / CC2 | Type-C CC line interface | Hardware-based attach/detach detection and USB-PD packet communication per USB-C spec |
| DISCH | Fast discharge sink | Internal low-RON switch + external resistor enables vSafe0V compliance (≤0.8 V) during hard reset |
| GND | Power ground | Main system ground reference; separate from SGND to maintain signal integrity |
| SW | NMOS gate driver | Charge-pump boosted output (VCC + 6 V) directly drives external load-switch NMOS gate |
| EDP | Exposed die pad | Thermal conduction path to PCB; must be soldered to copper pour for OTP margin and power handling |
Key Features
| Feature | Design Value |
|---|---|
| Integrated USB-PD + QC protocol stack | Single-chip support for USB-PD 3.0 (PPS), QC4+, BC1.2, and Type-C v1.3 without external microcontroller |
| Hardware safety architecture | All critical protections (OTP, OVP, OSP, etc.) implemented in analog/hardware logic-functional even if MCU stalls |
| Programmable power delivery | Up to 7 MTP-stored PDOs, including 4 PPS profiles with 20 mV/step voltage and 50 mA/step current resolution |
| Dual NTC temperature monitoring | GPIO1/GPIO2 support adaptive-current NTC biasing for ±5 °C accuracy from 0 °C to >120 °C (47 kΩ, β=4108) |
| Low-component-count SMPS design | Only one optocoupler required for primary-side regulation; ~15 total external components for full USB-C PD charger |
| Ultra-low no-load power | <30 mW system-level standby consumption achieved via intelligent circuit gating and deep-sleep modes pre-attach |
Applications
| Smartphone Fast Charging Adapter | Tablet USB-C PD Power Brick |
|---|---|
Use Scenario: Wall-mounted 45 W adapter delivering 9 V @ 3 A or 15 V @ 3 A to flagship Android smartphones using QC4+ or USB-PD PPS. IC Role / Device Role / Timing Role: Secondary-side protocol controller managing voltage/current negotiation, CV/CC regulation, load switching, and thermal monitoring via GPIO1 (cable connector) and GPIO2 (adapter). Use Value: Enables CoC Tier-2/EuP Lot 6 compliance with <30 mW no-load power and hardware-enforced safety during cable hot-plug/unplug cycles. | Use Scenario: Compact 65 W USB-C PD charger for premium tablets requiring precise 20 V @ 3.25 A delivery with dynamic cable compensation. IC Role / Device Role / Timing Role: Central SMPS controller executing USB-PD 3.0 contract negotiation, real-time current/voltage measurement (via ISNS/VSNS), and fast Vbus ramp-down using DISCH pin and parabolic discharge algorithm. Use Value: Delivers <2% CV/CC accuracy across full load range while maintaining vSafe0V discharge compliance and preventing undershoot during PDO transitions. |
| Multi-Protocol Laptop Charger | Universal QC/PD Travel Adapter |
Use Scenario: Dual-port 100 W GaN-based laptop charger supporting simultaneous USB-PD (for MacBook) and QC4+ (for Android notebook) outputs. IC Role / Device Role / Timing Role: Protocol arbitration engine selecting optimal PDO based on connected device identity (VID/PID from MTP), managing independent CC1/CC2 and DP/DM interfaces, and coordinating load-switch timing with TEA199x SR controller. Use Value: Eliminates need for discrete protocol translators; supports vendor-defined messages (VDMs) for firmware updates and custom power profiles. | Use Scenario: Foldable travel adapter accepting global AC inputs and delivering adaptive 5–20 V output to diverse devices (smartphones, earbuds, smartwatches) via single USB-C port. IC Role / Device Role / Timing Role: Intelligent power manager configuring MTP-stored PDOs on-the-fly, enabling cable compensation per device type, and triggering OTP shutdown if GPIO2 detects >111 °C adapter temperature. Use Value: Reduces BOM cost by integrating charge pump, DISCH driver, USB-PD PHY, and MCU-replacing ≥5 discrete ICs in legacy designs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar USB-PD and QC controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STUSB4500QTR | Standalone USB-PD 3.0 sink controller only; lacks QC protocol support, integrated NMOS driver, and DISCH pin | Requires external MCU for QC compatibility and separate load-switch driver; no built-in cable compensation or GPIO temperature sensing | Choose when USB-PD-only operation suffices and system already includes QC-handling logic |
| MPQ4282GQ-A | Monolithic USB-PD 3.0 + QC3.0 controller with integrated 60 V/10 A MOSFET; no MTP storage for custom PDOs or VDM support | Fixed PDO set; no PPS capability; limited GPIO flexibility; higher RDS(on) increases conduction loss above 3 A | Prefer for cost-sensitive, lower-power (<30 W) designs where field-upgradable PDOs are unnecessary |
Compared with STUSB4500QTR and MPQ4282GQ-A, the TEA19051BABTK/1J uniquely combines USB-PD 3.0 PPS, QC4+, BC1.2, and Type-C v1.3 in one MTP-configurable IC with hardware safety, dual NTC support, and direct NMOS/SW drive-enabling compact, certified, multi-protocol chargers with minimal external components.
Availability
TEA19051BABTK/1J is available at Aetrix Electronics and suitable for smartphone fast charging adapters, tablet USB-C PD power bricks, and universal QC/PD travel adapters requiring stable component supply, long-term lifecycle support, and compliance with CoC Tier-2, EuP Lot 6, and DOE Level VI efficiency standards.
Supply support for TEA19051BABTK/1J includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and consumer electronics, with core expertise in power management, USB protocols, and embedded security.
The TEA19051BABTK/1J belongs to NXP's TEA190xx family of highly integrated secondary-side SMPS controllers, designed specifically to replace TL431-based feedback systems in high-efficiency, multi-protocol USB-C chargers targeting smartphone, tablet, and laptop markets.
FAQ
What USB-PD and QC protocols does the TEA19051BABTK/1J support?
The TEA19051BABTK/1J supports USB-PD 2.0 and 3.0-including Programmable Power Supply (PPS)-Qualcomm QuickCharge QC2.0, QC3.0, and QC4+, Battery Charging 1.2 (BC1.2), and USB Type-C v1.3. It implements all protocol layers in hardware/firmware and stores up to seven programmable power data objects (PDOs) in non-volatile MTP memory, with four configurable as PPS profiles. The TEA19051BABTK/1J also supports unstructured vendor-defined messages (VDMs) for custom identification and firmware updates.
How does the TEA19051BABTK/1J achieve <30 mW no-load power?
The TEA19051BABTK/1J achieves <30 mW system-level no-load power through intelligent circuit gating: only essential blocks (CC-line monitoring, UVLO, basic clock) remain active before device attach; GPIOs enter low-power NTC biasing mode; and the DISCH pin applies only 1 mA sink when idle. Combined with optimized HVSON16 thermal design and efficient charge pump, this enables compliance with CoC Tier-2, EuP Lot 6, and DOE Level VI standards. The TEA19051BABTK/1J maintains this performance when paired with TEA193x primary and TEA199x SR controllers.
What is the role of the SW and DISCH pins on the TEA19051BABTK/1J?
The SW pin is a charge-pump boosted (VCC + 6 V) NMOS gate driver that directly controls an external load-switch transistor between VCC and Vbus, enabling precise on/off timing and fast turn-on. The DISCH pin integrates a low-RON internal switch and supports external current-limiting resistors to discharge Vbus rapidly-ensuring vSafe0V compliance (<0.8 V) during USB-PD hard resets. Its millisecond-gated sampling mechanism verifies true Vbus voltage during discharge, preventing false termination. Both pins are essential for safety-critical USB-C adapter behavior and are fully hardware-managed in the TEA19051BABTK/1J.
Can the TEA19051BABTK/1J be used with non-NXP primary controllers?
Yes, the TEA19051BABTK/1J can interface with non-NXP primary controllers via its standard optocoupler feedback architecture: the OPTO pin drives the optocoupler LED, and the VSNS/ISNS pins provide analog voltage/current feedback signals. However, full safety and efficiency benefits-including coordinated burst-mode operation, adaptive dead-time control, and seamless fault reporting-are optimized when used with NXP's TEA193x QR/DCM primary controllers and TEA199x synchronous rectifier ICs. The TEA19051BABTK/1J remains functionally complete and compliant with USB-PD and QC standards regardless of primary-side choice.
How are GPIO1 and GPIO2 configured for temperature sensing on the TEA19051BABTK/1J?
GPIO1 and GPIO2 on the TEA19051BABTK/1J are configured via MTP to operate as NTC thermistor interfaces with adaptive current sourcing (15 µA / 60 µA / 240 µA) for accurate temperature measurement. GPIO1 is typically assigned to monitor cable/connector temperature using a 47 kΩ NTC (β = 4108), while GPIO2 monitors adapter temperature. The internal ADC digitizes the NTC voltage, and firmware calculates temperature with <5 °C accuracy from 0 °C to >120 °C. An optional OTP threshold (62–111 °C) can be programmed per GPIO. Unused GPIOs must be grounded with a 47 kΩ resistor-not left floating-to prevent malfunction. This configuration is stored in MTP and persists across power cycles.
TEA19051BABTK/1J Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 16-VDFN Exposed Pad
- Programmable:
- Not Verified
- Protocol:
- USB
- Function:
- Controller
- Interface:
- USB
- Standards:
- USB 2.0, USB 3.0
- Voltage - Supply:
- 2.9V ~ 21V
- Current - Supply:
- 3mA
- Operating Temperature:
- -20°C ~ 105°C (TJ)
- Supplier Device Package:
- 16-HVSON (3.5x5.5)
- Grade:
- -
- Qualification:
- -
TEA19051BABTK/1J FAQ
1.How can I place an order for TEA19051BABTK/1J through Aetrix?
Please submit a Request for Quotation (RFQ) for TEA19051BABTK/1J on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TEA19051BABTK/1J reliable?
The price and inventory of TEA19051BABTK/1J are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TEA19051BABTK/1J is usually 5 days.
3.What payment methods are accepted for TEA19051BABTK/1J?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TEA19051BABTK/1J transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TEA19051BABTK/1J?
TEA19051BABTK/1J orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TEA19051BABTK/1J order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TEA19051BABTK/1J?
For technical support, including TEA19051BABTK/1J datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TEA19051BABTK/1J requirements.
6.How does Aetrix verify that TEA19051BABTK/1J is sourced from the original manufacturer or authorized distributors?
All TEA19051BABTK/1J products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TEA19051BABTK/1J meets industry standards.
7.What is the process for return or replacement of TEA19051BABTK/1J?
All TEA19051BABTK/1J units undergo pre-shipment inspection (PSI). If there is an issue with TEA19051BABTK/1J, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TEA19051BABTK/1J part is unused and in its original packaging.
Return procedure for TEA19051BABTK/1J:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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