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NXP Semiconductors TEA19051BAHTK/1J

Part No.:
TEA19051BAHTK/1J
Manufacturer:
NXP Semiconductors
Category:
Controllers
Package:
16-VDFN Exposed Pad
Datasheet:
AetrixTEA19051BAHTK/1J.pdf
Description:
SMARTCHARG PROTOC CONTR QC4
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:3,482

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Product details

Overview

TEA19051BAHTK/1J from NXP Semiconductors is a secondary-side USB-PD 3.0 and QC4+ programmable controller for AC-DC SMPS, supporting CV/CC regulation with ±2 % output voltage and current accuracy, 2.9 V–21 V output range, and integrated USB-PD PHY, charge pump gate driver (SW pin), and fast discharge (DISCH pin) for Type-C compliance. It enables compact, CoC Tier-2/EuP IoT6-compliant chargers.

For engineers reviewing the TEA19051BAHTK/1J datasheet, TEA19051BAHTK/1J pinout, TEA19051BAHTK/1J application, or TEA19051BAHTK/1J equivalent, key selection criteria include its HVSON16 package, hardware-enforced protections (OTP/OVP/OCP/OSP), MTP-configurable PDOs (up to 7, including PPS), GPIO-based thermal monitoring, and single-optocoupler feedback architecture.

Technical Context

The TEA19051BAHTK/1J implements dual-loop regulation: a voltage loop using VSNS input and OPTO-driven optocoupler interface (analogous to TL431), and a current loop using ISNS input with 50× gain amplifier and 10-bit DAC control. Its embedded MCU executes USB-PD 3.0 and QC4+ protocol stacks while offloading safety-critical protections-including adaptive OVP, latched OTP, and hardware-based OSP-to dedicated analog circuitry independent of firmware execution.

It integrates a USB-PD physical layer with CC1/CC2 detection and communication, DP/DM interfaces for BC1.2 and QC2.0–QC3.0, and supports unstructured VDMs for vendor ID exchange and MTP programming. The SW pin delivers VCC + 6 V gate drive via internal charge pump, while DISCH provides controlled Vbus ramp-down meeting vSafe0V requirements.

Key Specifications

ParameterValue and Actual Design Meaning
Output Voltage Range2.9 V to 21 V; supports multi-PDO negotiation and PPS for dynamic adjustment in USB-PD 3.0 applications.
CV/CC AccuracyBetter than ±2 % for both voltage and full-load current; enables precise power delivery without external calibration.
No-Load Power< 30 mW system-level; meets CoC Tier-2, EuP IoT6, and DOE Level VI efficiency mandates.
Protocol SupportUSB-PD 2.0/3.0 (including PPS), QC2.0/QC3.0/QC4+, BC1.2, USB Type-C v1.3; all implemented in hardware-assisted firmware.
Protection ArchitectureHardware-enforced OTP (internal + 2 external), OVP, UVP, OCP, OSP, OSUP, OGP; configurable latched or auto-restart behavior via MTP.
Package & Pin CountHVSON16 (SOT1308-1), 3.5 × 5.5 × 0.85 mm; 16 signal pins + exposed die pad (EDP); optimized for reflow soldering and high-density layouts.
MTP MemoryNon-volatile multi-time programmable memory storing up to 7 PDOs, cable compensation settings, GPIO functions, and VID/PID/BCD identifiers.

Pinout & Package

HVSON16 package (SOT1308-1) with 3.5 × 5.5 × 0.85 mm body and exposed die pad (EDP) for thermal dissipation. Pin 17 (EDP) must be soldered to PCB ground plane for optimal thermal performance and EMI suppression.

Pin/TerminalCircuit RoleDesign Meaning
VCCSupply inputSecondary-side DC supply (up to 21 V); powers internal circuits and enables UVLO-based startup sequencing.
OPTOOptocoupler driver outputDrives optocoupler LED to regulate primary-side controller; replaces TL431 in feedback loop.
SGNDSense ground referenceIsolated ground return for ISNS and VSNS; prevents noise coupling into precision sensing paths.
ISNSCurrent sense inputAccepts mΩ-shunt voltage (2–22.5 mΩ); 50× internal gain enables accurate CC-mode regulation.
VSNSVoltage sense inputMonitors scaled output voltage via resistor divider; sets CV reference with 12-bit DAC resolution.
SCL/SDAI²C interfaceConfigures MTP parameters and reads telemetry (temperature, voltage, current) during development or field updates.
CC1/CC2Type-C configuration channelDetects attach/detach and handles USB-PD message exchange; hardware-implemented for fail-safe vSafe5V recovery.
DP/DMData line interfaceSupports BC1.2 enumeration and QC2.0/QC3.0 voltage negotiation; disconnected to disable QC during USB-PD certification.
SWNMOS gate driverDelivers VCC + 6 V output via internal charge pump; directly drives low-side NMOS load switch without external level shifter.
DISCHFast discharge sinkActivates internal low-RDS(on) switch to discharge Vbus through external resistor; ensures vSafe0V within USB-PD hard reset timing.
GPIO1/GPIO2Configurable I/OProgrammable as NTC thermistor inputs (adapter/cable temp), NTC+OTP, or I²C slave supply; adaptive current sourcing enables ±5 °C accuracy.

Key Features

FeatureDesign Value
Dual-loop CV/CC regulation12-bit DAC for voltage (12.5 mV step), 10-bit DAC for current (20 mA step); enables fine-grained, stable power delivery across PDOs.
Hardware-enforced safetyAll critical protections (OTP/OVP/OCP/OSP) implemented in analog logic; remain active even if MCU freezes or MTP is corrupted.
USB-PD 3.0 PPS supportFour of seven MTP-programmable PDOs can be configured as PPS; enables 20 mV/step voltage and 50 mA/step current adjustments for battery charging optimization.
Thermal-aware designTwo GPIO pins support NTC-based temperature sensing at adapter and connector; values reportable via VDM for thermal throttling or diagnostics.
Low-component-count topologyOnly ≈15 external components required; eliminates need for discrete op-amps, references, or protection ICs in certified USB-PD/QC designs.

Applications

Smartphone Fast Charging AdapterMulti-Protocol Laptop Charger

Use Scenario: Wall-mounted 45 W USB-C charger delivering 9 V/3 A (QC3.0) or 15 V/3 A (USB-PD 3.0 PPS) to flagship smartphones.

IC Role / Device Role / Timing Role: Secondary-side protocol controller managing PDO negotiation, CV/CC regulation, thermal foldback, and Vbus discharge during detach.

Use Value: Enables single-chip compliance with USB-PD 3.0, QC4+, and BC1.2-reducing BOM cost by 30 % versus discrete controller + PD PHY + SR driver solutions.

Use Scenario: Compact 65 W GaN-based laptop adapter supporting simultaneous USB-PD 3.0 PPS (20 V/3.25 A) and legacy QC3.0 fallback for peripherals.

IC Role / Device Role / Timing Role: Central SMPS controller coordinating primary-side TEA193x and secondary-side TEA199x SR, while enforcing hardware-level overtemperature shutdown during sustained high-power operation.

Use Value: Achieves <30 mW no-load power and >94 % peak efficiency at 230 VAC input-meeting EU CoC Tier-2 and California Title 20 requirements without auxiliary flyback.

USB-C Power Bank DockUniversal Travel Adapter

Use Scenario: Portable power bank with dual USB-C ports negotiating 27 W (9 V/3 A) to tablets and 18 W (9 V/2 A) to earbuds simultaneously.

IC Role / Device Role / Timing Role: Dual-role controller managing independent CC-line handshaking per port, cable compensation per PDO, and coordinated discharge on port detach.

Use Value: Supports per-port thermal monitoring via GPIO1/GPIO2 NTC inputs-preventing overheating during multi-device charging without adding external ADCs.

Use Scenario: Foldable travel adapter accepting 100–240 VAC input and delivering 5 V/3 A, 9 V/2 A, 15 V/2 A, or 20 V/1.5 A based on connected device capability.

IC Role / Device Role / Timing Role: Protocol agnostic controller selecting optimal PDO from MTP-stored list (7 total), applying cable compensation only when needed, and disabling unused protocols (e.g., QC) to simplify certification.

Use Value: Reduces time-to-certification by enabling USB-PD 2.0-only mode for basic power-brick testing-eliminating QC2.0/3.0 interference during USB-IF compliance validation.

Equivalent & Alternatives

The following parts are listed as comparable options for similar USB-PD/QC secondary-side controller applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
STUSB4500QTRSingle-protocol USB-PD 3.0 controller; lacks QC2.0/3.0/4+, BC1.2, and PPS support; no integrated SW driver or DISCH pin.Requires external load switch driver and discharge circuit; limited to USB-C-only designs without legacy QC/BC compatibility.Select when designing USB-PD-only adapters where QC/BC support is unnecessary and BOM count is secondary to USB-IF certification simplicity.
MPQ4282GQ-AIntegrated USB-PD 3.0 + QC3.0 controller with synchronous rectifier driver; no MTP storage, fixed PDO set, and no GPIO-based thermal sensing.Prevents field-upgradable PDOs or cable compensation tuning; thermal protection relies solely on internal die sensor-not external NTCs.Choose for cost-sensitive, high-volume chargers where fixed 5/9/12/15/20 V PDOs suffice and thermal monitoring beyond die temperature is not required.

Compared with STUSB4500QTR and MPQ4282GQ-A, the TEA19051BAHTK/1J uniquely combines USB-PD 3.0 PPS, QC4+, BC1.2, and MTP-programmable thermal GPIOs in a single HVSON16 package-enabling one-chip compliance with global fast-charging standards while supporting field updates and multi-point thermal management.

Availability

TEA19051BAHTK/1J is available at Aetrix Electronics and suitable for USB-C fast chargers, universal travel adapters, and multi-protocol power banks requiring stable component supply, long-term lifecycle support, and qualification-ready USB-PD/QC silicon.

Supply support for TEA19051BAHTK/1J includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a Dutch semiconductor company specializing in secure connectivity solutions for automotive, industrial, and consumer electronics, with leadership in USB-PD, wireless charging, and smart power management ICs.

The TEA19051BAHTK/1J belongs to NXP's TEA1905x family of highly configurable secondary-side controllers, designed specifically to replace TL431-based feedback loops in high-efficiency, multi-protocol USB-C SMPS while integrating protocol stack, protection logic, and thermal intelligence.

FAQ

What USB-PD and QC protocols does the TEA19051BAHTK/1J support?

The TEA19051BAHTK/1J supports USB-PD 2.0 and 3.0-including Programmable Power Supply (PPS)-Qualcomm QuickCharge QC2.0, QC3.0, and QC4+, plus Battery Charging 1.2 (BC1.2). It implements these protocols using embedded firmware with hardware-accelerated USB-PD PHY and CC-line detection. The TEA19051BAHTK/1J also supports unstructured VDMs for vendor ID exchange and MTP programming, enabling full USB-IF certification readiness when QC2.0/3.0 are disabled via MTP settings.

How does the TEA19051BAHTK/1J achieve <30 mW no-load power?

The TEA19051BAHTK/1J achieves sub-30 mW system-level no-load power through ultra-low quiescent current design, hardware-gated circuit activation (only essential blocks powered before attach), and intelligent sleep modes triggered by CC-pin voltage thresholds. Its integrated charge pump and DISCH pin enable rapid Vbus discharge without external components, while the single-optocoupler feedback architecture minimizes standby losses. The TEA19051BAHTK/1J meets CoC Tier-2, EuP IoT6, and DOE Level VI requirements without auxiliary winding or additional bias supplies.

Can the TEA19051BAHTK/1J be used without an external NMOS load switch?

No-the TEA19051BAHTK/1J requires an external NMOS load switch driven by its SW pin, as mandated by USB-PD specification for Vbus control and safe discharge. The SW pin provides VCC + 6 V gate drive via internal charge pump, eliminating need for external level shifters. An external high-ohmic pull-down resistor between NMOS gate and Vbus ensures fail-safe turn-off if SW is disconnected. The TEA19051BAHTK/1J does not integrate a power MOSFET; omitting the external NMOS violates USB-PD vSafe0V and vSafe5V requirements.

What thermal sensing capabilities does the TEA19051BAHTK/1J provide?

The TEA19051BAHTK/1J provides dual-channel thermal monitoring via GPIO1 and GPIO2 pins, configurable in MTP as NTC inputs for adapter and cable/connector temperature measurement. Each pin uses adaptive current sourcing (15/60/240 µA) to maintain ±5 °C accuracy from 0 °C to >120 °C with standard 47 kΩ/β4108 NTCs. It also includes an internal die temperature sensor readable via VDM, and optional hardware OTP triggering per GPIO. The TEA19051BAHTK/1J reports all thermal data over USB-PD messages for host-side thermal management.

How many power data objects (PDOs) can be programmed into the TEA19051BAHTK/1J?

The TEA19051BAHTK/1J supports up to seven MTP-programmable power data objects (PDOs), four of which can be configured as Programmable Power Supply (PPS) profiles instead of fixed-voltage PDOs. Each PDO stores voltage, current, and attributes (e.g., PPS enable, cable compensation on/off, OCP/CC mode). Factory-default versions ship with preprogrammed PDO sets; custom configurations-including non-standard voltages (e.g., 14.5 V) or currents-are written via I²C during production. The TEA19051BAHTK/1J retains all MTP settings across power cycles.

TEA19051BAHTK/1J Specifications

Product attributes
Attribute value
Manufacturer:
NXP Semiconductors
Package/Case:
16-VDFN Exposed Pad
Programmable:
Not Verified
Protocol:
USB
Function:
Controller
Interface:
USB
Standards:
USB 2.0, USB 3.0
Voltage - Supply:
2.9V ~ 21V
Current - Supply:
3mA
Operating Temperature:
-40°C ~ 150°C (TJ)
Supplier Device Package:
16-HVSON (3.5x5.5)
Grade:
-
Qualification:
-

TEA19051BAHTK/1J FAQ

1.How can I place an order for TEA19051BAHTK/1J through Aetrix?

Please submit a Request for Quotation (RFQ) for TEA19051BAHTK/1J on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for TEA19051BAHTK/1J reliable?

The price and inventory of TEA19051BAHTK/1J are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TEA19051BAHTK/1J is usually 5 days.

3.What payment methods are accepted for TEA19051BAHTK/1J?

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TEA19051BAHTK/1J orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your TEA19051BAHTK/1J order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for TEA19051BAHTK/1J?

For technical support, including TEA19051BAHTK/1J datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TEA19051BAHTK/1J requirements.

6.How does Aetrix verify that TEA19051BAHTK/1J is sourced from the original manufacturer or authorized distributors?

All TEA19051BAHTK/1J products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TEA19051BAHTK/1J meets industry standards.

7.What is the process for return or replacement of TEA19051BAHTK/1J?

All TEA19051BAHTK/1J units undergo pre-shipment inspection (PSI). If there is an issue with TEA19051BAHTK/1J, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The TEA19051BAHTK/1J part is unused and in its original packaging.

Return procedure for TEA19051BAHTK/1J:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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