NXP Semiconductors TEA19051BAKTK/1J
- Part No.:
- TEA19051BAKTK/1J
- Manufacturer:
- NXP Semiconductors
- Category:
- Controllers
- Package:
- 16-VDFN Exposed Pad
- Datasheet:
-
TEA19051BAKTK/1J.pdf
- Description:
- SMARTCHARG PROTOC CONTR QC4
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TEA19051BAKTK/1J from NXP Semiconductors is a USB-PD 3.0 and QC4+ secondary-side SMPS controller in HVSON16 (SOT1308-1) package, supporting CV/CC regulation with <2% voltage and current accuracy, programmable PPS, and hardware-enforced protections including OTP, OVP, OCP, and OSP - deployed in high-efficiency USB-C chargers for smartphones and tablets.
For engineers reviewing the TEA19051BAKTK/1J datasheet, TEA19051BAKTK/1J pinout, TEA19051BAKTK/1J application, or TEA19051BAKTK/1J equivalent, key selection considerations include its integrated USB-PD PHY, dual CC/DP-DM protocol support, 16-pin HVSON package with SW and DISCH drive capability, MTP-configurable PDOs, and hardware-latched safety protections independent of firmware execution.
Technical Context
The TEA19051BAKTK/1J implements a digitally controlled analog feedback architecture where VSNS and ISNS pins feed into dedicated 12-bit DAC (voltage) and 10-bit DAC (current) loops, enabling precise CV/CC regulation with cable compensation up to 200 mV/A. Its embedded MCU executes USB-PD 3.0 and QC4+ state machines while offloading protection logic to hardware blocks.
Protocol handling is split across dedicated physical layers: CC1/CC2 pins manage USB Type-C attach/detach and PD communication per v1.3 spec; DP/DM pins handle BC1.2 and QC2.0–QC4+ negotiation; all protections - including adaptive OVP/UVP, soft-short detection on CC/DP/DM, and output short dissipation <50 mW - are implemented in hardwired logic with latched or safe-restart response modes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Protocol Support | USB-PD 2.0/3.0 (including PPS), QC2.0/QC3.0/QC4+, BC1.2, USB Type-C v1.3 - enables single-chip multi-standard adapter compliance |
| Output Voltage Range | 2.9 V to 21 V - covers USB-PD PPS and fixed PDOs, configurable via MTP with 50 mV step resolution |
| Regulation Accuracy | Better than ±2 % for both CV and CC modes - ensures tight compliance with USB-PD and QC voltage/current targets |
| No-Load Power | <30 mW system-level - meets CoC Tier-2, EuP Lot 6, and DOE Level VI efficiency requirements |
| Protection Architecture | Hardware-implemented OTP, OVP, UVP, OCP, OSP, OSUP, OGP, and CC/DP/DM soft-short - remains active even if MCU stalls |
| Package & Pin Count | HVSON16 (SOT1308-1), 3.5 × 5.5 × 0.85 mm - supports reflow soldering and high-density USB-C adapter layouts |
| MTP Memory | Non-volatile multi-time programmable memory - stores up to 7 PDOs, cable compensation, GPIO functions, VID/PID, and protection thresholds |
Pinout & Package
HVSON16 package (SOT1308-1) with exposed die pad (EDP) for thermal enhancement; 3.5 × 5.5 × 0.85 mm footprint optimized for compact USB-C power adapters.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | Supply input | Secondary-side DC supply input (up to 21 V); powers internal circuits and charge pump for SW pin |
| OPTO | Optocoupler driver output | Drives optocoupler LED to regulate primary-side controller (e.g., TEA193x) - replaces TL431 function |
| SGND | Sense ground reference | Dedicated low-noise ground for ISNS and VSNS sensing - prevents noise coupling into feedback paths |
| ISNS | Current sense input | Accepts mΩ-shunt voltage (×50 gain); enables CC mode and OCP with 20 mA full-scale range |
| VSNS | Voltage sense input | Resistor-divider input for CV regulation; supports 1/2.5 to 1/8.828 ratios matching PDO voltage ranges |
| SCL/SDA | I²C interface | Configures MTP settings and reads telemetry (temperature, V/I, status) during development or field updates |
| CC1/CC2 | USB-C configuration channel | Hardware-based attach/detach detection and USB-PD packet exchange - no firmware dependency |
| DP/DM | Legacy data lines | Support BC1.2 signature and QC2.0–QC4+ voltage negotiation - isolated from CC logic for protocol coexistence |
| DISCH | Fast discharge sink | Internal low-RON switch discharges Vbus to vSafe0V (<0.8 V) within USB-PD hard-reset timing |
| SW | NMOS gate driver | Charge-pump boosted output (VCC + 6 V) directly drives external NMOS load switch - eliminates external driver IC |
Key Features
| Feature | Design Value |
|---|---|
| Integrated USB-PD PHY + protocol engine | Enables full USB-PD 3.0 DFP operation including PPS negotiation without external transceiver or microcontroller |
| Dual-protocol pin separation (CC vs. DP/DM) | Allows simultaneous USB-PD and QC/BC1.2 support with zero signal contention or cross-talk risk |
| Hardware-only protections | OTP, OVP, OSP, and soft-short detection operate independently of MCU - guarantees fail-safe shutdown under fault |
| Programmable cable compensation | Up to 200 mV/A compensation applied per PDO - maintains target voltage at device connector under load |
| GPIO temperature sensing (NTC + OTP) | Two GPIOs support adaptive-current NTC biasing for accurate adapter/cable connector temperature monitoring (<5 °C error) |
| Single-optocoupler CV/CC control | Replaces TL431 + discrete components with digital precision - reduces BOM to ~15 external parts |
Applications
| Smartphone Fast Charging Adapter | Multi-Protocol Tablet Charger |
|---|---|
|
Use Scenario: 45 W USB-C wall charger supporting USB-PD 3.0 PPS and QC4+ for flagship Android devices. IC Role / Device Role: Secondary-side controller managing V/I regulation, protocol negotiation, load switching, and safety-critical protections. Use Value: Achieves <30 mW no-load power and ±2% regulation accuracy while enabling firmware-upgradable PDO sets via MTP. |
Use Scenario: 65 W universal travel adapter with dual USB-C ports negotiating independent PDOs per port. IC Role / Device Role: Protocol-aware SMPS supervisor coordinating CC1/CC2 handshaking, DP/DM fallback, and thermal derating. Use Value: Hardware-detached CC logic ensures reliable plug/unplug detection and vSafe5V recovery without software intervention. |
| USB-C Power Bank Output Stage | QC4+-Certified Laptop Dock Charger |
|
Use Scenario: Portable power bank delivering 20 V @ 3 A using PPS for laptop charging. IC Role / Device Role: Constant-current regulator with real-time ISNS feedback and adaptive cable compensation. Use Value: 10-bit current DAC and 20 mA full-scale ISNS input enable precise CC control across 0.3–5 A range. |
Use Scenario: Dock-integrated 100 W charger supporting USB-PD EPR negotiation and QC4+ backward compatibility. IC Role / Device Role: Multi-protocol arbiter selecting optimal voltage/current based on connected device capabilities. Use Value: Seven MTP-programmable PDOs (four as PPS) allow dynamic profile selection without hardware change. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar USB-PD and QC secondary-side controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STUSB4500QTR | USB-PD 3.0 only (no QC support); 20-pin QFN; requires external MCU for PPS loop control | Lacks QC2.0–QC4+ and BC1.2 native support - limited to pure USB-C ecosystems | Choose when USB-PD-only compliance is sufficient and external microcontroller resources are available. |
| MPQ4282GQ-AEC1 | Automotive-grade USB-PD 3.0 controller; AEC-Q100 qualified; no QC or BC1.2 support; integrated 5 V LDO | Targeted for vehicle-mounted chargers - includes extended temp range and fault reporting not in TEA19051BAKTK/1J | Prefer for automotive applications requiring AEC-Q100 qualification and built-in LDO, not consumer adapters. |
Compared with STUSB4500QTR and MPQ4282GQ-AEC1, the TEA19051BAKTK/1J uniquely integrates QC4+, BC1.2, and USB-PD 3.0 in one die with hardware-enforced protections and MTP-configurable PDOs - eliminating need for companion MCU or external protocol translators in multi-standard consumer chargers.
Availability
TEA19051BAKTK/1J is available at Aetrix Electronics and suitable for USB-C fast charging adapters, multi-protocol power banks, and QC4+-certified laptop docks requiring stable component supply, long-term lifecycle assurance, and consistent MTP programming support.
Supply support for TEA19051BAKTK/1J includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and consumer applications, with deep expertise in power management and USB ecosystem integration.
The TEA19051BAKTK/1J belongs to NXP's TEA190xx smart-charging controller family, designed specifically to replace discrete TL431-based feedback systems with integrated digital protocol handling, hardware safety, and ultra-low no-load power for next-generation USB-C adapters.
FAQ
What protocols does the TEA19051BAKTK/1J support natively?
The TEA19051BAKTK/1J supports USB-PD 2.0/3.0 (including PPS), Qualcomm QuickCharge 2.0/3.0/4+, Battery Charging 1.2, and USB Type-C v1.3 - all implemented in hardware or firmware without external protocol translators. Its CC1/CC2 pins handle USB-PD, while DP/DM pins manage QC and BC1.2, enabling concurrent multi-standard negotiation.
How does the TEA19051BAKTK/1J achieve <30 mW no-load power?
The TEA19051BAKTK/1J achieves <30 mW system-level no-load power through ultra-low quiescent current design, selective circuit activation during unattached state, and hardware-gated power domains. Only essential blocks (CC detection, UVLO monitor) remain active before attach, and the DISCH pin's 1 mA sink is duty-cycled to limit dissipation - meeting CoC Tier-2 and DOE Level VI requirements.
Can the TEA19051BAKTK/1J be used without an external microcontroller?
Yes, the TEA19051BAKTK/1J contains an embedded MCU with ROM, RAM, and MTP memory, enabling full USB-PD and QC protocol execution standalone. External I²C access is optional for configuration or telemetry readout; all critical functions - including PDO selection, voltage ramping, and protection response - operate autonomously after MTP programming.
What is the role of the SW and DISCH pins in the TEA19051BAKTK/1J?
The SW pin provides charge-pump boosted (VCC + 6 V) gate drive for an external NMOS load switch, eliminating need for discrete drivers. The DISCH pin integrates a low-RON switch to rapidly discharge Vbus to <0.8 V during USB-PD hard reset - both pins are hardware-controlled and functional even if the MCU core halts, ensuring guaranteed safety behavior.
How are protections implemented in the TEA19051BAKTK/1J?
All critical protections - overtemperature (internal + two external), adaptive overvoltage/undervoltage, overcurrent, output short, open-supply, and soft-short on CC/DP/DM - are implemented in dedicated hardware logic. They operate independently of firmware execution, respond in microseconds, and can be configured as latched or safe-restart via MTP - ensuring fail-safe operation under any fault condition.
TEA19051BAKTK/1J Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 16-VDFN Exposed Pad
- Programmable:
- Not Verified
- Protocol:
- USB
- Function:
- Controller
- Interface:
- USB
- Standards:
- USB 2.0, USB 3.0
- Voltage - Supply:
- 2.9V ~ 21V
- Current - Supply:
- 3mA
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Supplier Device Package:
- 16-HVSON (3.5x5.5)
- Grade:
- -
- Qualification:
- -
TEA19051BAKTK/1J FAQ
1.How can I place an order for TEA19051BAKTK/1J through Aetrix?
Please submit a Request for Quotation (RFQ) for TEA19051BAKTK/1J on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TEA19051BAKTK/1J reliable?
The price and inventory of TEA19051BAKTK/1J are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TEA19051BAKTK/1J is usually 5 days.
3.What payment methods are accepted for TEA19051BAKTK/1J?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TEA19051BAKTK/1J transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TEA19051BAKTK/1J?
TEA19051BAKTK/1J orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TEA19051BAKTK/1J order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TEA19051BAKTK/1J?
For technical support, including TEA19051BAKTK/1J datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TEA19051BAKTK/1J requirements.
6.How does Aetrix verify that TEA19051BAKTK/1J is sourced from the original manufacturer or authorized distributors?
All TEA19051BAKTK/1J products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TEA19051BAKTK/1J meets industry standards.
7.What is the process for return or replacement of TEA19051BAKTK/1J?
All TEA19051BAKTK/1J units undergo pre-shipment inspection (PSI). If there is an issue with TEA19051BAKTK/1J, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TEA19051BAKTK/1J part is unused and in its original packaging.
Return procedure for TEA19051BAKTK/1J:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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