NXP Semiconductors TEA19051BAPTK/1J
- Part No.:
- TEA19051BAPTK/1J
- Manufacturer:
- NXP Semiconductors
- Category:
- Controllers
- Package:
- 16-VDFN Exposed Pad
- Datasheet:
-
TEA19051BAPTK/1J.pdf
- Description:
- SMARTCHARG PROTOC CONTR QC4
- Quantity:
- Payment:

- Shipping:

Inventory:3,135
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Product details
Overview
TEA19051BAPTK/1J from NXP Semiconductors is a USB-PD 3.0 and QC4+ secondary-side SMPS controller in HVSON16 package, delivering CV/CC regulation with <2% voltage accuracy and <2% full-load current accuracy, supporting programmable power supply (PPS), cable compensation, and hardware-enforced protections for high-power USB-C chargers.
For engineers reviewing the TEA19051BAPTK/1J datasheet, TEA19051BAPTK/1J pinout, TEA19051BAPTK/1J application, or TEA19051BAPTK/1J equivalent, key selection criteria include its integrated USB-PD PHY, dual CC/DP-DM protocol support, 16-pin HVSON package with SW and DISCH drive capability, and MTP-configurable PDOs up to 7 including PPS profiles.
Technical Context
The TEA19051BAPTK/1J implements a digitally enhanced analog control architecture: a 12-bit DAC sets output voltage via VSNS feedback, while a 10-bit DAC and 50× gain amplifier regulate current via ISNS sensing; all protections-including OVP, OTP (internal + two external), OSP, and soft-short detection on CC1/CC2-are implemented in dedicated hardware logic independent of firmware execution.
It integrates a charge pump driving the SW pin (VCC + 6 V) for direct NMOS gate control, a fast-discharge sink on DISCH with vSafe0V monitoring, and adaptive current sourcing on GPIO1/GPIO2 for NTC-based temperature measurement with <5 °C accuracy across 0–120 °C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Protocol Support | USB-PD 2.0/3.0 (including PPS), QC2.0/QC3.0/QC4+, BC1.2, USB Type-C v1.3 |
| Output Voltage Range | 2.9 V to 21 V; programmable via MTP with 50 mV step size |
| Voltage Accuracy | Better than ±2 % in CV mode; enables tight regulation for USB-PD PPS compliance |
| Current Accuracy | Better than ±2 % at full load; supports precise CC-mode charging for fast-charge protocols |
| No-Load Power | <30 mW system-level; meets CoC Tier-2, EuP Lot 6, and DOE Level VI |
| Package | HVSON16 (SOT1308-1); 3.5 × 5.5 × 0.85 mm; reflow-solder compatible |
| Protection Architecture | All critical protections (OVP, OTP, OSP, UVP, OCP) implemented in hardware; latched or safe-restart configurable |
Pinout & Package
HVSON16 package (SOT1308-1) with exposed die pad (EDP) for thermal dissipation; 16-pin layout optimized for compact USB-C adapter designs requiring minimal external components.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | Supply input | Secondary-side DC supply input (up to 21 V); powers internal circuits and charge pump |
| OPTO | Optocoupler driver | Drives optocoupler LED to regulate primary-side controller; replaces TL431 functionality |
| SGND | Sense ground reference | Isolated return path for ISNS and VSNS; prevents noise coupling into feedback loops |
| ISNS | Current sense input | Accepts mΩ-shunt voltage; internal 50× amplifier enables accurate CC-loop control |
| VSNS | Voltage sense input | Resistor-divider feedback node; 12-bit DAC sets precise CV reference |
| SCL/SDA | I²C interface | Configures MTP parameters and reads telemetry (temperature, voltage, current) |
| CC1/CC2 | USB-C configuration channel | Hardware-based attach/detach detection and USB-PD communication PHY |
| DP/DM | QC/Battery Charging interface | Supports QC2.0/QC3.0 negotiation and BC1.2 D+/D− handshake |
| DISCH | Fast discharge sink | Internal low-RON switch discharges Vbus to vSafe0V (<0.8 V) per USB-PD spec |
| SW | NMOS gate driver | Charge-pump boosted output (VCC + 6 V) directly drives external load-switch NMOS |
Key Features
| Feature | Design Value |
|---|---|
| Integrated USB-PD PHY + CC logic | Hardware-accelerated USB-C plug detection and PD messaging; no firmware dependency for safety-critical attach/detach |
| Programmable PPS support | Up to 4 of 7 configurable PDOs can be set as PPS profiles; enables 20 mV/step voltage adjustment for USB-PD 3.0 compliance |
| Dual NTC temperature sensing | GPIO1/GPIO2 support adaptive-current NTC biasing; delivers <5 °C accuracy over 0–120 °C for connector and adapter thermal management |
| Hardware-enforced protections | OVP, OTP (die + two external), OSP, and soft-short detection operate independently of MCU; guaranteed fail-safe behavior under fault |
| MTP-configurable system parameters | Non-volatile storage for default voltage/current, PDOs, cable compensation, GPIO functions, and VID/PID-enabling customer-specific configurations |
Applications
| Smartphone Fast Charging Adapter | Multi-Protocol Laptop Charger |
|---|---|
Use Scenario: 65 W USB-C PD 3.0 + QC4+ wall charger for flagship smartphones with dynamic voltage/current negotiation. IC Role / Device Role / Timing Role: Secondary-side protocol controller and CV/CC regulator; manages PDO selection, PPS ramping, and real-time current/voltage telemetry via CC pins. Use Value: Enables single-charger compatibility with USB-PD, QC4+, and BC1.2 devices while maintaining <2% regulation accuracy and <30 mW no-load power. |
Use Scenario: Compact 100 W GaN-based laptop adapter supporting simultaneous USB-PD PPS and legacy QC3.0 negotiation. IC Role / Device Role / Timing Role: Central SMPS controller coordinating TEA193x primary and TEA199x SR; handles multi-PDO arbitration and cable compensation during voltage transitions. Use Value: Reduces BOM count to ~15 components and eliminates need for discrete protection ICs via integrated hardware safeguards. |
| USB-C Power Bank Output Stage | Universal Travel Adapter Controller |
Use Scenario: High-density power bank with dual USB-C ports supporting PPS charging and bidirectional PD negotiation. IC Role / Device Role / Timing Role: Secondary-side load switch manager and protocol arbiter; uses DISCH and SW pins to enforce vSafe0V and rapid Vbus ramp-down during detach. Use Value: Guarantees USB-PD vSafe5V/vSafe0V timing compliance without software intervention, even during MCU lockup. |
Use Scenario: Multi-standard travel adapter accepting QC2.0/3.0/4+, USB-PD 2.0/3.0, and BC1.2 inputs from global OEM cables. IC Role / Device Role / Timing Role: Protocol translator and safety supervisor; maps DP/DM voltage steps to USB-PD PDOs and enforces OTP/OVP limits per regional safety standards. Use Value: Eliminates need for multiple discrete controllers; single TEA19051BAPTK/1J supports all major fast-charge standards in one footprint. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar USB-PD and QC secondary-side controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STUSB4500QTR | Standalone USB-PD 3.0 sink controller; lacks integrated CC/CV regulation, PPS, or NMOS gate drive | Requires external voltage/current controller and load switch; suitable only for sink-side applications | Choose STUSB4500QTR only when implementing a USB-PD sink-not a source/charger controller like TEA19051BAPTK/1J |
| MPQ4282-AEC1 | Automotive-grade USB-PD 3.0 source controller; includes integrated buck converter but no QC/BC1.2 support | Designed for vehicle infotainment power delivery; not qualified for consumer AC-DC adapter use | MPQ4282-AEC1 fits automotive environments but cannot replace TEA19051BAPTK/1J in universal fast-charge adapters due to missing QC protocols and non-reflow HVSON package |
Compared with STUSB4500QTR and MPQ4282-AEC1, the TEA19051BAPTK/1J uniquely combines USB-PD 3.0 PPS, QC4+, BC1.2, and hardware-enforced CV/CC regulation in a single HVSON16 device-eliminating external DACs, op-amps, and protection ICs required by alternatives.
Availability
TEA19051BAPTK/1J is available at Aetrix Electronics and suitable for high-efficiency USB-C fast chargers, multi-protocol travel adapters, and compact power banks requiring stable component supply, long-term lifecycle support, and full USB-PD 3.0 certification readiness.
Supply support for TEA19051BAPTK/1J includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and consumer applications, with deep expertise in power management and USB ecosystem integration.
The TEA19051BAPTK/1J belongs to NXP's TEA190xx smart-charging controller family, designed specifically to enable compact, high-efficiency, multi-protocol USB-C power adapters meeting global energy efficiency and safety standards.
FAQ
What USB-PD and QC protocols does the TEA19051BAPTK/1J support?
The TEA19051BAPTK/1J supports USB-PD 2.0 and 3.0-including Programmable Power Supply (PPS)-as well as Qualcomm QuickCharge QC2.0, QC3.0, and QC4+. It also implements Battery Charging 1.2 (BC1.2) and USB Type-C v1.3 physical layer requirements. All protocol handling is performed in hardware-assisted firmware with MTP-configurable PDOs.
How does the TEA19051BAPTK/1J achieve <2% voltage and current accuracy?
The TEA19051BAPTK/1J achieves better than ±2% voltage accuracy in CV mode using a 12-bit DAC referenced to an internal bandgap, and better than ±2% full-load current accuracy in CC mode via a 10-bit DAC driving a precision 50× current-sense amplifier on the ISNS pin. Both loops operate continuously with hardware-based ADC sampling and digital filtering initialized in firmware.
What protections are implemented in hardware versus firmware on the TEA19051BAPTK/1J?
All critical protections-including overvoltage (OVP), overtemperature (OTP) on die and two external sensors, output short (OSP), undervoltage (UVP), and soft-short detection on CC1/CC2-are implemented in dedicated hardware logic. Only non-safety-critical features like I²C configuration or VDM responses rely on the embedded MCU; hardware protections remain fully active even if firmware stalls.
Can the TEA19051BAPTK/1J drive an external NMOS load switch directly?
Yes, the TEA19051BAPTK/1J includes an integrated charge pump that boosts the SW pin output to VCC + 6 V, enabling direct gate drive of standard NMOS load switches without external level shifters. The SW pin is held low during UVLO or open-VCC conditions, ensuring fail-safe turn-off of the load switch under fault conditions.
What is the role of the DISCH pin on the TEA19051BAPTK/1J?
The DISCH pin on the TEA19051BAPTK/1J provides a low-ohmic internal switch to rapidly discharge the Vbus output to vSafe0V (<0.8 V) during USB-PD hard resets. It operates with millisecond-scale periodic sampling to verify final voltage drop while limiting peak current via an external series resistor-ensuring strict compliance with USB-PD vSafe0V timing requirements.
TEA19051BAPTK/1J Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 16-VDFN Exposed Pad
- Programmable:
- Not Verified
- Protocol:
- USB
- Function:
- Controller
- Interface:
- USB
- Standards:
- USB 2.0, USB 3.0
- Voltage - Supply:
- 2.9V ~ 21V
- Current - Supply:
- 3mA
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Supplier Device Package:
- 16-HVSON (3.5x5.5)
- Grade:
- -
- Qualification:
- -
TEA19051BAPTK/1J FAQ
1.How can I place an order for TEA19051BAPTK/1J through Aetrix?
Please submit a Request for Quotation (RFQ) for TEA19051BAPTK/1J on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TEA19051BAPTK/1J reliable?
The price and inventory of TEA19051BAPTK/1J are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TEA19051BAPTK/1J is usually 5 days.
3.What payment methods are accepted for TEA19051BAPTK/1J?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TEA19051BAPTK/1J transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TEA19051BAPTK/1J?
TEA19051BAPTK/1J orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TEA19051BAPTK/1J order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TEA19051BAPTK/1J?
For technical support, including TEA19051BAPTK/1J datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TEA19051BAPTK/1J requirements.
6.How does Aetrix verify that TEA19051BAPTK/1J is sourced from the original manufacturer or authorized distributors?
All TEA19051BAPTK/1J products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TEA19051BAPTK/1J meets industry standards.
7.What is the process for return or replacement of TEA19051BAPTK/1J?
All TEA19051BAPTK/1J units undergo pre-shipment inspection (PSI). If there is an issue with TEA19051BAPTK/1J, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TEA19051BAPTK/1J part is unused and in its original packaging.
Return procedure for TEA19051BAPTK/1J:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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