NXP Semiconductors TEA19161CT/1Y

Overview

TEA19161CT/1Y from NXP Semiconductors is a fully digital LLC resonant controller IC for high-efficiency AC-DC power supplies, featuring primary-side capacitor voltage (V_Cr) regulation, three-mode operation (high-power/low-power/burst), integrated high-voltage start-up, and 500 kHz max half-bridge switching frequency. It enables <75 mW no-load input power in combination with TEA19162T and TEA1995T for 90–500 W desktop, LCD TV, and notebook adapter applications.

For engineers reviewing the TEA19161CT/1Y datasheet, TEA19161CT/1Y pinout, TEA19161CT/1Y application, or TEA19161CT/1Y equivalent, key selection criteria include V_Cr-based power regulation accuracy, externally adjustable mode transition thresholds, integrated SOI-based HV gate drivers, low-power mode duty-cycle control, and compliance with Energy Star, DoE Level VI, and EU Eco-design directives.

Technical Context

The TEA19161CT/1Y implements a digital control architecture that regulates output power by sensing the divided voltage across the LLC resonant capacitor (SNSCAP), not by frequency modulation-enabling linear power-to-voltage correlation and stable loop gain across load range. Its dual-die SOI process integrates a 11 V regulated SUPREG supply, HV start-up circuitry (SUPHV → SUPIC), and independent high-side/low-side gate drivers with adaptive non-overlap timing.

Operation spans three distinct modes: high-power mode (continuous switching, ΔV_SNSCAP-modulated), low-power mode (fixed 67% duty cycle over 3 half-cycles with hold period to cut magnetization losses), and burst mode (externally selectable 200–1600 Hz burst frequency with low-power periods). Mode transitions are set via resistor dividers on SNSSET and monitored using real-time primary current (SNSCUR) and capacitor voltage (SNSCAP) sampling.

Key Specifications

Pinout & Package

TEA19161CT/1Y is housed in a plastic small outline package (SO16) with 16 leads and 3.9 mm body width (SOT109-1), optimized for surface-mount assembly and thermal dissipation in compact power supplies.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LLC resonant controller applications.

Compared with UCC256301DR and ICE2HS01G, the TEA19161CT/1Y delivers superior light-load efficiency through its unique V_Cr-based regulation and three-stage adaptive operation, while reducing bill-of-materials via integrated SOI HV drivers and digital PFC handshake-making it optimal for next-generation energy-compliant consumer power supplies.

Availability

TEA19161CT/1Y is available at Aetrix Electronics and suitable for desktop PC power supplies, LCD television main power units, notebook adapters, and office printer PSUs requiring stable component supply, long-term lifecycle support, and compliance with global energy regulations.

Supply support for TEA19161CT/1Y includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer applications.

The TEA19161CT/1Y belongs to NXP's GreenChip™ family of high-efficiency power controllers, designed specifically for digitally controlled resonant topologies in energy-regulated AC-DC power supplies from 90 W to 500 W.

FAQ

What is the primary regulation method used by the TEA19161CT/1Y?

The TEA19161CT/1Y uses primary-side resonant capacitor voltage (V_Cr) sensing-not frequency modulation-as its core regulation method. It measures the divided voltage at the SNSCAP pin and dynamically adjusts high/low thresholds (V_hs/V_ls) to control delivered output power. This approach provides linear power-to-voltage correlation, stable loop gain across load range, and immunity to resonant component tolerance drift-distinguishing TEA19161CT/1Y from conventional frequency-controlled LLC controllers.

How does the TEA19161CT/1Y achieve <75 mW no-load input power?

The TEA19161CT/1Y achieves <75 mW no-load input power through coordinated system-level optimizations: regulated 85 µA optocurrent minimizes TL431 bias loss; low-power mode reduces magnetization losses via 3-cycle hold periods; burst mode uses programmable 200–1600 Hz frequencies to suppress audible noise and switching loss; and integrated HV start-up eliminates auxiliary supply requirements. These features are validated in the TEA19161CT/1Y/TEA19162T/TEA1995T reference design, where total system no-load consumption measures 42–74 mW depending on transformer design.

Can the TEA19161CT/1Y operate without the TEA19162T PFC controller?

Yes, the TEA19161CT/1Y can operate without the TEA19162T PFC controller. While optimized for seamless digital coordination-including PFC burst enable/disable via SNSBOOST and shared protection signaling-the TEA19161CT/1Y functions as a standalone LLC controller. In non-PFC configurations, the SNSBOOST pin must be tied to a fixed voltage (e.g., 5 V) to prevent unintended PFC disable, and external bulk capacitance must meet hold-up requirements. All core LLC regulation, protection, and mode control remain fully functional.

What is the purpose of the SNSSET pin on the TEA19161CT/1Y?

The SNSSET pin on the TEA19161CT/1Y is a multifunction configuration terminal that sets critical operating parameters via external resistor dividers: high/low-power mode transition level, low-power/burst mode threshold, overpower protection (OPP) trip point, OPP timeout duration, and latch-vs-restart behavior. During power-up, the TEA19161CT/1Y reads resistor values on SNSSET to initialize these settings-enabling full system tuning without firmware or external microcontroller intervention.

Does the TEA19161CT/1Y support zero-voltage switching (ZVS) across all operating conditions?

Yes, the TEA19161CT/1Y actively ensures zero-voltage switching across line, load, and temperature variations using HB node slope detection and adaptive non-overlap timing. Its digital control logic samples the half-bridge (HB) voltage waveform in real time to detect valley/peak crossings, then dynamically adjusts dead time between GATEHS and GATELS transitions. This guarantees ZVS even under light-load or low-line conditions-reducing switching losses, improving efficiency, and lowering EMI emissions without requiring manual dead-time calibration.