NXP Semiconductors TEA19161T/1Y
- Part No.:
- TEA19161T/1Y
- Manufacturer:
- NXP Semiconductors
- Category:
- Power Supply Controllers, Monitors
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TEA19161T/1Y.pdf
- Description:
- IC PFC CTRLR DCM 500KHZ 16SO
- Quantity:
- Payment:

- Shipping:

Inventory:2,975
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TEA19161T/1Y from NXP Semiconductors is a fully digital LLC resonant controller IC for high-efficiency AC-DC power supplies, operating up to 500 kHz with primary capacitor voltage (VCr) regulation, integrated high-voltage start-up, and three-mode operation (high-power/low-power/burst). It delivers <75 mW no-load input power in combination with TEA19162T and TEA1995T, targeting 90–500 W desktop, LCD TV, and notebook adapter applications.
For engineers reviewing the TEA19161T/1Y datasheet, TEA19161T/1Y pinout, TEA19161T/1Y application, or TEA19161T/1Y equivalent, key selection considerations include VCr-based power regulation accuracy, externally adjustable mode transition thresholds, integrated SOI-based high-side driver and level shifter, adaptive non-overlap timing, and compliance with Energy Star, DoE Level VI, and EU Eco-design directives.
Technical Context
The TEA19161T/1Y implements a unique primary capacitor voltage (VSNSCAP)-based control loop instead of conventional frequency modulation, enabling linear output power estimation via ΔVCr and eliminating load-dependent burst activation drift. Its dual-die architecture integrates a low-voltage digital controller (for power regulation, mode sequencing, and protections) and a high-voltage SOI controller (for HV start-up, gate driving, and level shifting).
It supports coordinated operation with TEA19162T PFC via digital interface for synchronized burst mode entry and fast latch reset, while real-time monitoring of SNSCUR, SNSCAP, and SNSBOOST enables precise OCP, CMR, OPP, and capacitive mode protection without external comparators.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Control Method | Primary resonant capacitor voltage (VSNSCAP) regulation - enables accurate, load-independent power estimation and stable burst mode activation. |
| Max Switching Frequency | 500 kHz - supports compact magnetics and high-density 90–500 W resonant designs without audible noise. |
| No-Load Input Power | <75 mW (system-level with TEA19162T/TEA1995T) - eliminates need for auxiliary supply, reducing BOM count and cost. |
| Start-Up Time | <500 ms at 100 VAC - ensures rapid system readiness without compromising reliability under low-line conditions. |
| Operating Modes | Three auto-switching modes: high-power (continuous switching), low-power (fixed 67% duty + hold period), and burst - optimized for efficiency across full load range. |
| Protection Suite | OCP, OVP, UVP, OTP, CMR, OPP with adjustable timeout, and max on-time limiting - comprehensive fault coverage with no external circuitry required. |
| Digital Interface | Configurable bidirectional link with TEA19162T - enables synchronized PFC burst control and fast latch reset for system-level fault recovery. |
Pinout & Package
TEA19161T/1Y is housed in a 16-pin plastic small outline package (SO16, SOT109-3) with 3.9 mm body width and 1.47 mm thickness, optimized for surface-mount assembly and thermal performance in high-density power stages.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SUPIC | Input supply & HV start-up output | Accepts auxiliary winding or DC supply; internally regulated to 19.1 V during start-up and protection events. |
| SNSFB | Optocoupler feedback sense | Monitors secondary-side TL431 output to regulate primary VCr and maintain output voltage stability. |
| SNSOUT | Burst frequency & output voltage monitor | Connects to auxiliary winding via resistive divider/diode to set burst threshold and detect output faults. |
| GATELS | Low-side MOSFET gate driver | Drives LLC low-side switch with integrated current limiting and max on-time protection. |
| GATEHS | High-side MOSFET gate driver | SOI-based floating driver with bootstrap supply (SUPHS) and HB node sensing for ZVS assurance. |
| SNSSET | Mode transition & protection configuration | Externally sets high/low-power and low-power/burst thresholds, OPP level, timeout, and latch/restart behavior. |
| SNSCUR | Resonant current sense input | Direct connection to current-sense resistor enables cycle-by-cycle OCP and capacitive mode detection. |
| SNSCAP | Primary capacitor voltage sense | Divided VCr input used for real-time power calculation, regulation, and mode decision logic. |
Key Features
| Feature | Design Value |
|---|---|
| VCr-based regulation | Eliminates frequency-control loop gain variation and burst mode load-dependency, enabling consistent light-load efficiency. |
| Integrated HV SOI controller | Combines start-up, level shifting, and high-side drive in one die - reduces external component count and improves ZVS reliability. |
| Adaptive non-overlap timing | Automatically adjusts dead time based on HB slope and resonant current to prevent shoot-through while maximizing ZVS window. |
| Regulated optocurrent (85 µA) | Maintains constant TL431 bias current across load range - minimizes no-load power and stabilizes feedback loop dynamics. |
| Three-mode seamless transition | Externally configurable thresholds enable smooth, glitch-free handoff between high-power, low-power, and burst modes. |
Applications
| Desktop PC Power Supply | LCD Television PSU |
|---|---|
Use Scenario: 230 W internal power supply for slim-form-factor all-in-one PCs requiring ultra-low no-load consumption and high efficiency at partial loads. IC Role / Device Role / Timing Role: Primary LLC controller regulating output power via VSNSCAP, coordinating with TEA19162T PFC and TEA1995T SR drivers to achieve >92% efficiency at 20% load. Use Value: Enables elimination of auxiliary supply and reduces total system no-load power to <75 mW, meeting stringent EU CoC Tier 2 requirements. | Use Scenario: 180 W open-frame PSU for 43-inch LCD TV with dynamic backlight dimming causing wide load variation (5–100%). IC Role / Device Role / Timing Role: Digital resonant controller managing three operating modes to sustain >90% efficiency from 10% to full load while suppressing audible noise below 23 kHz. Use Value: Low-power mode's 33% magnetization loss reduction maintains efficiency at standby, extending product lifetime and lowering thermal stress. |
| Notebook Adapter | Laser Printer Engine PSU |
Use Scenario: 65 W universal-input adapter supporting USB-C PD negotiation, requiring fast transient response and minimal footprint. IC Role / Device Role / Timing Role: Core LLC controller using VCr regulation for precise power delivery and digital interface with PFC to synchronize burst entry during low-power states. Use Value: Achieves <300 ms start-up and <75 mW no-load power, enabling compact design without auxiliary winding or extra regulators. | Use Scenario: 320 W high-reliability PSU for laser printer fuser heating, subject to frequent thermal cycling and high peak currents. IC Role / Device Role / Timing Role: Resonant controller with integrated OTP, CMR, and OPP providing self-protecting operation during fuser warm-up surges and paper jam overloads. Use Value: On-chip CMR prevents hard-switching during light-load transitions, reducing MOSFET stress and improving long-term reliability in industrial environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LLC resonant controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCC256301 | Frequency-controlled LLC controller with analog PWM core; lacks VCr-based regulation and integrated digital PFC interface. | Requires external circuitry for burst mode coordination and has higher no-load power (>100 mW system-level). | Choose when legacy frequency-loop design familiarity outweighs efficiency gains; verify external OPP/CMR implementation. |
| ICE2HS01G | Analog hybrid controller with fixed burst threshold; no programmable mode transitions or digital communication with PFC. | Supports only two operating modes; less precise light-load regulation and higher audible noise risk below 25 kHz. | Select for cost-sensitive, lower-power (<150 W) applications where <75 mW no-load is not mandated. |
Compared with UCC256301 and ICE2HS01G, TEA19161T/1Y delivers superior light-load efficiency through VCr-based power estimation and seamless three-mode operation, while its digital PFC interface and integrated SOI drivers reduce external component count and improve system-level robustness in 90–500 W applications.
Availability
TEA19161T/1Y is available at Aetrix Electronics and suitable for desktop PC power supplies, LCD television PSUs, and notebook adapters requiring stable component supply, regulatory compliance (DoE Level VI, EU Eco-design), and ultra-low no-load power.
Supply support for TEA19161T/1Y includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and consumer applications, with deep expertise in power management ICs and digital control architectures.
The TEA19161T/1Y belongs to NXP's TEA19xx digital resonant controller family, designed specifically for high-efficiency, low-component-count LLC power supplies targeting Energy Star, DoE, and EU Eco-design compliance in 90–500 W applications.
FAQ
What is the primary regulation method used by the TEA19161T/1Y?
The TEA19161T/1Y uses primary resonant capacitor voltage (VSNSCAP) sensing-not frequency modulation-to regulate output power. By measuring the voltage difference (ΔVCr) across the LLC resonant capacitor, it calculates delivered power linearly per Equation 1 in the datasheet. This enables precise, load-independent burst mode activation and eliminates efficiency drift caused by resonant component tolerances, a key advantage over traditional frequency-controlled LLC controllers like the UCC256301.
How does the TEA19161T/1Y achieve <75 mW no-load input power?
The TEA19161T/1Y achieves <75 mW no-load input power (system-level with TEA19162T and TEA1995T) through three integrated features: regulated 85 µA optocurrent to minimize TL431 bias loss, ultra-low quiescent current in burst mode, and elimination of auxiliary supplies via HV start-up and VCr-based regulation. Its low-power mode further reduces magnetization losses by introducing a controlled "hold" period, directly contributing to sub-100 mW system no-load performance required by EU CoC Tier 2.
What protection functions are integrated into the TEA19161T/1Y?
The TEA19161T/1Y integrates OverCurrent Protection (OCP), OverVoltage Protection (OVP), Supply UnderVoltage Protection (UVP), On-chip OverTemperature Protection (OTP), Capacitive Mode Regulation (CMR), OverPower Protection (OPP) with adjustable timeout, and maximum on-time limiting for both high-side and low-side drivers. These are implemented entirely on-die-no external comparators or timers are needed-ensuring fast, coordinated fault response and simplifying safety-critical PSU design for IEC 62368-1 compliance.
Can the TEA19161T/1Y operate without the TEA19162T PFC controller?
Yes, the TEA19161T/1Y can operate standalone with an external PFC stage or non-PFC front-end, but its digital control interface, burst synchronization logic, and optimized start-up sequence are specifically designed for seamless integration with the TEA19162T. Using TEA19162T enables coordinated burst entry, fast latch reset, and shared protection signaling-critical for achieving <75 mW no-load power and full regulatory compliance. Standalone use requires external implementation of these functions.
What package type and pin count does the TEA19161T/1Y use?
The TEA19161T/1Y uses a 16-pin plastic small outline package (SO16) conforming to SOT109-3 mechanical dimensions: 3.9 mm body width, 1.47 mm body thickness, and standard 1.27 mm pitch. This RoHS-compliant package supports automated SMT assembly and provides adequate thermal dissipation for continuous operation in 90–500 W resonant power supplies.
TEA19161T/1Y Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- GreenChip™
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Applications:
- Power Supply Controller, Notebook Computers
- Voltage - Input:
- 18.3V ~ 19.8V
- Voltage - Supply:
- 10.6V ~ 11.4V
- Current - Supply:
- 5.6 mA
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SO
TEA19161T/1Y FAQ
1.How can I place an order for TEA19161T/1Y through Aetrix?
Please submit a Request for Quotation (RFQ) for TEA19161T/1Y on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TEA19161T/1Y reliable?
The price and inventory of TEA19161T/1Y are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TEA19161T/1Y is usually 5 days.
3.What payment methods are accepted for TEA19161T/1Y?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TEA19161T/1Y transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TEA19161T/1Y?
TEA19161T/1Y orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TEA19161T/1Y order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TEA19161T/1Y?
For technical support, including TEA19161T/1Y datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TEA19161T/1Y requirements.
6.How does Aetrix verify that TEA19161T/1Y is sourced from the original manufacturer or authorized distributors?
All TEA19161T/1Y products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TEA19161T/1Y meets industry standards.
7.What is the process for return or replacement of TEA19161T/1Y?
All TEA19161T/1Y units undergo pre-shipment inspection (PSI). If there is an issue with TEA19161T/1Y, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TEA19161T/1Y part is unused and in its original packaging.
Return procedure for TEA19161T/1Y:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TEA19161T/1Y Tags

-
UC3845AD8TR
Texas Instruments

-
UC2843AD8TR
Texas Instruments

-
LM3880MFX-1AE/NOPB
Texas Instruments

-
LM3880MFX-1AA/NOPB
Texas Instruments

-
INA234AIYBJR
Texas Instruments

-
INA700AYWFR
Texas Instruments

-
LM3880MF-1AE/NOPB
Texas Instruments

-
LM3880MF-1AA/NOPB
Texas Instruments

-
LM3881MM/NOPB
Texas Instruments

-
UCC2802DTR
Texas Instruments

-
NCP4305DMTTWG
onsemi
-
INA237AIDGSR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

