NXP Semiconductors TEA1999TK/1J
- Part No.:
- TEA1999TK/1J
- Manufacturer:
- NXP Semiconductors
- Category:
- Power Supply Controllers, Monitors
- Package:
- 8-VDFN Exposed Pad
- Datasheet:
-
TEA1999TK/1J.pdf
- Description:
- FLYBACK SR
- Quantity:
- Payment:

- Shipping:

Inventory:4,643
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TEA1999TK/1J from NXP Semiconductors is a GreenChip synchronous rectifier (SR) controller IC for flyback SMPS secondary-side operation, featuring adaptive gate drive, drain-source voltage sensing (−470 mV typical activation), 125 mA CAP pin charge current, and self-supply capability down to 0 V output voltage. It drives external SR MOSFETs in high-efficiency USB BC/QuickCharge adapters and low-voltage battery chargers.
For engineers reviewing the TEA1999TK/1J datasheet, TEA1999TK/1J pinout, TEA1999TK/1J application, or TEA1999TK/1J equivalent, key selection considerations include its HVSON8 package, 8-pin drain/source-sense architecture, UVLO with active gate pull-down, blanking-configurable minimum on-time (0.7–1.5 μs), and support for both high-side and low-side rectification without auxiliary winding.
Technical Context
The TEA1999TK/1J implements a dedicated synchronous rectification control loop using differential sensing between DRAIN and SOURCE pins to regulate the SR MOSFET's RDS(on) conduction via adaptive gate voltage-maintaining −25 mV typical regulation level. Its SOI process enables robust 120 V drain sense tolerance and fast 40 ns activation/deactivation timing.
It integrates dual supply management: CAP pin self-charging from DRAIN (15 mA start-up, 125 mA normal) or XV pin (regulated to ≤10.7 V), enabling operation across 0–26 V output ranges. The ENABLE and BLANKING pins provide CCM control and frequency-optimized blanking (0.7 μs at 300 kHz or 1.5 μs at 150 kHz).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Range (XV) | 0 V to 21 V - supports direct connection to output or auxiliary rail; regulates gate drive voltage accordingly |
| Drain Sense Voltage | −0.8 V to +120 V - enables reliable operation with high dv/dt flyback waveforms and high-side configurations |
| Driver Regulation Voltage | −25 mV typical - maintains precise SR MOSFET on-resistance control during conduction phase |
| Gate Drive Current | 0.70 A source / 0.50 A sink - ensures fast turn-on/turn-off of standard and logic-level SR MOSFETs |
| UVLO Threshold | 3.7 V start / 3.6 V stop on CAP pin - guarantees clean enable/disable with active 3 Ω gate pull-down during lockout |
| Min Active Time | 0.7 μs (BLANKING = GND) or 1.5 μs (BLANKING = CAP) - selectable for 150–300 kHz switching frequencies |
| Thermal Resistance | 57 K/W junction-to-ambient - validated on JEDEC test board; supports 1 W dissipation at Tamb = 90 °C |
Pinout & Package
HVSON8 package (SOT782-1): plastic thermal-enhanced very thin small outline, 3 mm × 3 mm × 0.85 mm body, no leads, 8 terminals.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GATE (1) | SR MOSFET gate driver output | Delivers up to 0.7 A source / 0.5 A sink; max output voltage tracks CAP pin (4.9–10.7 V) |
| SOURCE (2) | SR MOSFET source sense input | High-impedance reference for differential VDS measurement; minimizes PCB layout error sensitivity |
| ENABLE (3) | SR operation enable/disable control | Logic-high (>1.6 V) enables SR; open or XV-connected enables; ground disables for CCM or fault protection |
| XV (4) | External supply input | Accepts 0–26 V; regulates internal gate drive voltage and charges CAP when ≥4.7 V |
| CAP (5) | Internal supply capacitor node | Stores energy for IC operation; charged from DRAIN (15 mA start-up) or XV (125 mA normal) |
| BLANKING (6) | Minimum on-time configuration | GND selects 0.7 μs for 300 kHz; CAP selects 1.5 μs for ≤150 kHz; prevents false turn-off from ringing |
| GND (7) | Power and signal reference ground | Dedicated low-impedance return path; separate from power ground to avoid sensing errors |
| DRAIN (8) | SR MOSFET drain sense input | Handles −0.8 V to +120 V transients; initiates turn-on at −470 mV VDS; triggers 250 mV fast turn-off |
Key Features
| Feature | Design Value |
|---|---|
| Adaptive gate drive | Maintains −25 mV VDS regulation during conduction, minimizing RDS(on) loss across load range |
| Self-supply capability | Operates with 0 V output voltage or high-side rectification-no auxiliary winding required |
| Drain sense ruggedness | Withstands 120 V transient spikes and −0.8 V negative excursions, enabling robust flyback secondary design |
| Low no-load current | <250 μA typical - reduces standby power in Energy Star and EU CoC Tier 2 compliant adapters |
| Overtemperature protection | 165 °C trip with 20 °C hysteresis; actively pulls GATE low to prevent thermal runaway |
Applications
| USB PD & QuickCharge Adapters | Low-Voltage Battery Chargers |
|---|---|
|
Use Scenario: 20–45 W wall adapters delivering variable 5–20 V output with tight efficiency requirements under light and heavy loads. IC Role / Device Role / Timing Role: Secondary-side synchronous rectifier controller managing SR MOSFET turn-on/turn-off timing based on transformer secondary voltage polarity and magnitude. Use Value: Enables >94% peak efficiency and <75 mW no-load consumption by replacing Schottky diodes with actively controlled MOSFETs. |
Use Scenario: 5–12 V lithium-ion battery chargers for wearables and IoT devices where output voltage may drop to 0 V during deep discharge recovery. IC Role / Device Role / Timing Role: Self-powered SR controller operating without auxiliary winding, sustaining gate drive even at 0 V output via DRAIN-based CAP charging. Use Value: Eliminates need for auxiliary bias winding, reducing BOM count and transformer complexity while maintaining full SR functionality. |
| High-Side Flyback Supplies | CCM Mode Industrial SMPS |
|
Use Scenario: Isolated 12–24 V industrial power supplies using high-side SR MOSFET placement to simplify heatsinking and improve EMI performance. IC Role / Device Role / Timing Role: High-side SR controller deriving its supply from DRAIN pin and regulating gate voltage relative to SOURCE, not GND. Use Value: Enables high-side topology without floating supply or level-shifters-reducing component count and layout risk. |
Use Scenario: Constant-conduction-mode flyback converters in medical or industrial equipment requiring stable output under dynamic load steps. IC Role / Device Role / Timing Role: SR controller disabled via ENABLE pin during startup or overload, forcing diode conduction until regulation stabilizes. Use Value: Prevents erratic SR behavior during transient conditions while maintaining system reliability and safety compliance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous rectifier controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ON Semiconductor NCP4306DR2G | Fixed 5 V gate drive; no XV-regulated output; requires external bias supply above 5 V | Limited to low-output-voltage (<5 V) or auxiliary-wound designs; lacks self-supply capability | Choose when fixed 5 V drive suffices and auxiliary winding is already present |
| Vishay SiHP20N60E | Integrated 600 V SR MOSFET + driver; monolithic solution; no external MOSFET needed | Replaces discrete SR FET + controller combo; higher integration but less flexible MOSFET selection | Choose for space-constrained designs where 600 V rating and integrated FET meet requirements |
Compared with NCP4306DR2G, TEA1999TK/1J offers wider output voltage support (0–26 V) and true self-supply; versus SiHP20N60E, it provides full flexibility in SR MOSFET selection and optimized gate drive tuning for efficiency-critical designs.
Availability
TEA1999TK/1J is available at Aetrix Electronics and suitable for USB BC/QuickCharge adapters, low-voltage battery chargers, and high-side flyback power supplies requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant sourcing.
Supply support for TEA1999TK/1J includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer applications.
The TEA1999TK/1J belongs to NXP's GreenChip family of high-efficiency power conversion ICs, designed specifically to replace lossy diode rectifiers in flyback topologies and achieve >94% efficiency across universal AC input and wide output voltage ranges.
FAQ
What is the function of the BLANKING pin on the TEA1999TK/1J?
The BLANKING pin on the TEA1999TK/1J configures the minimum synchronous rectification active time: grounding it sets 0.7 μs for high-frequency operation up to 300 kHz, while connecting it to CAP selects 1.5 μs for ≤150 kHz. This prevents false turn-off caused by switching node ringing and ensures reliable MOSFET conduction timing in noisy flyback environments. The TEA1999TK/1J uses this setting to adapt its control loop to the specific converter's operating frequency.
Can the TEA1999TK/1J operate without an auxiliary winding?
Yes, the TEA1999TK/1J can operate without an auxiliary winding. It achieves self-supply by charging the CAP pin capacitor directly from the DRAIN pin during positive voltage phases-even at 0 V output voltage-and supports high-side rectification by deriving gate drive referenced to SOURCE rather than GND. This eliminates dependency on auxiliary windings in battery charging and low-voltage adapter applications. The TEA1999TK/1J leverages its SOI process and internal regulator to sustain operation across the full 0–26 V output range.
What is the maximum drain sense voltage supported by the TEA1999TK/1J?
The TEA1999TK/1J supports a maximum drain sense voltage of +120 V on the DRAIN pin, with a minimum of −0.8 V, per IEC 60134 limiting values. This rating enables robust operation in universal-input (90–264 VAC) flyback converters where reflected primary-side transients appear on the secondary winding. The TEA1999TK/1J maintains accurate sensing and fast turn-off response even under these high-voltage, high-dv/dt conditions.
How does the TEA1999TK/1J regulate the SR MOSFET's conduction?
The TEA1999TK/1J regulates conduction by continuously sensing the voltage difference between DRAIN and SOURCE pins and adjusting the GATE output to maintain −25 mV (typical) regulation level during the on-state. When VDS exceeds this threshold, it increases gate voltage; when below, it decreases it-dynamically optimizing RDS(on) across load and temperature. The TEA1999TK/1J implements this closed-loop control without external compensation components.
Does the TEA1999TK/1J support both high-side and low-side SR MOSFET configurations?
Yes, the TEA1999TK/1J supports both high-side and low-side synchronous rectifier configurations. In high-side mode, it derives supply from the DRAIN pin and references all sensing to SOURCE-not GND-enabling direct gate drive without floating supplies or level shifters. In low-side mode, it operates conventionally with GND-referenced SOURCE. The TEA1999TK/1J's architecture and pinout are explicitly designed for seamless transition between both topologies.
TEA1999TK/1J Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- GreenChip™
- Package/Case:
- 8-VDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Applications:
- Active/Synchronous Rectification Controller
- Voltage - Input:
- -
- Voltage - Supply:
- 0V ~ 21V
- Current - Supply:
- 250 µA
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-HVSON (3x3)
TEA1999TK/1J FAQ
1.How can I place an order for TEA1999TK/1J through Aetrix?
Please submit a Request for Quotation (RFQ) for TEA1999TK/1J on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TEA1999TK/1J reliable?
The price and inventory of TEA1999TK/1J are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TEA1999TK/1J is usually 5 days.
3.What payment methods are accepted for TEA1999TK/1J?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TEA1999TK/1J transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TEA1999TK/1J?
TEA1999TK/1J orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TEA1999TK/1J order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TEA1999TK/1J?
For technical support, including TEA1999TK/1J datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TEA1999TK/1J requirements.
6.How does Aetrix verify that TEA1999TK/1J is sourced from the original manufacturer or authorized distributors?
All TEA1999TK/1J products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TEA1999TK/1J meets industry standards.
7.What is the process for return or replacement of TEA1999TK/1J?
All TEA1999TK/1J units undergo pre-shipment inspection (PSI). If there is an issue with TEA1999TK/1J, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TEA1999TK/1J part is unused and in its original packaging.
Return procedure for TEA1999TK/1J:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TEA1999TK/1J Tags

-
UC3845AD8TR
Texas Instruments

-
UC2843AD8TR
Texas Instruments

-
LM3880MFX-1AE/NOPB
Texas Instruments

-
LM3880MFX-1AA/NOPB
Texas Instruments

-
INA234AIYBJR
Texas Instruments

-
INA700AYWFR
Texas Instruments

-
LM3880MF-1AE/NOPB
Texas Instruments

-
LM3880MF-1AA/NOPB
Texas Instruments

-
LM3881MM/NOPB
Texas Instruments

-
UCC2802DTR
Texas Instruments

-
NCP4305DMTTWG
onsemi
-
INA237AIDGSR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

