NXP Semiconductors TEA1999TK/2J

Overview

TEA1999TK/2 from NXP Semiconductors is a GreenChip synchronous rectifier (SR) controller IC for flyback SMPS secondary-side rectification, featuring adaptive gate drive, drain-source voltage sensing, self-supply capability down to 0 V output, and operation with standard or logic-level SR MOSFETs. It targets high-efficiency USB BC, QuickCharge, and low-voltage battery charging applications.

For engineers reviewing the TEA1999TK/2 datasheet, TEA1999TK/2 pinout, TEA1999TK/2 application, or TEA1999TK/2 equivalent, this page delivers verified functional identity, HVSON8 package mapping, confirmed 8-pin terminal roles, real-world gate drive specs (0.7 A source / 0.5 A sink), and validated alternatives for flyback SR design.

Technical Context

The TEA1999TK/2 implements adaptive regulation of the SR MOSFET's gate voltage by sensing the drain-source differential (V_DS) and maintaining it at −25 mV during conduction. Its dual-supply architecture uses either the DRAIN pin (up to 120 V) or XV pin (0–21 V) to charge the internal CAP capacitor, enabling self-powered operation in both low-output-voltage and high-side rectification topologies.

It integrates blanking input for selectable minimum on-time (0.7 μs or 1.4 μs), UVLO with active gate pull-down (3.6 V stop / 3.7 V start), overtemperature protection (165 °C trip), and enable control for CCM operation or short-circuit disable. All functions are implemented in Silicon-On-Insulator (SOI) process for robustness and efficiency.

Key Specifications

Pinout & Package

HVSON8 package (SOT782-1): plastic thermal-enhanced very thin small outline, 3 mm × 3 mm × 0.85 mm body, no leads, 8 terminals.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous rectifier controller applications.

Compared with NCP4306DR2G and IRS11682PBF, the TEA1999TK/2 uniquely combines self-supply capability, adaptive −25 mV V_DS regulation, and ultra-low no-load current - making it optimal for compact, high-efficiency, low-voltage USB and battery charging designs where auxiliary windings must be eliminated.

Availability

TEA1999TK/2 is available at Aetrix Electronics and suitable for USB PD adapters, low-voltage battery chargers, and high-side flyback power supplies requiring stable component supply, long-term lifecycle support, and RoHS-compliant sourcing.

Supply support for TEA1999TK/2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer electronics.

The TEA1999TK/2 belongs to NXP's GreenChip family of high-efficiency power management ICs, designed specifically to replace secondary-side diodes in flyback converters with intelligent synchronous rectification for energy-efficient AC-DC conversion.

FAQ

What is the primary function of the TEA1999TK/2 in a flyback power supply?

The TEA1999TK/2 serves as a dedicated synchronous rectifier controller on the secondary side of flyback converters. It senses the drain-source voltage of an external SR MOSFET and drives its gate to replace the conventional output rectifier diode, thereby reducing conduction losses and improving overall efficiency - especially at light and medium loads. Its adaptive regulation maintains precise −25 mV V_DS during conduction, which is central to the TEA1999TK/2's performance advantage.

Can the TEA1999TK/2 operate without an auxiliary winding in high-side rectification?

Yes, the TEA1999TK/2 supports true high-side rectification without an auxiliary winding. It achieves this through self-supply capability: the DRAIN pin can charge the internal CAP capacitor from the SR MOSFET's drain node, even when the output voltage is below 4.7 V. This feature is explicitly confirmed in the datasheet Section 2.2 and Figure 11, making the TEA1999TK/2 uniquely suited for compact, winding-free high-side flyback designs.

What are the key differences between the TEA1999TK/2 and the TEA1999TK/1 variant?

The TEA1999TK/2 is the production-grade version qualified for volume manufacturing, whereas the TEA1999TK/1 is an earlier engineering sample or qualification variant. Per NXP's ordering information (Table 1), only the TEA1999TK/2 is listed with SOT782-1 (HVSON8) packaging and full production status. The /2 suffix denotes final specification compliance, thermal validation, and guaranteed availability - critical for production release of the TEA1999TK/2.

How does the BLANKING pin affect switching behavior in the TEA1999TK/2?

The BLANKING pin configures the minimum synchronous rectification active time (t_act(sr)(min)): connecting it to GND sets 0.7 μs for high-frequency operation (up to 300 kHz), while connecting it to CAP sets 1.4 μs for lower-frequency designs (up to 150 kHz). This blanking time prevents false turn-off caused by voltage ringing at the DRAIN pin during switching transitions - a critical timing parameter directly specified in Table 7 and Section 8.9 of the TEA1999TK/2 datasheet.

Does the TEA1999TK/2 support both standard and logic-level SR MOSFETs?

Yes, the TEA1999TK/2 supports both standard and logic-level SR MOSFETs via its programmable gate drive voltage. When the XV pin is tied to the output (e.g., 5 V), the gate driver regulates to ~4.9 V - sufficient for logic-level devices. When XV is grounded, the driver regulates to ~10 V, enabling full enhancement of standard MOSFETs with higher V_GS(th). This dual-mode capability is documented in Sections 2.2 and 8.5, and confirmed by the VG(max) vs. XV voltage curves in Figure 4 of the TEA1999TK/2 datasheet.