NXP Semiconductors TEA2016AAT/1/S30Y
- Part No.:
- TEA2016AAT/1/S30Y
- Manufacturer:
- NXP Semiconductors
- Category:
- Power Supply Controllers, Monitors
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TEA2016AAT/1/S30Y.pdf
- Description:
- DCM/QR PFC + RESONANT POWER SUPP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TEA2016AAT/1/S30Y from NXP Semiconductors is a digital configurable LLC and PFC combo controller in SO16 package for high-efficiency resonant power supplies. It integrates both DCM/QR-mode PFC control and LLC resonant control, regulates output power via primary capacitor voltage (ΔVCAP), supports three programmable operating modes (high-power/low-power/burst), and delivers <75 mW no-load input power in combination with TEA1995T. It is used in desktop PC and LCD TV power supplies.
For engineers reviewing the TEA2016AAT/1/S30Y datasheet, TEA2016AAT/1/S30Y pinout, TEA2016AAT/1/S30Y application, or TEA2016AAT/1/S30Y equivalent, key selection considerations include its VCAP-based regulation architecture, independently configurable protections (OCP, OVP, OTP, OPP, CMR), SO16 narrow-body packaging, and support for Energy Star/EuP-compliant 90–500 W designs without auxiliary supplies.
Technical Context
The TEA2016AAT/1/S30Y implements a digital hardware state machine-not firmware-based-ensuring deterministic real-time response for LLC and PFC control loops. Its regulation relies on measured ΔVSNSCAP (divided primary resonant capacitor voltage) rather than frequency modulation, enabling linear output power control and stable loop gain across load range.
It features integrated high-voltage start-up via DRAINPFC, bootstrap-supplied high-side gate drive (SUPHS powered by GATELS/HB node), and dual-domain protection with independent configuration of latched/safe-restart behavior per fault. All settings-including mode transition thresholds, soft-start timing, and audible-noise suppression-are stored in multi-time programmable (MTP) memory and secured against unauthorized readout.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| PFC Mode | DCM and QR operation-enables high efficiency at light loads and simplified boost stage design without critical conduction mode complexity. |
| LLC Regulation Method | VCAP-based (SNSCAP input)-replaces frequency control with direct ΔVCAP measurement, delivering constant loop gain and eliminating load-dependent burst activation points. |
| No-Load Input Power | <75 mW (with TEA1995T)-eliminates need for auxiliary supply, reducing BOM count and improving standby compliance with Energy Star v3.0 and EU Eco-design. |
| Operating Modes | Three programmable modes: high-power (continuous switching), low-power (3-half-cycle bursts + hold period), and burst mode-each with independently set transition thresholds. |
| Protections | OCP, OVP, OTP (internal/external), OPP, OLP, CMR, UVP, brown-in/out, ICP-each configurable for latched, safe restart, or retry-limited behavior via MTP. |
| Package | SO16 (SOT109-1), 3.9 mm body width-low-profile surface-mount package compatible with automated assembly and thermal management in compact adapters. |
| Start-up Source | Integrated HV current source from DRAINPFC to SUPIC-enables direct AC-line start-up without external HV resistor network or auxiliary winding during initial charge. |
Pinout & Package
TEA2016AAT/1/S30Y is housed in a plastic small outline package (SO16, SOT109-1) with 16 leads and 3.9 mm body width. The package includes two unconnected high-voltage spacers (HVS pins 7 and 12) and integrates level-shifting, gate drivers, and HV start-up circuitry.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SNSMAINS) | Mains voltage & external temperature sense input | Enables line voltage feedforward and overtemperature detection using external NTC thermistor or resistor divider. |
| 2 (SNSBOOST) | Boost voltage sense input | Connects to resistive divider across PFC output; sets PFC regulation reference and start-up threshold (Vstart(SNSBOOST)). |
| 3 (SNSCURPFC) | PFC current sense input | Monitors PFC inductor current for DCM/QR mode control and overcurrent protection with adjustable blanking. |
| 4 (GND) | Ground reference | Common return for analog sensing, logic, and driver circuits; requires low-impedance PCB connection to minimize noise coupling. |
| 5 (GATEPFC) | PFC MOSFET gate driver output | Drives PFC switch with integrated level shift; supports standard Si or SiC MOSFETs up to 650 V drain rating. |
| 6 (GATELS) | LLC low-side MOSFET gate driver output | Drives LLC low-side switch and supplies bootstrap capacitor (CSUPHS) for high-side driver via external diode. |
| 7 & 12 (HVS) | High-voltage spacer | Unconnected isolation pads-no electrical function; maintain creepage distance between HV and LV sections on PCB. |
| 8 (DRAINPFC) | HV start-up source / X-cap discharge / valley detect | Internally connects to PFC drain; provides HV current source for SUPIC charging, active X-cap discharge, and PFC OVP/valley detection. |
| 9 (GATEHS) | LLC high-side MOSFET gate driver output | Floating driver output referenced to HB node; requires external bootstrap capacitor (CSUPHS) charged via GATELS and HB path. |
| 10 (SUPHS) | High-side driver floating supply input | Input for external bootstrap capacitor (CSUPHS); voltage must remain ≥10 V for reliable high-side turn-on under all load conditions. |
| 11 (HB) | Half-bridge node reference | Connects to midpoint between LLC MOSFETs; used for slope detection, valley/peak sensing, and bootstrap charging timing. |
| 13 (SUPIC) | IC supply input / HV start-up output | Primary supply pin charged initially by DRAINPFC; later supplied by LLC auxiliary winding; regulated at Vstart(SUPIC) = ~14.5 V during operation. |
| 14 (SNSCAP) | Resonant capacitor voltage sense input | Connects to divider across LLC resonant capacitor; enables VCAP-based regulation and accurate output power calculation (ΔVSNSCAP ∝ POUT). |
| 15 (SNSCURLLC) | LLC resonant current sense input | Measures half-bridge current via external shunt; used for zero-current switching detection, OCP, and capacitive mode regulation (CMR). |
| 16 (SNSFB) | Output voltage feedback / power-good output | Optocoupler input for secondary-side regulation; also outputs POWER_GOOD signal when VOUT is within ±5 % regulation window. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated X-capacitor discharge | Active discharge via DRAINPFC pin eliminates need for external bleed resistors, reducing standby losses and meeting IEC 62368-1 touch-current requirements. |
| VCAP-based regulation | Replaces frequency control with primary capacitor voltage sensing-enables precise, load-independent burst mode entry and stable loop dynamics across 0–100 % load. |
| Configurable low-power mode | 3-half-cycle switching + programmable hold period reduces magnetization and switching losses at light loads while maintaining regulation accuracy. |
| Secure MTP configuration | All operational parameters (mode thresholds, soft-start, protection timers) stored in encrypted multi-time programmable memory-prevents cloning and ensures design IP protection. |
| Valley/zero-voltage switching assurance | Hardware-level valley detection (via DRAINPFC/HB) and slope monitoring guarantee ZVS across full load range, minimizing switching losses in Si and SiC topologies. |
Applications
| Desktop PC Power Supply | LCD Television Power Supply |
|---|---|
Use Scenario: 240 W ATX-compatible power supply for mid-range desktop PCs requiring 80 PLUS Bronze certification and <100 mW no-load consumption. IC Role / Device Role / Timing Role: Primary-side digital controller managing both PFC and LLC stages; replaces discrete PWM+PFC ICs and eliminates auxiliary supply. Use Value: Achieves >90 % efficiency at 50 % load and <75 mW no-load input power with TEA1995T, meeting Energy Star 8.0 and DoE Level VI requirements without added components. | Use Scenario: Integrated main power supply for 43″–65″ LCD TVs with dynamic backlight dimming and variable load profiles. IC Role / Device Role / Timing Role: Dual-function controller executing synchronized PFC and LLC control; uses VCAP feedback to maintain tight output regulation during rapid load transients from backlight changes. Use Value: Enables single-stage, low-component-count design with programmable burst/low-power transitions that suppress audible noise during standby and partial-load operation. |
| Notebook Adapter | Printer Power Module |
Use Scenario: Compact 19.5 V/3.33 A (65 W) universal-input notebook adapter targeting UL62368-1 and CoC Tier 2 efficiency. IC Role / Device Role / Timing Role: Digital resonant controller implementing DCM PFC + LLC topology; manages high-side/low-side gate timing, X-cap discharge, and multi-level protection in one SO16 IC. Use Value: Reduces total component count by >30 % vs. analog solutions and achieves <80 mW no-load power-enabling USB-C PD-compliant compact form factors. | Use Scenario: 48 V/5 A (240 W) power module for multifunction laser printers with intermittent high-peak loads during fuser heating. IC Role / Device Role / Timing Role: High-reliability LLC+PFC controller providing burst-mode operation during idle periods and fast transient response during fuser activation. Use Value: Delivers >92 % peak efficiency and maintains <100 mW standby draw over 10-year lifecycle, supported by field-programmable protections (OTP, OPP, CMR) for thermal and overload robustness. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LLC+PFC controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCC28070DWR | Analog dual-channel PFC+PWM controller; no integrated LLC control, no VCAP regulation, no burst/low-power mode intelligence. | Requires external LLC controller and additional ICs for full resonant supply; higher BOM cost and layout complexity. | Choose UCC28070DWR only if existing analog design infrastructure exists and digital configurability is not required. |
| ICE5QSAG | Quasi-resonant flyback controller with integrated 650 V MOSFET; no PFC stage, no LLC capability, no digital configuration. | Limited to lower-power flyback topologies (<65 W); cannot implement high-efficiency 90–500 W resonant architectures. | Select ICE5QSAG only for cost-sensitive, low-power AC/DC applications where PFC+LLC integration is unnecessary. |
Compared with UCC28070DWR and ICE5QSAG, the TEA2016AAT/1/S30Y uniquely integrates digitally configurable PFC and LLC control in one SO16 package, delivers VCAP-based regulation for consistent light-load efficiency, and supports secure field updates-making it optimal for next-generation 90–500 W resonant power supplies targeting global energy regulations.
Availability
TEA2016AAT/1/S30Y is available at Aetrix Electronics and suitable for desktop PC power supplies, LCD television main supplies, and notebook adapters requiring stable component supply, long-term lifecycle support, and compliance with Energy Star, DoE Level VI, and EU Eco-design directives.
Supply support for TEA2016AAT/1/S30Y includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer applications.
The TEA2016AAT/1/S30Y belongs to NXP's GreenChip™ resonant power controller family, designed specifically to enable high-efficiency, low-standby-power AC/DC power supplies compliant with international energy regulations without auxiliary windings or external PFC controllers.
FAQ
What is the primary regulation method used by the TEA2016AAT/1/S30Y?
The TEA2016AAT/1/S30Y uses primary resonant capacitor voltage (ΔVCAP) sensing via the SNSCAP pin for output power regulation-replacing conventional frequency-based LLC control. This VCAP-based method provides linear power-to-voltage relationship, stable loop gain across load, and precise burst-mode activation independent of resonant component tolerances. The TEA2016AAT/1/S30Y calculates delivered power directly from ΔVSNSCAP, enabling accurate low-load efficiency and eliminating audible noise caused by frequency drift.
How does the TEA2016AAT/1/S30Y achieve <75 mW no-load input power?
The TEA2016AAT/1/S30Y achieves <75 mW no-load input power through three integrated mechanisms: (1) ultra-low quiescent current in burst and low-power modes, (2) active X-capacitor discharge via the DRAINPFC pin eliminating external bleed resistors, and (3) optimized gate drive and internal biasing that minimizes static losses. When paired with the TEA1995T half-bridge driver, the complete system meets Energy Star and EU Eco-design standby requirements without auxiliary supplies. The TEA2016AAT/1/S30Y itself contributes <15 mW to this total.
Can the TEA2016AAT/1/S30Y be used without an external microcontroller or programming tool?
Yes-the TEA2016AAT/1/S30Y operates autonomously after factory programming. All critical parameters (mode thresholds, protection levels, soft-start timing) are stored in on-chip multi-time programmable (MTP) memory and loaded at power-up. No external MCU, debug interface, or runtime programming is required for standard operation. Configuration is performed once using NXP's TEA2016 GUI and FlashTool; the TEA2016AAT/1/S30Y then executes fully self-contained control. Field updates are possible but optional.
What protection features are independently configurable in the TEA2016AAT/1/S30Y?
The TEA2016AAT/1/S30Y supports independent configuration of overcurrent (OCP), overvoltage (OVP), overpower (OPP), overtemperature (OTP), capacitive mode regulation (CMR), open-loop (OLP), and undervoltage (UVP) protections. Each can be set to latched shutdown, safe automatic restart, or latched after configurable retry attempts. Thresholds, blanking times, and hysteresis are programmable via MTP. These settings are retained across power cycles and secured against unauthorized access-ensuring robust, application-specific fault handling in the TEA2016AAT/1/S30Y.
Is the TEA2016AAT/1/S30Y pin-compatible with other NXP GreenChip controllers?
No-the TEA2016AAT/1/S30Y has a unique 16-pin SO16 (SOT109-1) pinout optimized for integrated PFC+LLC control, including dedicated SNSCAP, SNSCURLLC, and dual HV start-up pins (DRAINPFC/SUPIC). It is not pin-compatible with earlier NXP controllers like TEA1716T or UBA2213. Migration requires PCB layout revision. However, NXP provides migration guides and reference designs to simplify redesign. The TEA2016AAT/1/S30Y's pin assignment reflects its VCAP-based architecture and cannot be substituted without functional compromise.
TEA2016AAT/1/S30Y Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Applications:
- Digital Power Controller
- Voltage - Input:
- -
- Voltage - Supply:
- 0.5V ~ 2.65V, 2.35V ~ 4.5V
- Current - Supply:
- 4.8 mA
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SO
TEA2016AAT/1/S30Y FAQ
1.How can I place an order for TEA2016AAT/1/S30Y through Aetrix?
Please submit a Request for Quotation (RFQ) for TEA2016AAT/1/S30Y on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TEA2016AAT/1/S30Y reliable?
The price and inventory of TEA2016AAT/1/S30Y are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TEA2016AAT/1/S30Y is usually 5 days.
3.What payment methods are accepted for TEA2016AAT/1/S30Y?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TEA2016AAT/1/S30Y transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TEA2016AAT/1/S30Y?
TEA2016AAT/1/S30Y orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TEA2016AAT/1/S30Y order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TEA2016AAT/1/S30Y?
For technical support, including TEA2016AAT/1/S30Y datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TEA2016AAT/1/S30Y requirements.
6.How does Aetrix verify that TEA2016AAT/1/S30Y is sourced from the original manufacturer or authorized distributors?
All TEA2016AAT/1/S30Y products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TEA2016AAT/1/S30Y meets industry standards.
7.What is the process for return or replacement of TEA2016AAT/1/S30Y?
All TEA2016AAT/1/S30Y units undergo pre-shipment inspection (PSI). If there is an issue with TEA2016AAT/1/S30Y, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TEA2016AAT/1/S30Y part is unused and in its original packaging.
Return procedure for TEA2016AAT/1/S30Y:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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