STMicroelectronics TEA6425
- Part No.:
- TEA6425
- Manufacturer:
- STMicroelectronics
- Category:
- Video Processing
- Package:
- 20-DIP (0.300", 7.62mm)
- Datasheet:
-
TEA6425.pdf
- Description:
- IC MATRIX VID CELLULAR 20-DIP
- Quantity:
- Payment:

- Shipping:

Inventory:2,752
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Product details
Overview
TEA6425 from STMicroelectronics is a 6×8 analog video matrix switch IC with I²C control, designed for CVBS/SVHS signal routing in multi-source AV systems. It features 6 video inputs, 8 outputs, 15MHz bandwidth, programmable per-output gain (0.5/6.5dB), and individual 3-state output control for parallel device stacking.
For engineers reviewing the TEA6425 datasheet, TEA6425 pinout, TEA6425 application, or TEA6425 equivalent, key selection criteria include I²C sub-addressing (4-device daisy-chain), sync-bottom/average clamping per input, Y/C adder integration, and -60dB crosstalk at 5MHz in consumer-grade video switching designs.
Technical Context
The TEA6425 implements a fully configurable 6×8 analog video switch matrix with two internal Y/C adders for SVHS composite generation. Each of the six inputs supports programmable clamp mode (sync-bottom or average DC level), and all eight outputs are independently controllable for gain (0.5dB or 6.5dB) and high-impedance state via I²C.
I²C interface supports standard/fast-mode timing (up to 400kHz), 4-level sub-address detection on Pin 7, and slave address 0x4A. Power supply is single 8V (7.2–8.8V), with 60mA typical supply current and thermal resistance Rth(j-a) = 80°C/W in DIP20 package.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Video Inputs / Outputs | 6 independent CVBS/SVHS inputs; 8 buffered, individually switchable outputs |
| Bandwidth | 15MHz @ -3dB - supports full NTSC/PAL baseband video fidelity |
| Output Gain Options | Selectable 0.5dB or 6.5dB per output - matches source drive strength and load termination |
| Crosstalk | -60dB @ 5MHz - ensures minimal interference between active video channels |
| Clamp Modes | Per-input programmable sync-bottom or average-value clamping - stabilizes DC restoration across mixed sources |
| I²C Sub-addresses | 4 selectable addresses via Pin 7 voltage levels - enables up to four TEA6425s on one bus without conflict |
| 3-State Output Control | Individual tri-state enable per output - allows wired-OR connection of multiple devices for expanded routing |
Pinout & Package
TEA6425 is available in 20-pin plastic DIP (order code TEA6425) and SO20L micropackage (TEA6425D), both with identical pin functions and thermal characteristics (Rth(j-a) = 80°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1–IN6 (Pins 1,3,5,6,8,10) | Video Input Channels | Analog CVBS/SVHS signal inputs with programmable clamp circuitry |
| OUT1–OUT8 (Pins 12–19) | Switched Video Outputs | Buffered outputs with selectable gain and independent 3-state control |
| SDA / SCL (Pins 2,4) | I²C Data / Clock | Standard-mode/fast-mode bidirectional bus interface (max 400kHz) |
| SUB (Pin 7) | Sub-address Selection | 4-level voltage detector sets device address (GND, VCC/3, 2VCC/3, open) |
| VCC / VCCP (Pins 9,20) | Power Supply | Primary 8V supply (VCC) and auxiliary power (VCCP) for output buffers |
| GND (Pin 11) | Ground Reference | Common analog/digital return for signal integrity and clamp reference |
Key Features
| Feature | Design Value |
|---|---|
| 6×8 Full Matrix Switching | Any input can be routed to any output under I²C command - eliminates manual patching in multi-source AV hubs |
| Dual Internal Y/C Adders | Two dedicated outputs support real-time Y+C mixing for SVHS signal generation without external components |
| Per-Output Gain Control | 0.5dB or 6.5dB setting per output - compensates for varying source levels and cable losses |
| Programmable Input Clamp | Sync-bottom or average-value clamping per input - maintains consistent black level across tuners, SCART, and PIP processors |
| Parallel Device Stacking | 4-device I²C addressing + per-output 3-state - scales routing capacity while preserving PCB layout simplicity |
Applications
| Multi-Source TV Tuner Hub | SCART-Based AV Switcher |
|---|---|
Use Scenario: Central video routing node aggregating signals from 3 tuners, 2 SVHS decks, and 1 PIP processor into 3 SCART outputs and 2 internal processing paths. IC Role / Device Role / Timing Role: Analog matrix switch with Y/C adder - selects, gains, clamps, and mixes baseband video streams before distribution. Use Value: Eliminates discrete analog switches and op-amps; reduces BOM count by 12+ components while enabling dynamic source reassignment via firmware. | Use Scenario: Consumer AV switcher supporting 3 SCART inputs (CVBS), 2 SVHS inputs (Y+C), and 3 SCART outputs with selectable pass-through or processed routing. IC Role / Device Role / Timing Role: Configurable video router with per-channel DC restoration - maintains stable black level and amplitude across mixed legacy sources. Use Value: Enables plug-and-play source selection without manual level trimming; -60dB crosstalk prevents ghosting during simultaneous output use. |
| Picture-in-Picture (PIP) Processor Interface | Multi-Display Set-Top Box |
Use Scenario: Feeding main video path and secondary PIP window from shared tuner and decoder resources in integrated digital TV platforms. IC Role / Device Role / Timing Role: Dual-path video distributor with independent gain/clamp - routes primary stream to main display and scaled/processed stream to PIP buffer. Use Value: Per-output 3-state control allows time-multiplexed sharing of one video DAC between main and PIP paths without signal contention. | Use Scenario: Supporting simultaneous output to CRT monitor (CVBS), LCD panel (Y/C), and HDMI encoder (via CVBS-to-digital conversion) in compact set-top boxes. IC Role / Device Role / Timing Role: Signal conditioner and multiplexer - applies consistent gain and clamp before splitting to heterogeneous display interfaces. Use Value: 15MHz bandwidth preserves edge sharpness in text overlays; programmable clamp avoids brightness shifts when switching between broadcast and stored content. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar analog video matrix switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4392 | Single 4×4 matrix, no I²C control, fixed 6dB gain, no clamp or Y/C adder | Requires external microcontroller GPIO and level-shifting for switching; limited to simpler 4-source systems | Choose for cost-sensitive, low-channel-count designs where firmware control is not required |
| AD8170 | 3×3 matrix with RGB support, 300MHz bandwidth, no integrated clamp or sub-addressing | Targeted at high-speed RGB/component video, not CVBS/SVHS; lacks video-specific DC restoration | Choose only for component video routing where bandwidth >100MHz is mandatory |
Compared with MAX4392 and AD8170, the TEA6425 uniquely integrates I²C-configurable clamping, dual Y/C adders, and 4-device stacking-making it the only solution that replaces discrete clamp/gain/switch circuits in multi-standard CVBS/SVHS consumer AV equipment.
Availability
TEA6425 is available at Aetrix Electronics and suitable for multi-source TV tuner hubs, SCART-based AV switchers, PIP processor interfaces, and multi-display set-top boxes requiring stable component supply and long-term obsolescence management.
Supply support for TEA6425 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in analog, power, and automotive ICs with strong heritage in consumer video and broadcast solutions.
The TEA6425 belongs to ST's legacy video interface product line, engineered specifically for analog signal routing in European and Asian consumer AV equipment compliant with SCART, PAL, and NTSC standards.
FAQ
What video standards does the TEA6425 support?
The TEA6425 supports CVBS (composite video baseband signal), SVHS (Y/C separated), MAC, and baseband CVBS formats. Its 15MHz bandwidth and sync-bottom clamping meet NTSC and PAL timing requirements, and its input structure accommodates both 1VPP and 2VPP signal amplitudes common in SCART and tuner outputs.
How does the SUB pin enable multi-device operation?
The SUB pin (Pin 7) accepts four distinct voltage levels - GND, VCC/3, 2VCC/3, or open - each selecting one of four I²C sub-addresses (0x90, 0x96, 0x94, 0x92). This allows up to four TEA6425s to share a single I²C bus without address collision, enabling scalable 24-input/32-output routing with unified firmware control.
Can the TEA6425 drive 75Ω coaxial cables directly?
Yes - each output provides 4.7kΩ source impedance and is specified for 75Ω loads with ≤20pF capacitance. The 6.5dB gain setting delivers sufficient drive level (≥1.25VPP sync tip) into 75Ω, and the -60dB crosstalk ensures signal integrity even when multiple outputs drive adjacent coax runs on the same PCB.
Is there a recommended power supply decoupling scheme?
STMicroelectronics recommends 22µF electrolytic + 220nF ceramic capacitors on VCC (Pin 9), plus separate 220nF ceramics on VCCP (Pin 20) and each output pair. Ground planes must be solid and uninterrupted beneath the IC; the GND pin (Pin 11) should connect directly to the analog ground plane with minimal trace length to maintain clamp reference stability.
TEA6425 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 20-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Function:
- Cellular Matrix
- Applications:
- Professional Video
- Standards:
- -
- Control Interface:
- I2C
- Voltage - Supply:
- 7.2V ~ 8.8V
- Mounting Type:
- Through Hole
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 20-DIP
TEA6425 FAQ
1.How can I place an order for TEA6425 through Aetrix?
Please submit a Request for Quotation (RFQ) for TEA6425 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TEA6425 reliable?
The price and inventory of TEA6425 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TEA6425 is usually 5 days.
3.What payment methods are accepted for TEA6425?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TEA6425 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TEA6425?
TEA6425 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TEA6425 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TEA6425?
For technical support, including TEA6425 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TEA6425 requirements.
6.How does Aetrix verify that TEA6425 is sourced from the original manufacturer or authorized distributors?
All TEA6425 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TEA6425 meets industry standards.
7.What is the process for return or replacement of TEA6425?
All TEA6425 units undergo pre-shipment inspection (PSI). If there is an issue with TEA6425, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TEA6425 part is unused and in its original packaging.
Return procedure for TEA6425:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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