Texas Instruments THS1408EVM

Overview

THS1408EVM from Texas Instruments is an evaluation module designed to characterize the THS1408 14-bit, 40-MSPS analog-to-digital converter under controlled signal, reference, and supply conditions. It supports true differential or transformer-coupled single-ended analog inputs, offers multiple clock sources (external AC/DC-coupled, onboard 8-MHz oscillator, or DSP timer), and interfaces via dual 80-pin daughtercard connectors compliant with TMS320C6000 specifications.

For engineers reviewing the THS1408EVM datasheet, THS1408EVM pinout, THS1408EVM application, or THS1408EVM equivalent, this page provides verified hardware configuration details, jumper-controlled operational modes, power architecture options (split analog/digital or daughtercard-sourced), interrupt routing (INT and FOVL), and CPLD-based address decode logic for direct ADC read/write cycles with C6x0x DSPs.

Technical Context

The THS1408EVM implements a four-layer FR-4 PCB (100 mm × 86 mm) with dedicated analog and digital power domains, configurable SMB input interfaces (J10/J11), and flexible clock routing through U7 (SN74AHC14D inverter), U6 (8-MHz DIL oscillator), or U10 (8-MHz SMD oscillator). Jumper settings (H3–H9, H12–H15) determine input mode, clock source, chip enable mapping (C6xxx vs C5xxx motherboards), and hardware loopback.

Address decode and control logic is implemented in a Xilinx XC9536XL CPLD (U9), which maps DSP address lines (OUT_EA2–OUT_EA6), strobes (OUT_ARE/OUT_AWE), and chip enable (OUT_CE/OUT_IS) to generate ADCCSB, buffer direction signals (ABUFDIR/ABUFDIRB), and data bus enable (ABUFOEB). The CPLD also handles loopback-mode inversion of BIDIR_ED13 to reconcile ADC binary and DAC 2's-complement power-up states.

Key Specifications

Availability

THS1408EVM is available at Aetrix Electronics and suitable for high-speed data acquisition prototyping, mixed-signal test bench validation, and TI C6000 DSP-based embedded system development requiring stable component supply and documented reference hardware.

Supply support for THS1408EVM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and digital signal processing technologies.

The THS1408EVM belongs to TI's precision data converter evaluation platform family, engineered to accelerate validation of high-speed ADCs in communication infrastructure, test equipment, and real-time signal processing applications.

FAQ

What is the THS1408EVM used for?

The THS1408EVM is a Texas Instruments evaluation module specifically built to evaluate the THS1408 14-bit, 40-MSPS analog-to-digital converter. It enables hardware and software engineers to validate performance under varying analog input configurations (differential or single-ended), clock sources (external, oscillator, or DSP timer), power schemes (split or shared), and interface conditions with TMS320C6000-family DSPs. The THS1408EVM itself contains no active conversion circuitry-it hosts and exercises the THS1408PFB device.

Does the THS1408EVM support both THS1408 and THS56xx devices?

No. Although the board name includes "THS14xx/5691EVM", the documentation explicitly states that only the THS14XX device family and associated circuitry are supported in this implementation. The THS56XX DAC portion remains unpopulated and unsupported-U5 (THS56XXVF) is listed as uninstalled, and the user's guide confirms DAC functionality is deferred to a future revision. The THS1408EVM is functionally dedicated to the THS1408 ADC.

What clock sources does the THS1408EVM support for the THS1408 ADC?

The THS1408EVM supports four clock source configurations for the THS1408 ADC: (1) external AC-coupled signal via SMB connector J3, (2) external DC-coupled signal via J3, (3) onboard 8-MHz HCMOS crystal oscillator (U6, DIL-14), and (4) DSP timer output routed through J2 pin 45 (OUT_TOUT). Selection is controlled by jumper settings on H3, H5, and H6 per Table 3–3 in the SLAU045A user's guide. All sources operate at +3.3 V logic levels compatible with the THS1408.

How is analog input configured on the THS1408EVM?

Analog input on the THS1408EVM is configured via SMB connectors J10 (positive) and J11 (negative) and jumper settings H7–H9. For true differential input, jumpers are set to H7 (1–2), H8 (2–3), H9 (1–2), enabling 50-Ω terminations. For single-ended input, jumpers are set to H7 (2–3), H8 (1–2), H9 (2–3), engaging transformer T2 for SE-to-diff conversion and using R27/R28 for 25-Ω impedance matching. The THS1408EVM does not support internal reference-THS1408 uses its on-chip reference per Section 3.1.3.

What role does the XC9536XL CPLD play on the THS1408EVM?

The Xilinx XC9536XL CPLD (U9) on the THS1408EVM implements all address decode and control logic. It converts TMS320C6000 daughtercard address/strobe signals (OUT_EA2–OUT_EA6, OUT_ARE, OUT_AWE, OUT_CE) into THS1408-specific control signals: ADCCSB (ADC chip select), ABUFDIR (ADC buffer direction), ABUFOEB (ADC data bus output enable), and ABUFDIRB (FOVL flag buffer control). It also manages loopback mode and inverts BIDIR_ED13 to align ADC binary and DAC 2's-complement data formats during loopback operation.