Texas Instruments THS2630SDGNR
- Part No.:
- THS2630SDGNR
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-PowerTSSOP, 8-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
THS2630SDGNR.pdf
- Description:
- THS2630SDGNR
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
THS2630SDGNR from Texas Instruments is a fully differential-input and differential-output amplifier optimized for high-speed, low-noise signal conditioning in precision analog front-ends. It delivers 187 MHz small-signal bandwidth (±15 V), 75 V/µs slew rate, –108 dBc THD at 250 kHz, and 1.1 nV/√Hz input voltage noise - enabling high-fidelity differential ADC driving in medical ultrasound and test equipment.
For engineers reviewing the THS2630SDGNR datasheet, THS2630SDGNR pinout, THS2630SDGNR application, or THS2630SDGNR equivalent, key selection criteria include VOCM-controlled output common-mode setting, ±17.5 V max supply capability, power-down functionality (THS2630S variant), HVSSOP thermal performance, and differential gain stability across 5 V to 35 V single/dual supply operation.
Technical Context
The THS2630SDGNR implements a true fully differential signal path from input to output using TI's high-voltage complementary bipolar process, supporting rail-to-rail output swing (±13.4 V @ ±15 V) and delivering 95 dB CMRR at 800 kHz. Its VOCM pin enables precise control of output common-mode voltage, critical for interfacing with differential ADCs requiring specific reference alignment.
It operates over –40°C to +85°C and supports both single-ended-to-differential conversion and differential-to-differential amplification. The internal VCM error amplifier and matched output buffers ensure balanced differential outputs, while resistor-matching sensitivity (≤1% recommended) directly impacts HD2, CMRR, and output balance error.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Small-signal bandwidth | 187 MHz at ±15 V supply - enables wideband signal acquisition up to ~150 MHz usable baseband. |
| Slew rate | 75 V/µs - supports fast transient response for high-amplitude, high-frequency signals without slewing distortion. |
| Total harmonic distortion | –108 dBc at 2 VPP, 250 kHz (±15 V) - ensures minimal spectral contamination in sensitive measurement chains. |
| Input voltage noise | 1.1 nV/√Hz at 10 kHz - preserves SNR in low-level signal amplification, especially critical in ultrasound receive paths. |
| Supply voltage range | ±2.5 V to ±17.5 V dual or 5 V to 35 V single - provides headroom for high-voltage differential signal chains without external level-shifting. |
| Common-mode rejection | 95 dB at 800 kHz - rejects board-level noise and coupling in mixed-signal PCB environments. |
| Output swing | ±13.4 V into 1 kΩ (±15 V supply) - maximizes dynamic range for 16+ bit ADC drivers. |
Pinout & Package
HVSSOP-8 (DGN) package: 3 mm × 4.9 mm body with exposed thermal pad; requires connection to large copper plane for thermal management per TI SLMA002/SLMA004 guidelines.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN− (1) | Negative differential input | Accepts inverted-phase input in fully differential mode; common-mode voltage must stay within –4 V to +4.5 V (±5 V supply). |
| VIN+ (8) | Positive differential input | Accepts non-inverted-phase input; forms true differential pair with VIN− for optimal CMRR and distortion performance. |
| VOCM (2) | Output common-mode control | DC voltage applied here sets output midpoint; floating defaults to midsupply; bypass with 0.1 µF to suppress noise. |
| VCC+ (3) | Positive supply rail | Supports up to +17.5 V; powers internal bias and output stages; requires local 0.1 µF + 10 µF decoupling. |
| VCC− (6) | Negative supply rail | Supports down to –17.5 V; referenced for PD pin threshold (1.4 V above VCC− for activation). |
| VOUT+ (4) | Positive differential output | Delivers amplified non-inverted signal; output impedance depends on feedback network and internal 10 kΩ resistors. |
| VOUT− (5) | Negative differential output | Delivers amplified inverted signal; paired with VOUT+ to form low-noise, balanced differential drive for ADC inputs. |
| PD (7) | Power-down enable (THS2630S only) | Active-low control; pulling ≤1.4 V above VCC− places outputs in >1 MΩ high-Z state; internal 250 kΩ pull-up to VCC+. |
Key Features
| Feature | Design Value |
|---|---|
| Fully differential I/O architecture | Eliminates need for external baluns or transformers when driving differential ADCs, reducing BOM count and layout complexity. |
| VOCM-controlled output common-mode | Enables direct interface with ADC reference voltages (e.g., VREF pins), avoiding level-shifter ICs and preserving DC accuracy. |
| High supply voltage capability (±17.5 V) | Supports full-scale signal swings in high-voltage ultrasound transceiver chains and industrial sensor interfaces without gain staging. |
| Low 1/f noise corner (85 Hz) | Maintains low-noise performance down to audio frequencies, critical for time-gain-control (TGC) amplifiers in medical imaging. |
| Thermal pad (HVSSOP only) | Reduces junction-to-board thermal resistance to 30.0 °C/W, enabling sustained 13+ mA quiescent current operation at +85°C ambient. |
Applications
| Medical Ultrasound Receive Path | Differential ADC Driver |
|---|---|
|
Use Scenario: Amplifying weak, wideband echo signals from piezoelectric transducers before digitization. IC Role / Device Role / Timing Role: Fully differential amplifier converting single-ended transducer output to balanced differential signal for 14–16-bit ADCs. Use Value: 1.1 nV/√Hz noise and –108 dBc THD preserve SNR and harmonic integrity across 0.5–15 MHz bandwidth. |
Use Scenario: Driving high-resolution SAR or pipeline ADCs in automated test equipment and data acquisition systems. IC Role / Device Role / Timing Role: Precision gain stage with VOCM alignment to ADC reference, ensuring optimal code distribution and linearity. Use Value: 95 dB CMRR rejects digital switching noise; ±13.4 V swing matches full-scale ADC input ranges under ±15 V supplies. |
| Single-Ended to Differential Conversion | Differential Antialiasing Filter Driver |
|
Use Scenario: Converting legacy single-ended sensor outputs (e.g., strain gauges, accelerometers) to differential format for noise immunity. IC Role / Device Role / Timing Role: Gain-setting FDA with resistor-programmable configuration (G = 1 to 10) and VOCM offset control. Use Value: Eliminates need for discrete op-amp pairs; 187 MHz bandwidth supports >50 MHz effective sampling rates post-conversion. |
Use Scenario: Buffering and amplifying output of active antialiasing filters prior to differential ADC input. IC Role / Device Role / Timing Role: Low-distortion, high-slew-rate driver maintaining filter phase response and preventing loading-induced roll-off. Use Value: 75 V/µs slew rate prevents step-response degradation; 245 MHz GBW ensures flat gain up to filter cutoff frequency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar fully differential amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| THS4561IRGT | Lower noise (0.89 nV/√Hz), lower bandwidth (1.5 GHz), no PD pin, smaller 1.6 mm × 2.1 mm WQFN package. | Better suited for RF/IF signal chains >100 MHz; lacks HVSSOP thermal pad for high-power continuous operation. | Choose THS4561IRGT for ultra-low-noise, high-frequency AC-coupled designs where thermal dissipation is less critical. |
| LMH5401RTVT | Higher bandwidth (4.5 GHz), higher supply current (32 mA), fixed-gain options, no VOCM pin - output common-mode set internally. | Targeted at high-speed communications (JESD204B); not configurable for arbitrary VOCM alignment required by precision ADCs. | Choose LMH5401RTVT for gigasample-rate data converters where VOCM flexibility is unnecessary and speed dominates. |
Compared with THS2630SDGNR, THS4561IRGT trades thermal robustness and VOCM configurability for lower noise and higher bandwidth, while LMH5401RTVT sacrifices VOCM control and power efficiency for extreme speed - making THS2630SDGNR optimal for precision, thermally demanding, medium-bandwidth differential ADC interfaces.
Availability
THS2630SDGNR is available at Aetrix Electronics and suitable for medical ultrasound systems, high-resolution data acquisition, automated test equipment, and industrial sensor signal conditioning requiring stable component supply and long-term manufacturability.
Supply support for THS2630SDGNR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in high-performance amplifier design and manufacturing.
The THS2630SDGNR belongs to TI's high-speed, low-noise fully differential amplifier product line, engineered specifically for precision differential signal conditioning in ultrasound, test & measurement, and high-fidelity data acquisition systems.
FAQ
What is the maximum supply voltage rating for THS2630SDGNR?
The THS2630SDGNR supports a maximum dual-supply voltage of ±17.5 V (35 V total), or a single-supply range of 5 V to 35 V. Exceeding ±17.5 V violates absolute maximum ratings and risks permanent damage. Operation at ±15 V is typical for high-dynamic-range applications like medical ultrasound, where it enables ±13.4 V output swing into 1 kΩ loads.
Does THS2630SDGNR include a power-down feature?
No - THS2630SDGNR does not include a power-down (PD) pin. That function is exclusive to the THS2630S variant (e.g., THS2630SDR). The THS2630SDGNR is the standard version without shutdown capability. If low-quiescent-current operation is required, the THS2630S in SOIC or VSSOP packages must be selected instead.
How should the VOCM pin be used in THS2630SDGNR circuits?
The VOCM pin on THS2630SDGNR sets the output common-mode voltage. For optimal performance, drive it with a low-impedance source (e.g., ADC VREF via 0.1 µF capacitor) or leave floating to default to midsupply. Avoid high-impedance sources, as VOCM input resistance is only 15 kΩ; mismatched drive impedances degrade CMRR and introduce offset errors.
What package type is THS2630SDGNR supplied in, and why does it matter?
THS2630SDGNR uses the HVSSOP-8 (DGN) package: 3 mm × 4.9 mm with an exposed thermal pad. This package achieves a junction-to-board thermal resistance of just 30.0 °C/W - critical for sustaining 12.4 mA quiescent current at +85°C ambient. Standard SOIC or VSSOP variants cannot dissipate equivalent power without derating.
Can THS2630SDGNR drive capacitive loads directly?
No - THS2630SDGNR requires isolation for capacitive loads >10 pF. Place a 20 Ω series resistor at each output (VOUT+, VOUT−) to maintain phase margin and prevent ringing or oscillation. This is mandatory for driving ADC input capacitance, PCB traces, or coaxial cables; omitting it degrades settling time and increases distortion.
THS2630SDGNR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-PowerTSSOP, 8-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Amplifier Type:
- Differential
- Number of Circuits:
- 1
- Output Type:
- Differential
- Slew Rate:
- 75V/µs
- Gain Bandwidth Product:
- 245 MHz
- -3db Bandwidth:
- 108 MHz
- Current - Input Bias:
- 4.8 µA
- Voltage - Input Offset:
- 100 µV
- Current - Supply:
- 8.9mA
- Current - Output / Channel:
- 85 mA
- Voltage - Supply Span (Min):
- 5 V
- Voltage - Supply Span (Max):
- 35 V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-HVSSOP
THS2630SDGNR FAQ
1.How can I place an order for THS2630SDGNR through Aetrix?
Please submit a Request for Quotation (RFQ) for THS2630SDGNR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for THS2630SDGNR reliable?
The price and inventory of THS2630SDGNR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for THS2630SDGNR is usually 5 days.
3.What payment methods are accepted for THS2630SDGNR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for THS2630SDGNR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for THS2630SDGNR?
THS2630SDGNR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your THS2630SDGNR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for THS2630SDGNR?
For technical support, including THS2630SDGNR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your THS2630SDGNR requirements.
6.How does Aetrix verify that THS2630SDGNR is sourced from the original manufacturer or authorized distributors?
All THS2630SDGNR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that THS2630SDGNR meets industry standards.
7.What is the process for return or replacement of THS2630SDGNR?
All THS2630SDGNR units undergo pre-shipment inspection (PSI). If there is an issue with THS2630SDGNR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The THS2630SDGNR part is unused and in its original packaging.
Return procedure for THS2630SDGNR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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