Texas Instruments THS3062DGNR
- Part No.:
- THS3062DGNR
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width) Exposed Pad
- Datasheet:
-
THS3062DGNR.pdf
- Description:
- IC OPAMP CFA 2 CIRCUIT 8HVSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,110
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
THS3062DGNR from Texas Instruments is a dual-channel, high-voltage, current-feedback amplifier optimized for low-distortion, high-slew-rate signal conditioning. It delivers 7000 V/μs slew rate at ±15 V supply, 120 MHz 0.1-dB flat bandwidth (G = 2), –81 dBc 3rd harmonic distortion at 10 MHz, ±145 mA output drive into 50 Ω, and operates from ±5 V to ±15 V supplies. It is used in high-fidelity video line drivers and VDSL line driver circuits requiring large linear output swing.
For engineers reviewing the THS3062DGNR datasheet, THS3062DGNR pinout, THS3062DGNR application, or THS3062DGNR equivalent, key selection criteria include its current-feedback architecture enabling stable high-gain bandwidth scaling, PowerPAD-enhanced thermal performance in MSOP-8 package, and verified distortion performance under 150 Ω load conditions per TI SLOS394B Rev. November 2009.
Technical Context
The THS3062DGNR employs a BiCOM-I complementary bipolar process with dielectric isolation, supporting fT > several GHz transistors. Its current-feedback topology decouples bandwidth from closed-loop gain via feedback resistor (Rf) selection-e.g., 560 Ω for G = 2, 357 Ω for G = 5-enabling 220 MHz –3 dB bandwidth at G = 10 while maintaining < 0.3 dB peaking in unity gain.
It features separate inverting (71 Ω) and noninverting (518 kΩ) input resistances, 2.6 nV/√Hz input voltage noise, and differential input voltage limit of ±3 V. The device requires external Rf/Rg networks for gain setting and exhibits 0.1 Ω closed-loop output impedance at 1 MHz, ensuring robust drive into reactive loads.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Unity Gain Bandwidth | 300 MHz - Enables stable operation up to 10 MHz with < –81 dBc HD3 when driving 150 Ω. |
| Slew Rate (G = 2) | 5700 V/μs - Supports 10 V-step transitions in ≤2 ns with 0.1% settling in 30 ns. |
| 0.1-dB Flat Bandwidth | 120 MHz (G = 2, ±15 V) - Ensures minimal amplitude error across NTSC/PAL video baseband. |
| 3rd Harmonic Distortion | –81 dBc @ 10 MHz, G = 2, RL = 150 Ω - Meets broadcast-grade differential gain/phase specs (0.02%/0.01°). |
| Output Current Drive | ±145 mA into 50 Ω - Sustains full-scale 2 VPP output at 10 MHz without clipping or compression. |
| Supply Voltage Range | ±5 V to ±15 V - Compatible with legacy ±12 V and modern ±5 V systems; max rating ±16.5 V. |
| Input Voltage Noise | 2.6 nV/√Hz - Dominates system noise floor only when source impedance < 1 kΩ. |
Pinout & Package
The THS3062DGNR is housed in an 8-pin MSOP package with PowerPAD™ thermally enhanced bottom pad (DGN). The PowerPAD must be soldered to a PCB copper plane for thermal management; it is electrically isolated from all pins.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (VOUT1) | Channel 1 output | Delivers amplified signal; drives 50–150 Ω loads directly; requires local 0.1 µF bypass to VS–. |
| 2 (VIN1–) | Channel 1 inverting input | Low-impedance node (71 Ω); connects to feedback network; sensitive to layout parasitics. |
| 3 (VIN1+) | Channel 1 noninverting input | High-impedance node (518 kΩ); referenced to ground or common-mode bias; 1 pF capacitance. |
| 4 (VS–) | Negative supply rail | Return path for both channels; must be low-inductance; ties to PowerPAD thermal plane. |
| 5 (VS+) | Positive supply rail | Power input for both channels; requires 10 µF + 0.1 µF local decoupling per rail. |
| 6 (VOUT2) | Channel 2 output | Independent output; identical drive capability and AC specs as VOUT1. |
| 7 (VIN2–) | Channel 2 inverting input | Matches VIN1– electrical characteristics; routed separately to avoid crosstalk. |
| 8 (VIN2+) | Channel 2 noninverting input | Matches VIN1+; maintains channel-to-channel isolation > 80 dB at 10 MHz. |
Key Features
| Feature | Design Value |
|---|---|
| Current-feedback architecture | Enables scalable bandwidth (220 MHz @ G = 10) without sacrificing phase margin or stability. |
| PowerPAD thermal package (DGN) | Reduces θJA to 58.4°C/W, allowing 680 mW continuous dissipation at TA = 85°C. |
| Dual independent channels | Eliminates inter-channel crosstalk in differential line drivers; supports true dual-output video or VDSL applications. |
| High output current (±145 mA) | Drives 150 Ω video loads or twisted-pair telephone lines without external buffers. |
| Low harmonic distortion (–81 dBc HD3) | Meets SMPTE 253M and ITU-T G.993.1 requirements for analog video and VDSL2 transmission. |
Applications
| Video Line Driver | VDSL2 Line Driver |
|---|---|
Use Scenario: Driving composite NTSC/PAL video signals over 75 Ω coaxial cable to multiple monitors or distribution amplifiers. IC Role / Device Role / Timing Role: Final-stage buffer amplifier providing gain, level-shifting, and 75 Ω source termination. Use Value: 0.02% differential gain and 0.01° differential phase error preserve color fidelity; 120 MHz flat bandwidth passes full baseband. | Use Scenario: Transmitting upstream/downstream DSL signals over twisted-pair telephone lines in VDSL2 CPE equipment. IC Role / Device Role / Timing Role: High-linearity transmit driver interfacing with ADSL/VDSL line interface ICs (e.g., LMX2594 + THS3062). Use Value: –81 dBc HD3 at 10 MHz ensures compliance with ITU-T G.993.2 spectral mask; ±145 mA drive sustains 20.5 dBm output power. |
| High-Voltage ADC Preamplifier | Test & Measurement Signal Generator |
Use Scenario: Conditioning wide-dynamic-range sensor outputs (e.g., piezoelectric, photodiode transimpedance) before digitization by 16-bit+ SAR or sigma-delta ADCs. IC Role / Device Role / Timing Role: Low-noise, high-slew-rate gain stage preceding anti-alias filter and ADC front-end. Use Value: 2.6 nV/√Hz input voltage noise dominates only below 1 kΩ source impedance; 7000 V/μs slew rate prevents slewing-induced distortion on fast transients. | Use Scenario: Generating clean, high-amplitude test waveforms (sine, pulse, arbitrary) in automated test equipment (ATE) and benchtop signal sources. IC Role / Device Role / Timing Role: Output stage amplifier delivering programmable amplitude and offset to DUTs with minimal added jitter or distortion. Use Value: 0.3 dB peaking in unity gain ensures flat frequency response up to 100 MHz; 1 ns rise/fall time supports sub-100 ps edge fidelity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed current-feedback amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| THS3062DR | Same silicon, SOIC-8 package (D) without PowerPAD; θJA = 97.5°C/W; max PD = 410 mW at 85°C. | Lower thermal performance limits sustained 145 mA drive at high ambient; unsuitable for continuous 10 MHz video output. | Select THS3062DGNR when board space allows MSOP and thermal load exceeds 400 mW. |
| THS3122DGNR | Higher output current (±350 mA), wider supply range (±16 V), but lower bandwidth (120 MHz unity-gain) and higher quiescent current (12.5 mA/ch). | Optimized for heavy capacitive loads and high-current pulse applications, not low-distortion RF/video. | Choose THS3122DGNR only if drive > ±200 mA into 25 Ω is required; THS3062DGNR remains superior for distortion-critical 150 Ω loads. |
Compared with THS3062DR, THS3062DGNR provides 65% lower thermal resistance enabling full 145 mA output at elevated temperature; versus THS3122DGNR, it delivers 12 dB better HD3 at 10 MHz while consuming 35% less quiescent power per channel.
Availability
THS3062DGNR is available at Aetrix Electronics and suitable for video line driver, VDSL2 line driver, high-voltage ADC preamplifier, and test & measurement signal generator applications requiring stable component supply, long-lifecycle support, and guaranteed traceable sourcing.
Supply support for THS3062DGNR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company founded in 1930, specializing in analog, embedded processing, and high-performance analog ICs for industrial, automotive, and communications markets.
The THS306x product line was designed specifically for high-fidelity, high-slew-rate signal conditioning in broadband communication and video infrastructure-emphasizing distortion performance, thermal robustness, and current-feedback scalability.
FAQ
What is the maximum safe operating voltage for THS3062DGNR?
The THS3062DGNR has an absolute maximum supply voltage rating of ±16.5 V per rail. Operation beyond this risks permanent damage. For reliable long-term use, TI specifies ±15 V as the recommended maximum operating voltage. At ±15 V, the device delivers full 7000 V/μs slew rate and ±145 mA output drive while maintaining < 0.3 dB peaking in unity gain. Always observe derating curves in the datasheet for elevated temperature operation.
How does THS3062DGNR achieve low harmonic distortion at 10 MHz?
The THS3062DGNR achieves –81 dBc 3rd harmonic distortion at 10 MHz through its BiCOM-I bipolar process, which provides high fT transistors and low intrinsic distortion, combined with precise current-feedback architecture that minimizes loop gain degradation at high frequencies. Verified under G = 2, RL = 150 Ω, and VO = 2 VPP>, this performance enables compliance with NTSC/PAL and VDSL2 spectral masks. Layout practices-including symmetric routing, ground plane under PowerPAD, and tight feedback resistor placement-are critical to replicate this result.
Can THS3062DGNR drive a 75 Ω video load directly?
Yes, THS3062DGNR can drive a 75 Ω video load directly with full performance. At ±15 V supply, it delivers ±13 V output swing into 150 Ω and ±13.7 V into 1 kΩ; extrapolating, it sustains > ±12 V into 75 Ω. Its 0.02% differential gain and 0.01° differential phase error at 10 MHz meet SMPTE 253M standards for broadcast video. Use 75 Ω series termination at the output and maintain controlled-impedance PCB traces to prevent reflections.
What is the role of the PowerPAD in THS3062DGNR?
The PowerPAD in THS3062DGNR is an electrically isolated copper thermal pad on the underside of the MSOP-8 package. It reduces thermal resistance (θJA = 58.4°C/W) by conducting heat directly into the PCB's internal copper planes. To function correctly, the PowerPAD must be soldered to a dedicated thermal land connected to ≥2 oz. copper pour; failure to do so causes junction temperature to exceed 125°C under full load, degrading distortion and potentially causing thermal shutdown. TI technical brief SLMA002 details implementation.
Why does THS3062DGNR require different feedback resistors for different gains?
THS3062DGNR uses a current-feedback architecture where bandwidth is inversely proportional to feedback resistor (Rf) value-not closed-loop gain. To maintain optimal bandwidth and phase margin across gains, Rf must scale down as gain increases: 750 Ω for G = 1, 560 Ω for G = 2, 357 Ω for G = 5, and 200 Ω for G = 10. This preserves >220 MHz –3 dB bandwidth at G = 10 while keeping peaking < 0.3 dB. Using fixed Rf degrades stability and increases distortion.
THS3062DGNR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Amplifier Type:
- Current Feedback
- Number of Circuits:
- 2
- Output Type:
- -
- Slew Rate:
- 7000V/µs
- Gain Bandwidth Product:
- 2.2 GHz
- -3db Bandwidth:
- 300 MHz
- Current - Input Bias:
- 6 µA
- Voltage - Input Offset:
- 700 µV
- Current - Supply:
- 8.3mA
- Current - Output / Channel:
- 145 mA
- Voltage - Supply Span (Min):
- 10 V
- Voltage - Supply Span (Max):
- 30 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-HVSSOP
THS3062DGNR FAQ
1.How can I place an order for THS3062DGNR through Aetrix?
Please submit a Request for Quotation (RFQ) for THS3062DGNR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for THS3062DGNR reliable?
The price and inventory of THS3062DGNR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for THS3062DGNR is usually 5 days.
3.What payment methods are accepted for THS3062DGNR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for THS3062DGNR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for THS3062DGNR?
THS3062DGNR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your THS3062DGNR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for THS3062DGNR?
For technical support, including THS3062DGNR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your THS3062DGNR requirements.
6.How does Aetrix verify that THS3062DGNR is sourced from the original manufacturer or authorized distributors?
All THS3062DGNR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that THS3062DGNR meets industry standards.
7.What is the process for return or replacement of THS3062DGNR?
All THS3062DGNR units undergo pre-shipment inspection (PSI). If there is an issue with THS3062DGNR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The THS3062DGNR part is unused and in its original packaging.
Return procedure for THS3062DGNR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
THS3062DGNR Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

