Texas Instruments THS4032CDGNRG4
- Part No.:
- THS4032CDGNRG4
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width) Exposed Pad
- Datasheet:
-
THS4032CDGNRG4.pdf
- Description:
- IC OPAMP VFB 2 CIRCUIT 8HVSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,977
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
THS4032CDGNRG4 from Texas Instruments is a dual-channel, ultra-low-noise (1.2nV/√Hz), high-speed voltage-feedback operational amplifier in an 8-pin HVSSOP package. It delivers 100MHz bandwidth at G = 2, 100V/μs slew rate, –90dBc THD at 1MHz (RL = 1kΩ), ±15V operation, and 200mA output drive - optimized for precision analog signal conditioning in data acquisition and imaging front-ends.
For engineers reviewing the THS4032CDGNRG4 datasheet, THS4032CDGNRG4 pinout, THS4032CDGNRG4 application, or THS4032CDGNRG4 equivalent, key selection criteria include input voltage noise density, channel-to-channel crosstalk (–61dBc), thermal performance (RθJA = 52.0°C/W in HVSSOP), unity-gain stability, and dual-channel layout efficiency in space-constrained PCBs.
Technical Context
The THS4032CDGNRG4 employs a complementary bipolar 30V process with GHz fT transistors, enabling voltage-feedback architecture with wide bandwidth, fast settling (70ns to 0.1%), and low distortion. Its internal compensation ensures unity-gain stability while maintaining 120MHz unity-gain bandwidth.
Designed for split-supply (±4.5V to ±16V) or single-supply (9V to 32V) operation, it features rail-to-rail input common-mode range (±14.3V at ±15V supply) and robust output drive into 150Ω or 1kΩ loads - critical for driving SAR ADCs and active filters without external buffering.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Bandwidth (G = 2) | 100MHz (–3dB); enables full-spectrum fidelity for video, ultrasound, and DAQ signals up to 50MHz Nyquist |
| Slew Rate | 100V/μs; supports clean 20Vpp step response in ≤200ns without slewing distortion |
| Voltage Noise | 1.2nV/√Hz @ >10kHz; preserves SNR in low-level sensor and ADC driver stages |
| THD (1MHz, RL = 1kΩ) | –90dBc; ensures <0.001% harmonic contamination in precision measurement paths |
| Output Drive | 200mA (typical); directly drives 150Ω cables or ADC input networks without external buffers |
| Supply Range | ±4.5V to ±16V; compatible with industrial ±12V and test-equipment ±15V rails |
| Crosstalk (Ch-A to Ch-B) | –61dBc @ 1MHz; maintains channel isolation in dual-signal acquisition systems |
Pinout & Package
THS4032CDGNRG4 uses the DGN (8-pin HVSSOP) package: 3.0mm × 4.9mm body with exposed thermal pad. The thermal pad must be connected to a large copper plane for optimal RθJB = 24.5°C/W performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1OUT | Channel 1 output | High-current output node; requires local 0.1μF bypass and series isolation resistor for >10pF capacitive loads |
| 1IN– | Channel 1 inverting input | Differential input node; matched impedance routing recommended to minimize imbalance-induced distortion |
| 1IN+ | Channel 1 noninverting input | High-impedance input; sensitive to PCB leakage and EMI - guard ring recommended |
| VCC– | Negative power supply | Return path for both channels; separate low-inductance ground plane connection required |
| 2IN+ | Channel 2 noninverting input | Independent input for second signal path; no shared offset nulling pins (unlike THS4031) |
| 2IN– | Channel 2 inverting input | Matched to 1IN– for consistent gain-setting network design across both channels |
| 2OUT | Channel 2 output | Electrically isolated from 1OUT; crosstalk specification validates independent small-signal integrity |
| VCC+ | Positive power supply | Primary supply rail; decoupling with 0.1μF ceramic + 4.7μF tantalum per channel recommended |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low voltage noise | 1.2nV/√Hz enables sub-16-bit ENOB preservation when driving high-resolution SAR ADCs |
| Unity-gain stable | 120MHz unity-gain bandwidth allows use in gain-of-1 buffer, integrator, and filter configurations without external compensation |
| High output current | 200mA drive capability eliminates need for external current boosters in cable-driving applications |
| Low THD at high frequency | –90dBc @ 1MHz (RL = 1kΩ) meets spectral purity requirements for vector signal transceivers and DAQ systems |
| HVSSOP thermal performance | RθJA = 52.0°C/W (vs. 120.6°C/W for SOIC) enables higher sustained output power in compact layouts |
Applications
| Active Filters | Ultrasound Scanner Front-End |
|---|---|
Use Scenario: Implementing 2nd-order Sallen-Key low-pass filters for anti-aliasing before 16-bit SAR ADCs. IC Role / Device Role / Timing Role: Dual-channel op-amp providing gain, filtering, and drive - one channel as filter amplifier, second as ADC buffer. Use Value: 100MHz bandwidth and low noise ensure flat group delay and minimal phase distortion up to 10MHz cutoff. | Use Scenario: Conditioning echo return signals from piezoelectric transducers in portable ultrasound systems. IC Role / Device Role / Timing Role: Low-noise preamplifier and variable-gain stage prior to digitization. Use Value: 1.2nV/√Hz input noise maximizes dynamic range for weak µV-level echoes; dual channel supports I/Q demodulation paths. |
| Data Acquisition (DAQ) | Video Amplifiers |
Use Scenario: Driving multiplexed analog inputs to high-speed, high-resolution ADCs such as ADS8422. IC Role / Device Role / Timing Role: Precision buffer and level-shifter between sensor/mux output and ADC input. Use Value: 70ns settling time (0.1%) and –90dBc THD preserve DC accuracy and AC fidelity across 1MSPS sampling. | Use Scenario: RGB line drivers in broadcast-quality video equipment requiring 0.1% differential gain/phase error. IC Role / Device Role / Timing Role: High-slew-rate, low-distortion output driver for 75Ω coaxial transmission lines. Use Value: 0.015% differential gain error and 0.025° phase error at ±15V meet SMPTE 259M compliance for HD-SDI interfaces. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed, low-noise op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| THS4032D | Same die in 8-pin SOIC package; RθJA = 120.6°C/W vs. 52.0°C/W for DGN | Larger footprint; lower thermal efficiency limits sustained output current in dense layouts | Select THS4032D only if SOIC compatibility or legacy board reuse is required |
| OPA2691IDGKT | Higher 320MHz GBW but 2.1nV/√Hz noise; 110V/μs slew; not unity-gain stable | Requires external compensation; unsuitable for G = 1 buffers or active filters without redesign | Choose OPA2691IDGKT only for >200MHz closed-loop bandwidth needs where noise is secondary |
Compared with THS4032D and OPA2691IDGKT, THS4032CDGNRG4 uniquely balances ultra-low noise, unity-gain stability, and superior thermal performance in a space-efficient HVSSOP - making it optimal for thermally constrained, multi-channel precision analog systems.
Availability
THS4032CDGNRG4 is available at Aetrix Electronics and suitable for data acquisition, ultrasound imaging, and video signal conditioning requiring stable component supply, long-term manufacturability, and TI's extended product lifecycle support.
Supply support for THS4032CDGNRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in high-performance amplifiers and precision signal chain solutions.
The THS403x family was designed specifically for low-noise, wide-bandwidth analog signal conditioning in communications, medical imaging, and test equipment - emphasizing voltage-feedback speed, distortion control, and robust output drive.
FAQ
What is the maximum operating supply voltage for THS4032CDGNRG4?
The THS4032CDGNRG4 supports dual-supply operation from ±4.5V to ±16V (32V total), with absolute maximum ratings specifying VCC– to VCC+ ≤ 33V. Operation beyond ±16V risks exceeding junction temperature limits and voiding reliability guarantees. Always verify thermal dissipation using RθJA = 52.0°C/W for the HVSSOP package when operating near max supply.
Does THS4032CDGNRG4 have offset nulling pins like THS4031?
No, THS4032CDGNRG4 does not include offset nulling pins. Unlike the single-channel THS4031 (which provides NULL pins 1 and 8), the dual-channel THS4032 has no dedicated offset adjustment terminals. Its typical input offset voltage is 0.3mV (25°C), with full-range drift of 2μV/°C - sufficient for most high-speed applications without trimming.
Can THS4032CDGNRG4 drive a 75Ω video load directly?
Yes, THS4032CDGNRG4 can directly drive a 75Ω load with full swing: at ±15V supply, it delivers ±12.9V into 250Ω and ±13.6V into 1kΩ; extrapolation and typical 200mA output current confirm capability for 75Ω with appropriate series isolation (e.g., 75Ω resistor) to maintain stability. Measured differential gain/phase errors (0.015%/0.025°) validate broadcast video compliance.
What is the channel-to-channel crosstalk specification for THS4032CDGNRG4?
The THS4032CDGNRG4 specifies –61dBc channel-to-channel crosstalk at 1MHz under standard conditions (VCC = ±5V or ±15V). This value is measured between Channel A and Channel B outputs and confirms effective isolation for dual-signal acquisition, I/Q processing, or independent filter paths without measurable intermodulation.
Is THS4032CDGNRG4 unity-gain stable, and what is its unity-gain bandwidth?
Yes, THS4032CDGNRG4 is unity-gain stable with a minimum unity-gain bandwidth of 100MHz and typical value of 120MHz (closed-loop, VCC = ±15V). This allows safe use in G = 1 buffer, integrator, or active filter configurations without external compensation components - a key differentiator from decompensated high-speed op-amps.
THS4032CDGNRG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Amplifier Type:
- Voltage Feedback
- Number of Circuits:
- 2
- Output Type:
- -
- Slew Rate:
- 100V/µs
- Gain Bandwidth Product:
- 120 MHz
- -3db Bandwidth:
- 100 MHz
- Current - Input Bias:
- 3 µA
- Voltage - Input Offset:
- 500 µV
- Current - Supply:
- 8.5mA (x2 Channels)
- Current - Output / Channel:
- 90 mA
- Voltage - Supply Span (Min):
- 9 V
- Voltage - Supply Span (Max):
- 32 V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-HVSSOP
THS4032CDGNRG4 FAQ
1.How can I place an order for THS4032CDGNRG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for THS4032CDGNRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for THS4032CDGNRG4 reliable?
The price and inventory of THS4032CDGNRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for THS4032CDGNRG4 is usually 5 days.
3.What payment methods are accepted for THS4032CDGNRG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for THS4032CDGNRG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for THS4032CDGNRG4?
THS4032CDGNRG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your THS4032CDGNRG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for THS4032CDGNRG4?
For technical support, including THS4032CDGNRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your THS4032CDGNRG4 requirements.
6.How does Aetrix verify that THS4032CDGNRG4 is sourced from the original manufacturer or authorized distributors?
All THS4032CDGNRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that THS4032CDGNRG4 meets industry standards.
7.What is the process for return or replacement of THS4032CDGNRG4?
All THS4032CDGNRG4 units undergo pre-shipment inspection (PSI). If there is an issue with THS4032CDGNRG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The THS4032CDGNRG4 part is unused and in its original packaging.
Return procedure for THS4032CDGNRG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
THS4032CDGNRG4 Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

