Texas Instruments THS4120IDGKR
- Part No.:
- THS4120IDGKR
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
THS4120IDGKR.pdf
- Description:
- IC OPAMP DIFF 1 CIRCUIT 8VSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,324
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
THS4120IDGKR from Texas Instruments is a high-speed, fully differential-input/differential-output amplifier optimized for single-supply ADC driving applications. It delivers 100 MHz –3 dB bandwidth, 55 V/µs slew rate, –75 dB THD at 1 MHz (2 VPP), 5.4 nV/√Hz input voltage noise, and features an integrated power-down pin (PD) enabling quiescent current reduction from 11 mA to 120 µA. It operates from a 3.3 V single supply and supports differential signal conditioning in precision data acquisition systems.
For engineers reviewing the THS4120IDGKR datasheet, THS4120IDGKR pinout, THS4120IDGKR application, or THS4120IDGKR equivalent, key selection considerations include its power-down functionality, VOCM-controlled output common-mode level, balanced differential drive capability for SAR and sigma-delta ADCs, thermal performance in MSOP PowerPAD™ packaging, and resistor-matching sensitivity for CMRR preservation.
Technical Context
The THS4120IDGKR implements a true fully differential signal path with matched internal transconductance stages, enabling inherent rejection of common-mode noise at both input and output. Its architecture supports precise DC-coupled gain setting via external resistor networks while maintaining symmetry critical for second-harmonic cancellation.
It features a dedicated VOCM pin that sets the output common-mode voltage independently of input signals-enabling seamless interfacing with ADC reference voltages-and a PD pin requiring a 10-kΩ pullup to VDD for reliable enable/disable control. The device is internally compensated for stability with resistive feedback but requires series output isolation (≥20 Ω) when driving >10 pF capacitive loads.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| –3 dB Bandwidth | 100 MHz - supports wideband signal conditioning up to ~30 MSPS ADC sampling without significant amplitude loss |
| Slew Rate | 55 V/µs - enables clean reproduction of fast transient signals such as pulse-shaped sensor outputs or DAC waveforms |
| Total Harmonic Distortion | –75 dB at 1 MHz, 2 VPP - ensures minimal spectral contamination in high-fidelity data converter front-ends |
| Input Voltage Noise | 5.4 nV/√Hz at 10 kHz - preserves SNR in low-level analog signal amplification prior to digitization |
| Power-Down Current | 120 µA - reduces system standby power by >98% while retaining fast 4.8 µs turn-on recovery for burst-mode operation |
| Supply Voltage | 3.3 V single supply - eliminates need for dual rails in portable or space-constrained embedded systems |
| Common-Mode Input Range | 0.35 V to VDD – 0.1 V - accommodates ground-referenced or mid-rail-biased sensor interfaces |
Pinout & Package
THS4120IDGKR is housed in an 8-pin MSOP PowerPAD™ package (DGK), featuring an exposed thermal pad on the underside for enhanced heat dissipation. The PowerPAD must be soldered to a thermally conductive PCB copper area to maintain junction temperature ≤125°C under continuous operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN− | Inverting input | Differential input node; requires matched trace length and impedance to VIN+ to preserve CMRR |
| VOCM | Output common-mode control | DC bias reference for both outputs; bypass with 0.1 µF capacitor to suppress noise coupling |
| VDD | Positive supply | 3.3 V single supply rail; decouple with 6.8 µF tantalum + 0.1 µF ceramic placed ≤2.54 mm from pin |
| VOUT+ | Positive differential output | Delivers inverted complement of VOUT−; forms 2 VPP differential pair into ADC inputs |
| VIN+ | Non-inverting input | Differential input node; symmetric layout with VIN− essential for harmonic distortion suppression |
| PD | Power-down enable | Active-high logic input; requires 10-kΩ pullup to VDD; drives <1.2 V to disable amplifier |
| GND | Analog ground | Low-inductance return path; isolated from digital ground except at single-point star connection |
| VOUT− | Negative differential output | Delivers non-inverted complement of VOUT+; together achieves full differential swing and noise rejection |
Key Features
| Feature | Design Value |
|---|---|
| Fully differential I/O architecture | Enables true differential signaling with >64 dB CMRR across temperature, rejecting coupled noise in mixed-signal PCB environments |
| Integrated VOCM pin | Allows direct connection to ADC reference voltage (e.g., AVDD/2 or external VREF), eliminating level-shifting circuitry and associated errors |
| Power-down mode with fast recovery | Reduces quiescent current to 120 µA and recovers to full operation in 4.8 µs-ideal for time-gated sensing or low-duty-cycle DAQ systems |
| Optimized for single-supply ADC drivers | Operates from 3.3 V with rail-to-rail compatible inputs and outputs, supporting direct interface to modern low-voltage SAR and delta-sigma converters |
| MSOP PowerPAD™ thermal package | Provides 54.2°C/W junction-to-case thermal resistance, enabling 685 mW continuous power dissipation at TA = 85°C when properly mounted |
Applications
| High-Speed Data Acquisition | Medical Imaging Front-End |
|---|---|
Use Scenario: Driving 16-bit, 1 MSPS SAR ADCs in portable ultrasound or ECG modules where low power and signal fidelity are critical. IC Role / Device Role / Timing Role: Differential ADC driver providing gain, level shifting, and antialias filtering interface between analog sensor chain and ADC inputs. Use Value: Delivers –75 dB THD at 1 MHz and 5.4 nV/√Hz noise to preserve dynamic range and SNR in sub-100 µV biomedical signal paths. |
Use Scenario: Conditioning low-amplitude, high-frequency signals from piezoelectric transducers in handheld diagnostic devices. IC Role / Device Role / Timing Role: Single-supply fully differential amplifier configured for AC-coupled gain with VOCM referenced to ADC's internal reference. Use Value: Enables 100 MHz bandwidth and 55 V/µs slew rate to resolve fast transducer pulses without slew-induced distortion or settling error. |
| Industrial Process Monitoring | Communications Baseband Signal Chain |
Use Scenario: Isolating and amplifying 4–20 mA loop sensor outputs in PLC analog input modules operating over –40°C to 85°C. IC Role / Device Role / Timing Role: Precision differential driver with VOCM set to mid-rail, converting single-ended industrial signals to robust differential format for ADC input. Use Value: Maintains >64 dB CMRR across full temperature range to reject common-mode noise from motor drives and switching power supplies. |
Use Scenario: Transmitting baseband I/Q signals from FPGA DACs to RF mixer inputs in software-defined radio transceivers. IC Role / Device Role / Timing Role: High-linearity differential transmitter stage ensuring accurate amplitude and phase matching between I and Q paths. Use Value: Achieves –75 dBc third IMD at 10 MHz, minimizing image and spurious generation in direct-conversion architectures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar fully differential amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| THS4121IDGKR | Lacks power-down pin; otherwise identical electrical specs, pinout, and package | Suitable where continuous operation is required and no power gating is needed | Select THS4121IDGKR only if system-level power sequencing does not require dynamic current reduction |
| THS4131IDGNR | Higher 150 MHz bandwidth, 51 V/µs slew rate, 1.3 nV/√Hz noise; DGN package with PowerPAD™ | Better suited for >10 MSPS ADCs or wider dynamic range requirements | Choose THS4131IDGNR when THS4120IDGKR's 100 MHz bandwidth or 5.4 nV/√Hz noise limit is insufficient |
Compared with THS4120IDGKR, THS4121IDGKR removes power management capability but simplifies biasing, while THS4131IDGNR trades higher quiescent current (16 mA) for significantly improved speed and noise performance-making it appropriate for next-generation high-resolution, high-throughput data converters.
Availability
THS4120IDGKR is available at Aetrix Electronics and suitable for high-speed data acquisition, medical imaging front-end, and industrial process monitoring applications requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for THS4120IDGKR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of innovation in high-performance amplifiers and data converter interface solutions.
The THS4120IDGKR belongs to TI's high-speed differential I/O amplifier family, designed specifically for precision, low-power, single-supply ADC driving in portable instrumentation, medical diagnostics, and industrial automation systems.
FAQ
What is the function of the PD pin on the THS4120IDGKR?
The PD (Power-Down) pin on the THS4120IDGKR is an active-high enable input that reduces quiescent current from 11 mA to 120 µA when driven below 1.2 V. It requires a 10-kΩ pullup resistor to VDD for default operation. This feature allows dynamic power management in battery-powered or burst-mode data acquisition systems without compromising signal integrity during active periods. The THS4120IDGKR resumes full operation within 4.8 µs after PD is asserted high.
How should the VOCM pin be used in a single-supply THS4120IDGKR application?
In single-supply operation, the VOCM pin on the THS4120IDGKR sets the DC common-mode level of both differential outputs. For optimal ADC interface, connect VOCM directly to the ADC's reference voltage (e.g., AVDD/2 or external VREF) using a 0.1-µF ceramic bypass capacitor to ground. This eliminates level-shifting components and ensures the differential output swing remains centered within the ADC's input range. The THS4120IDGKR maintains VOCM accuracy across frequency up to its operational bandwidth.
Can the THS4120IDGKR drive a 50-Ω transmission line directly?
No, the THS4120IDGKR should not drive a 50-Ω transmission line directly due to potential instability from capacitive loading. For 50-Ω systems, place a 50-Ω series resistor at each output (VOUT+ and VOUT−) to isolate the amplifier from cable capacitance and provide source termination. This preserves phase margin, prevents high-frequency ringing, and matches line impedance-ensuring clean signal integrity. The THS4120IDGKR's low output impedance (1 Ω) supports this configuration without gain error.
What is the recommended resistor tolerance for feedback networks used with THS4120IDGKR?
Texas Instruments recommends using 1% or better tolerance resistors for the gain-setting and feedback network of the THS4120IDGKR. Mismatch between Rf and R(g) degrades CMRR, PSRR, and second-harmonic cancellation-directly impacting THD performance. Precision matching preserves the THS4120IDGKR's –75 dB THD specification and ensures balanced differential output swing. Surface-mount thin-film resistors are preferred for stability and low parasitic inductance in high-frequency layouts.
Does the THS4120IDGKR require special PCB layout practices?
Yes-the THS4120IDGKR demands careful high-frequency layout: use a solid ground plane (with local removal under inputs/outputs to minimize stray capacitance), place 0.1-µF ceramic decoupling capacitors ≤2.54 mm from VDD/GND pins, keep VIN+ and VIN− traces symmetrical and short, avoid sockets, and solder the MSOP PowerPAD™ thermal pad to a large copper pour. These practices maintain the THS4120IDGKR's 100 MHz bandwidth, prevent oscillation, and ensure thermal reliability at 85°C ambient.
THS4120IDGKR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Amplifier Type:
- Differential
- Number of Circuits:
- 1
- Output Type:
- Differential
- Slew Rate:
- 55V/µs
- Gain Bandwidth Product:
- -
- -3db Bandwidth:
- 100 MHz
- Current - Input Bias:
- 1.2 pA
- Voltage - Input Offset:
- 3 mV
- Current - Supply:
- 11mA
- Current - Output / Channel:
- 100 mA
- Voltage - Supply Span (Min):
- 3 V
- Voltage - Supply Span (Max):
- 3.5 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-VSSOP
THS4120IDGKR FAQ
1.How can I place an order for THS4120IDGKR through Aetrix?
Please submit a Request for Quotation (RFQ) for THS4120IDGKR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for THS4120IDGKR reliable?
The price and inventory of THS4120IDGKR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for THS4120IDGKR is usually 5 days.
3.What payment methods are accepted for THS4120IDGKR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for THS4120IDGKR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for THS4120IDGKR?
THS4120IDGKR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your THS4120IDGKR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for THS4120IDGKR?
For technical support, including THS4120IDGKR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your THS4120IDGKR requirements.
6.How does Aetrix verify that THS4120IDGKR is sourced from the original manufacturer or authorized distributors?
All THS4120IDGKR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that THS4120IDGKR meets industry standards.
7.What is the process for return or replacement of THS4120IDGKR?
All THS4120IDGKR units undergo pre-shipment inspection (PSI). If there is an issue with THS4120IDGKR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The THS4120IDGKR part is unused and in its original packaging.
Return procedure for THS4120IDGKR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
THS4120IDGKR Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
