Texas Instruments THS4601CDDAG3
- Part No.:
- THS4601CDDAG3
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-PowerSOIC (0.154", 3.90mm Width)
- Datasheet:
-
THS4601CDDAG3.pdf
- Description:
- IC OPAMP GP 1 CIRC 8SOPWRPAD
- Quantity:
- Payment:

- Shipping:

Inventory:3,048
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
THS4601CDDAG3 from Texas Instruments is a high-speed FET-input operational amplifier optimized for wideband transimpedance gain stages, photodiode amplification, and high-impedance signal conditioning. It delivers 180 MHz gain-bandwidth product, 100 V/µs slew rate, ±15 V supply operation, 5.4 nV/√Hz input voltage noise, and 100 pA maximum input bias current - enabling low-noise amplification of weak current signals in optical sensing and test equipment.
For engineers reviewing the THS4601CDDAG3 datasheet, THS4601CDDAG3 pinout, THS4601CDDAG3 application, or THS4601CDDAG3 equivalent, key selection criteria include transimpedance stability with photodiode capacitance up to 220 pF, output swing capability of ±12.8 V (RL = 1 kΩ, ±15 V supplies), unity-gain stability, and SOIC-8 PowerPAD™ thermal performance (θJA = 66.6°C/W).
Technical Context
The THS4601CDDAG3 employs a JFET-input stage to achieve ultra-low input bias current (≤100 pA) and high differential input impedance (10⁹ Ω || 3.5 pF), minimizing error in current-to-voltage conversion. Its 180 MHz gain-bandwidth product supports stable transimpedance gains from 10 kΩ to 1 MΩ across source capacitances up to 220 pF when compensated with feedback capacitors as low as 0.4 pF.
It features rail-to-rail output swing capability (±12.8 V into 1 kΩ at ±15 V), low harmonic distortion (−96 dBc 3rd harmonic, RL = 1 kΩ), and robust power supply rejection (≥110 dB PSRR at 25°C), making it suitable for precision analog front-ends where dynamic range, speed, and DC accuracy must coexist.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain-bandwidth product | 180 MHz - enables stable transimpedance gains ≥100 kΩ with >3 MHz bandwidth even with 47 pF photodiode capacitance. |
| Slew rate | 100 V/µs - supports fast large-signal settling (135 ns to 0.1%, G = +5, 5 V step) for pulse-based optical detection. |
| Input voltage noise | 5.4 nV/√Hz - preserves SNR when amplifying sub-µV-level signals from high-impedance sources. |
| Input bias current | Max 100 pA at 25°C - minimizes offset error in high-value feedback resistor (e.g., 1 MΩ) transimpedance designs. |
| Supply voltage range | ±5 V to ±15 V - allows flexible system integration with legacy ±12 V or modern ±5 V rails while maintaining full AC performance. |
| Output voltage swing | ±12.8 V (min) into 1 kΩ at ±15 V - delivers >25 Vpp dynamic range for high-fidelity signal capture before ADC digitization. |
| Thermal resistance θJA | 66.6°C/W (SOIC-8 with PowerPAD™) - enables sustained 10 mA quiescent current operation without thermal derating in compact layouts. |
Pinout & Package
THS4601CDDAG3 is housed in an 8-pin SOIC package with PowerPAD™ (package designation DDA), featuring exposed thermal pad for enhanced heat dissipation. The PowerPAD™ must be soldered to PCB ground plane for optimal thermal performance (θJA = 66.6°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 5, 8 (NC) | No internal connection | Must remain unconnected; no routing or grounding required - floating pins reduce parasitic coupling in high-speed layouts. |
| 2 (IN−) | Inverting input | Primary node for transimpedance feedback; low input capacitance (3.5 pF diff) minimizes peaking with photodiode junction capacitance. |
| 3 (IN+) | Noninverting input | DC bias reference point; high common-mode impedance (10⁹ Ω || 6.5 pF) maintains stability in single-supply or biased configurations. |
| 4 (VS−) | Negative power supply | Connects to −15 V (or −5 V); low PSRR drift (±10 dB over −40°C to 85°C) ensures consistent offset under supply variation. |
| 6 (OUT) | Amplifier output | Drives 1 kΩ loads to ±12.8 V; closed-loop output impedance <0.1 Ω at 1 MHz enables direct interface with ADC drivers or coaxial cables. |
| 7 (VS+) | Positive power supply | Connects to +15 V (or +5 V); matched +PSRR/−PSRR (>110 dB) prevents supply-induced common-mode error in differential systems. |
Key Features
| Feature | Design Value |
|---|---|
| Unity-gain stable | Operates reliably with G = +1 without external compensation - simplifies design of wideband buffers and active filters. |
| High input impedance | 10⁹ Ω differential || 3.5 pF - reduces loading error on high-Z sensors (e.g., photodiodes, piezoelectrics) and enables >100 dB CMRR at DC. |
| Low input current noise | 5.5 fA/√Hz - critical for preserving signal integrity in femtoamp-level current measurements typical in spectroscopy and particle detection. |
| Wide common-mode range | ±13.0 V at ±15 V supplies - accommodates photodiode reverse-bias voltages up to −12 V while maintaining linear operation. |
| Low harmonic distortion | −96 dBc (3rd harmonic, 1 MHz, RL = 1 kΩ) - meets fidelity requirements for video signal conditioning and high-resolution test instrumentation. |
Applications
| Wideband Photodiode Amplifier | High-Speed Transimpedance Gain Stage |
|---|---|
|
Use Scenario: Amplifying nanoampere-level photocurrent from avalanche photodiodes (APDs) in fiber-optic receivers operating at 1–10 Gbps. IC Role / Device Role / Timing Role: Transimpedance amplifier converting APD current to voltage with minimal phase delay and overshoot. Use Value: Achieves 3.3 MHz −3 dB bandwidth with 100 kΩ RF and 18 pF diode capacitance (per datasheet Table 1), supporting 100 Mbps optical data recovery. |
Use Scenario: Signal conditioning front-end for laser interferometry systems requiring sub-nanosecond pulse fidelity and low drift. IC Role / Device Role / Timing Role: High-speed gain block providing precise current-to-voltage conversion with <170 ns 0.01% settling time. Use Value: Delivers 100 V/µs slew rate and 180 MHz GBW to resolve <10 ns optical pulses without distortion or droop. |
| Test and Measurement Systems | Active Filtering |
|
Use Scenario: Input buffer and gain stage in automated test equipment (ATE) for semiconductor parametric testing. IC Role / Device Role / Timing Role: High-impedance, low-noise buffer isolating DUT from measurement circuitry while preserving signal integrity. Use Value: 10⁹ Ω input impedance and 5.4 nV/√Hz noise floor enable accurate characterization of high-Z devices without loading artifacts. |
Use Scenario: 4th-order active bandpass filter in spectrum analyzers targeting 1–100 MHz RF signal analysis. IC Role / Device Role / Timing Role: Precision op-amp in multiple feedback (MFB) topology delivering flat passband and steep roll-off. Use Value: Unity-gain stability and 180 MHz GBW support filter Q-factors >20 without oscillation or gain peaking. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed FET-input op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA655 | Higher 400 MHz GBW but narrower ±5 V supply range; 6 nV/√Hz noise; not rated for ±15 V operation. | Better suited for 5 V systems requiring >100 MHz small-signal bandwidth; unsuitable for ±12 V industrial or test gear. | Select OPA655 only if supply is strictly ±5 V and bandwidth >200 MHz is mandatory - THS4601CDDAG3 remains preferred for ±15 V compatibility and photodiode stability. |
| OPA637 | 80 MHz GBW, 135 V/µs slew rate, same ±15 V rating; higher 4.5 nV/√Hz noise but lower 100 pA max IIB. | Optimized for gain-of-5 stable operation; less suitable for unity-gain transimpedance or G = +1 buffering. | Choose OPA637 for fixed-gain ≥+5 signal chains needing faster slew than THS4601CDDAG3; THS4601CDDAG3 is superior for variable-gain, unity-stable, or photodiode-coupled designs. |
Compared with OPA655 and OPA637, THS4601CDDAG3 uniquely balances ±15 V operation, unity-gain stability, 180 MHz GBW, and ultra-low input bias current - making it the only option among the three qualified for wideband photodiode amplification across industrial temperature ranges with 100 kΩ+ feedback resistors.
Availability
THS4601CDDAG3 is available at Aetrix Electronics and suitable for wideband photodiode amplifiers, high-speed transimpedance gain stages, and test and measurement systems requiring stable component supply, long-term obsolescence management, and traceable sourcing.
Supply support for THS4601CDDAG3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in high-performance op-amps and precision signal chain solutions.
The THS4601CDDAG3 belongs to TI's high-speed FET-input op-amp product line, engineered specifically for wideband current-to-voltage conversion, optical sensing, and demanding test instrumentation where speed, low noise, and DC precision intersect.
FAQ
What is the maximum photodiode capacitance supported by THS4601CDDAG3 in a 100 kΩ transimpedance configuration?
Per TI's SLOS388B datasheet Table 1, THS4601CDDAG3 supports up to 47 pF total source capacitance (including diode, amplifier input, and parasitic capacitance) in a 100 kΩ transimpedance configuration, achieving 2.8 MHz −3 dB bandwidth with 0.6 pF feedback capacitor. At 100 pF source capacitance, bandwidth drops to 1.3 MHz - confirming its suitability for medium-speed optical receivers and spectrometers.
Does THS4601CDDAG3 require external compensation for unity-gain stability?
No - THS4601CDDAG3 is explicitly specified as unity-gain stable per its datasheet description and electrical specifications. It operates reliably with G = +1 without external phase compensation components, verified across temperature (0°C to 70°C) and supply conditions (±5 V to ±15 V), making it ideal for high-impedance buffer and active filter applications.
What is the thermal advantage of the PowerPAD™ package in THS4601CDDAG3 versus standard SOIC-8?
The THS4601CDDAG3's SOIC-8 PowerPAD™ package achieves θJA = 66.6°C/W - a 61% improvement over the standard SOIC-8 (θJA = 170°C/W). This allows continuous operation at full 10 mA quiescent current without thermal throttling, critical for sustained high-speed performance in enclosed test equipment or optical modules.
Can THS4601CDDAG3 operate from a single +10 V supply?
Yes - THS4601CDDAG3 supports asymmetric supplies (e.g., VS+ = +10 V, VS− = 0 V) within its absolute maximum ratings (VS+ ≤ +16.5 V, VS− ≥ −16.5 V). However, its common-mode input range is reduced to +2.7 V to −2.0 V (at 25°C), and output swing becomes asymmetric (e.g., ~+8.5 V to −1.5 V). For optimal performance, dual ±5 V or ±15 V supplies are recommended.
How does THS4601CDDAG3 compare to THS4601CD in terms of thermal performance and layout?
THS4601CDDAG3 uses the SOIC-8 PowerPAD™ package (DDA), requiring soldering of the exposed thermal pad to PCB ground for θJA = 66.6°C/W. THS4601CD uses standard SOIC-8 (D), with θJA = 170°C/W and no thermal pad. Layouts for THS4601CDDAG3 must include thermal vias under the PowerPAD™; THS4601CD requires no such modifications but suffers higher junction temperatures under identical load.
THS4601CDDAG3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-PowerSOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Amplifier Type:
- General Purpose
- Number of Circuits:
- 1
- Output Type:
- -
- Slew Rate:
- 100V/µs
- Gain Bandwidth Product:
- 180 MHz
- -3db Bandwidth:
- 440 MHz
- Current - Input Bias:
- 30 pA
- Voltage - Input Offset:
- 1 mV
- Current - Supply:
- 10mA
- Current - Output / Channel:
- -
- Voltage - Supply Span (Min):
- 10 V
- Voltage - Supply Span (Max):
- 30 V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SO PowerPad
THS4601CDDAG3 FAQ
1.How can I place an order for THS4601CDDAG3 through Aetrix?
Please submit a Request for Quotation (RFQ) for THS4601CDDAG3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for THS4601CDDAG3 reliable?
The price and inventory of THS4601CDDAG3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for THS4601CDDAG3 is usually 5 days.
3.What payment methods are accepted for THS4601CDDAG3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for THS4601CDDAG3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for THS4601CDDAG3?
THS4601CDDAG3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your THS4601CDDAG3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for THS4601CDDAG3?
For technical support, including THS4601CDDAG3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your THS4601CDDAG3 requirements.
6.How does Aetrix verify that THS4601CDDAG3 is sourced from the original manufacturer or authorized distributors?
All THS4601CDDAG3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that THS4601CDDAG3 meets industry standards.
7.What is the process for return or replacement of THS4601CDDAG3?
All THS4601CDDAG3 units undergo pre-shipment inspection (PSI). If there is an issue with THS4601CDDAG3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The THS4601CDDAG3 part is unused and in its original packaging.
Return procedure for THS4601CDDAG3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
THS4601CDDAG3 Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

