Texas Instruments THS6226AIRHBT
- Part No.:
- THS6226AIRHBT
- Manufacturer:
- Texas Instruments
- Category:
- Telecom
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
THS6226AIRHBT.pdf
- Description:
- IC TELECOM INTERFACE 32VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,670
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
THS6226AIRHBT from Texas Instruments is a dual-port, gated-class H, current-feedback differential line driver IC designed for VDSL2 line driver systems. It delivers 40 VPP differential output swing into 60 Ω with 1:1.4 transformer, supports up to 20.5 dBm line power (G.993.2 Profile 8b), and features digitally adjustable quiescent current (7.6–23 mA per port) for adaptive power optimization in xDSL infrastructure.
For engineers reviewing the THS6226AIRHBT datasheet, THS6226AIRHBT pinout, THS6226AIRHBT application, or THS6226AIRHBT equivalent, this device is critical for high-linearity, low-distortion DSL central office and remote terminal line card designs requiring dynamic bias control, active impedance matching, and dual-channel profile flexibility across ADSL2+ to VDSL2 30 MHz operation.
Technical Context
The THS6226AIRHBT implements a dual independent class H architecture with integrated charge pumps (VLL/VHH/CAPL/CAPH per port), enabling ±5.5 V to ±17.5 V output voltage rails beyond the 12-V supply-critical for high-PAR VDSL2 signals. Each port operates with fixed 19 V/V gain and active feedback-based output impedance control via FB_A/FB_B (AB port) and FB_C/FB_D (CD port).
It integrates a two-wire serial interface (CLK/DATA) for digital bias programming, RESET for register initialization, and independent VH_ENAB/VH_ENCD pins to enable/disable class H mode per port-allowing mixed AB/H operation, line termination mode (7 mA/quiescent), and full capacitor recharge in 200 µs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Swing | 40 VPP differential (±5.5 V to ±17.5 V) with 12-V supply + fully charged pump capacitors-enables >20.5 dBm G.993.2 Profile 8b compliance on 60-Ω load. |
| Bandwidth | 97 MHz small-signal (–3 dB), 80 MHz large-signal (7.5 VPP)-supports full VDSL2 spectrum up to 30 MHz with flat gain and low distortion. |
| Distortion (HD3) | –83 dBc at 1 MHz / 2 VPP, –71 dBc at 5 MHz / 2 VPP (60-Ω diff)-meets stringent MTPR requirements for multi-profile coexistence. |
| Quiescent Current | Digitally adjustable 7.6–23 mA per port (1.0 mA step); 7.0 mA in line termination mode-reduces idle power by >70% vs full bias. |
| Output Current | ±383 mA (sourcing/sinking) into 60-Ω differential load-drives heavy transformer-coupled DSL lines without clipping. |
| Port Isolation | 90 dB at 1 MHz-prevents crosstalk between AB and CD ports in dual-channel VDSL2 deployments. |
| PSRR | 70 dB at 1 MHz-ensures robust noise rejection from shared 12-V rail in dense line card environments. |
Pinout & Package
VQFN-32 PowerPAD™ package (5.00 mm × 5.00 mm); thermally enhanced exposed die pad electrically isolated and intended for connection to PCB ground plane via multiple vias.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 12, 29 | GND | Analog ground reference for all amplifier sections; connects to internal ground plane and PowerPAD thermal path. |
| 2, 3 | IND, INC | Differential inputs for CD port amplifier-accept balanced line-side signal from upstream DAC or filter stage. |
| 4, 5 | DATA, CLK | Two-wire serial interface-configures bias level (0–15), class H enable/disable, and reset state per port. |
| 6, 7 | INB, INA | Differential inputs for AB port amplifier-interface directly with baseband signal chain in DSL transceiver SoC. |
| 8 | RESET | Active-low asynchronous reset-forces internal registers to startup defaults (bias = 0, class H disabled). |
| 9, 32 | VH_ENAB, VH_ENCD | Class H enable control per port-high = activate charge pump; low = force class AB operation. |
| 10, 11, 15, 16 | VLL_AB, CAPL_AB, CAPH_AB, VHH_AB | AB port charge pump terminals-connect external 33-nF capacitors to generate ±8 V auxiliary rails for extended swing. |
| 13, 14, 27, 28 | VSAB, VSCD | Main 12-V supply inputs-dual independent supplies allow isolation between ports for fault containment. |
| 17, 20, 21, 24 | OUTA, OUTB, OUTC, OUTD | Differential outputs-drive transformer primary windings; each pair (A/B or C/D) forms one VDSL2 line port. |
| 18, 19, 22, 23 | FB_A, FB_B, FB_C, FB_D | Active impedance feedback nodes-set precise 100-Ω line termination via external resistor network, minimizing echo and reflections. |
| 25, 26, 30, 31 | VHH_CD, CAPH_CD, CAPL_CD, VLL_CD | CD port charge pump terminals-identical function to AB port; enables independent class H control per line. |
Key Features
| Feature | Design Value |
|---|---|
| Digitally adjustable quiescent current | 7.6–23 mA per port in 1-mA steps via serial interface-enables precise power/performance trade-off per VDSL2 profile (e.g., Profile 8b vs 17a). |
| Full capacitor recharge time | 200 µs-ensures rapid recovery of class H voltage rails after burst transmission, maintaining signal integrity during dynamic line activity. |
| Low input voltage noise density | 6.5 nV/√Hz-preserves SNR in high-gain DSL receive paths where driver noise couples into upstream ADC front-end. |
| Active output impedance control | Configurable 100-Ω differential termination via FB pins-eliminates need for external resistive networks and improves return loss over frequency. |
| Line termination mode | 7.0 mA total quiescent current (both ports)-maintains impedance match while drawing <10 mW, ideal for sleep/idle states in energy-efficient DSLAMs. |
Applications
| VDSL2 Central Office Line Card | VDSL2 Remote Terminal Unit |
|---|---|
|
Use Scenario: High-density DSLAM with 64–128 ports delivering G.993.2 Profiles 8b, 17a, and 30 over copper pairs up to 1 km. IC Role / Device Role / Timing Role: Dual-channel line driver providing transmit signal amplification, active impedance matching, and class H rail boosting per port. Use Value: Enables 20.5 dBm line power at 8.5 MHz and 14.5 dBm up to 30 MHz while reducing per-port power consumption by 40% vs fixed-bias alternatives. |
Use Scenario: Compact street cabinet RTU serving 8–16 subscribers with mixed ADSL2+/VDSL2 profiles and dynamic profile switching. IC Role / Device Role / Timing Role: Dual-port driver supporting independent bias programming and class H enable per line to adapt to varying loop lengths and service tiers. Use Value: Achieves >90 dB port-to-port separation and –83 dBc HD3 distortion, ensuring clean multi-profile coexistence without cross-talk degradation. |
| ADSL2++ Backward-Compatible Deployment | Energy-Efficient DSL Infrastructure |
|
Use Scenario: Legacy DSLAM upgrade retaining ADSL2++ support while adding VDSL2 capability using same board layout and power design. IC Role / Device Role / Timing Role: Pin-compatible drop-in replacement for prior-generation line drivers, leveraging identical VQFN-32 footprint and 12-V supply. Use Value: Delivers 19.8 dBm ADSL MTPR performance with 6.5 nV/√Hz input noise-meeting ITU-T G.992.5 Annex M requirements without redesign. |
Use Scenario: Green DSLAM design targeting ENERGY STAR or ETSI EN 300 386 compliance with dynamic power scaling per active line. IC Role / Device Role / Timing Role: Programmable low-power line driver operating in line termination mode (7 mA) during idle periods and ramping bias only during transmission bursts. Use Value: Reduces average per-port power from 24.6 mA (full bias) to 7.0 mA (termination mode), cutting system-level heat dissipation by >70%. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-port VDSL2 line driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| THS6216IRHBT | Single-port version; identical architecture, specs, and pinout per port-but lacks second channel and CD-side pins (INC/IND/OUTC/OUTD/FB_C/FB_D etc.). | Requires two units for dual-channel use, increasing PCB area, BOM count, and power supply complexity. | Select when only one VDSL2 line is needed per board or when channel independence is required across separate ICs. |
| LMH6882IRHAT | Wideband RF VGA (dc–800 MHz); no integrated charge pump, no serial bias control, no active impedance feedback-requires external components for VDSL2 compliance. | Not qualified for G.993.2 profiles; lacks MTPR optimization, line termination, and DSL-specific distortion performance. | Consider only for custom broadband analog front-ends outside standardized xDSL protocols. |
Compared with THS6226AIRHBT, THS6216IRHBT provides identical per-port performance but requires duplication for dual-channel use, while LMH6882IRHAT offers broader bandwidth at the cost of missing DSL-specific features-making THS6226AIRHBT the only single-package, standards-compliant dual-port solution for production VDSL2 line cards.
Availability
THS6226AIRHBT is available at Aetrix Electronics and suitable for VDSL2 central office line cards, remote terminal units, and ADSL2++ backward-compatible DSLAM upgrades requiring stable component supply, long-term lifecycle assurance, and traceable sourcing for telecom infrastructure programs.
Supply support for THS6226AIRHBT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies for industrial, automotive, and communications markets.
The THS6226AIRHBT belongs to TI's high-performance line driver product line, engineered specifically for xDSL infrastructure-delivering class H efficiency, programmable bias, and active impedance control to meet G.993.2 VDSL2 spectral mask and MTPR requirements.
FAQ
What is the maximum output power and supported VDSL2 profile for THS6226AIRHBT?
The THS6226AIRHBT supports up to 20.5 dBm line power compliant with ITU-T G.993.2 VDSL2 Profile 8b (up to 8.5 MHz) and 14.5 dBm for Profile 17a/30 (up to 30 MHz). Its 40 VPP differential swing into 60 Ω with 1:1.4 transformer enables these profiles under full bias conditions while maintaining –83 dBc HD3 distortion at 1 MHz.
How does the class H operation improve efficiency in THS6226AIRHBT compared to class AB mode?
In class H mode, THS6226AIRHBT uses integrated charge pumps to generate ±8 V auxiliary rails, extending output swing to ±17.5 V/∓5.5 V-enabling higher peak signal levels without increasing average supply current. This reduces power consumption by ~40% versus class AB at equivalent line power, especially critical for multi-profile DSLAMs operating across varying loop lengths.
Can THS6226AIRHBT be used in ADSL2++ systems, and what performance does it deliver?
Yes, THS6226AIRHBT is backward-compatible with ADSL2++ systems. It delivers 19.8 dBm MTPR performance meeting G.992.5 Annex M requirements, with 6.5 nV/√Hz input-referred voltage noise and –87 dBc HD2 distortion at 1 MHz-ensuring clean upstream signal integrity and full compliance without hardware modification.
What is the function of the FB_A, FB_B, FB_C, and FB_D pins on THS6226AIRHBT?
The FB_A/FB_B pins configure active output impedance for the AB port, and FB_C/FB_D do the same for the CD port. When used with external resistor networks, they establish precise 100-Ω differential line termination-minimizing signal reflections, improving return loss, and eliminating the need for passive termination resistors that degrade high-frequency performance in VDSL2 systems.
Does THS6226AIRHBT support independent bias control for each of its two ports?
Yes, THS6226AIRHBT supports fully independent bias control per port via its two-wire serial interface (CLK/DATA) and dedicated VH_ENAB/VH_ENCD pins. Each port can be set to different bias levels (0–15), operate in class H or class AB, or enter line termination mode-enabling asymmetric configuration for mixed-profile deployments or fault-isolated operation.
THS6226AIRHBT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Function:
- VDSL2 Line Driver Amplifier
- Interface:
- Serial
- Number of Circuits:
- 2
- Voltage - Supply:
- 10V ~ 12.5V
- Current - Supply:
- 24.6mA
- Power (Watts):
- -
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-VQFN (5x5)
THS6226AIRHBT FAQ
1.How can I place an order for THS6226AIRHBT through Aetrix?
Please submit a Request for Quotation (RFQ) for THS6226AIRHBT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for THS6226AIRHBT reliable?
The price and inventory of THS6226AIRHBT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for THS6226AIRHBT is usually 5 days.
3.What payment methods are accepted for THS6226AIRHBT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for THS6226AIRHBT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for THS6226AIRHBT?
THS6226AIRHBT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your THS6226AIRHBT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for THS6226AIRHBT?
For technical support, including THS6226AIRHBT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your THS6226AIRHBT requirements.
6.How does Aetrix verify that THS6226AIRHBT is sourced from the original manufacturer or authorized distributors?
All THS6226AIRHBT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that THS6226AIRHBT meets industry standards.
7.What is the process for return or replacement of THS6226AIRHBT?
All THS6226AIRHBT units undergo pre-shipment inspection (PSI). If there is an issue with THS6226AIRHBT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The THS6226AIRHBT part is unused and in its original packaging.
Return procedure for THS6226AIRHBT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
THS6226AIRHBT Tags

-
LMC567CMX/NOPB
Texas Instruments

-
LM567CMX/NOPB
Texas Instruments

-
LM567CM/NOPB
Texas Instruments

-
VSC8531XMW-02
Microchip Technology

-
VSC8531XMW-05
Microchip Technology

-
GPY115C0VI
MaxLinear, Inc.
-
SI32185-A-FMR
Skyworks Solutions Inc.
-
VSC8541XMV-05
Microchip Technology

-
SI32178-B-FM1R
Skyworks Solutions Inc.

-
GPY215C0VI
MaxLinear, Inc.

-
CPC7514ZTR
Littelfuse Inc.

-
VSC8502XML-03
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

