Texas Instruments THS7303PWRG4
- Part No.:
- THS7303PWRG4
- Manufacturer:
- Texas Instruments
- Category:
- Video Amps and Modules
- Package:
- 20-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
THS7303PWRG4.pdf
- Description:
- IC AMP MPLEX AMP 20TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
THS7303PWRG4 from Texas Instruments is a 3-channel, low-power video amplifier with I²C control, selectable 5th-order Butterworth filters (9/16/35 MHz or bypass), 6-dB fixed gain, SAG correction, 2:1 input MUX per channel, and configurable AC/DC input bias modes. It operates from 2.7 V to 5 V and delivers rail-to-rail output swing for CVBS, S-Video, Y'P'BP'R, and G'B'R' buffering in set-top boxes and portable video systems.
For engineers reviewing the THS7303PWRG4 datasheet, THS7303PWRG4 pinout, THS7303PWRG4 application, or THS7303PWRG4 equivalent, key selection criteria include filter corner frequency configurability, I²C-addressable per-channel enable/mute, SAG correction capability, DC-coupled 135-mV input shift support, and TSSOP-20 package compatibility with 150-Ω video load drive.
Technical Context
The THS7303PWRG4 integrates three independent video amplifiers, each with a digitally selectable 5th-order Butterworth low-pass filter (9/16/35 MHz or full-bypass mode) and programmable input bias configuration (AC-sync-tip-clamp, AC-fixed-bias, DC, or DC+135 mV). Its I²C interface (address 01011A1A0R/W) enables per-channel control of filter selection, mute, disable, and bias mode without external components.
Each channel features rail-to-rail output driving capability (±125 mA), 300 V/μs slew rate in bypass mode, and <0.5 ns channel-to-channel group delay matching. The built-in SAG correction circuit-implemented via dedicated SAG pins tied to outputs-compensates for low-frequency droop in long coaxial cable runs, supporting stable 75-Ω video signal transmission.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 2.7 V to 5 V single supply; supports USB-powered (3.3 V) and legacy 5 V video systems. |
| Total Quiescent Current | 16.6 mA at 3.3 V; enables low-power portable video buffering with <1 μA shutdown per channel. |
| Filter Corner Frequencies | Selectable 9 MHz (SDTV), 16 MHz (EDTV/480p), 35 MHz (HDTV/720p), or bypass (190 MHz small-signal BW). |
| Differential Gain / Phase | 0.13% / 0.55° at 9 MHz (NTSC/PAL); meets broadcast-grade video fidelity requirements. |
| Rail-to-Rail Output Swing | Swings within 100 mV of rails into 150 Ω; supports both AC-coupled (capacitor-input) and DC-coupled (direct-input) video paths. |
| I²C Addressing | 7-bit address 01011xx (A1/A0 pins); allows up to four devices on same bus for multi-channel system scaling. |
| SAG Correction | Dedicated per-channel SAG pin; shorted to output to correct low-frequency amplitude droop in long cable runs. |
Pinout & Package
TSSOP-20 package (PW designation), 0.65 mm pitch, 6.5 mm × 4.4 mm body, thermally enhanced for video amplifier power dissipation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CH.1–INPUT A / B | Video input multiplexer inputs | 2:1 analog MUX per channel; selects between two video sources (e.g., tuner vs. HDMI converter) under I²C control. |
| CH.1–OUTPUT | Amplified video output | Rail-to-rail buffered output capable of driving 75 Ω or 150 Ω loads; compatible with standard video termination. |
| CH.1–SAG | SAG correction feedback node | Must be shorted to CH.1–OUTPUT to activate SAG correction; open or grounded to disable. |
| I2C-A0 / I2C-A1 | I²C slave address bits | Hardwired to VS+ or GND to configure unique 7-bit I²C address (01011A1A0R/W) for multi-device bus operation. |
| SDA / SCL | I²C bidirectional data/clock | Standard-mode (100 kHz) or fast-mode (400 kHz) interface; pull-up resistors required (2–19 kΩ to VS+). |
Key Features
| Feature | Design Value |
|---|---|
| Per-channel I²C programmability | Independent control of filter selection, mute, disable, and input bias mode eliminates need for external logic or jumpers. |
| Selectably bypassable 5th-order LPF | Hardware-filtered video path ensures precise NTSC/PAL/HD image reconstruction without external passive components. |
| DC-coupled +135 mV input shift | Enables full sync-tip dynamic range at output when input is referenced to 0 V, critical for FPGA/ASIC video DAC interfaces. |
| Rail-to-rail output stage | Supports direct connection to downstream ADCs or level-shifting circuits without clamping diodes or AC coupling caps. |
| Channel-to-channel crosstalk < –70 dB | Prevents interference between RGB or YUV channels in multi-lane video routing (e.g., component video outputs). |
Applications
| Set-Top Box Video Output | PVR/DVDR Analog Output Buffering |
|---|---|
Use Scenario: Driving composite (CVBS) and S-Video outputs from an MPEG decoder SoC to consumer TVs. IC Role / Device Role / Timing Role: Final-stage video buffer with selectable 9-MHz filter and sync-tip clamp for NTSC/PAL compliance. Use Value: Eliminates external RC filters and clamping circuits while maintaining 0.13% differential gain for broadcast-quality playback. | Use Scenario: Buffering Y'P'BP'R component video signals from a DVD recorder ASIC to external monitors. IC Role / Device Role / Timing Role: 3-channel amplifier with 16-MHz filter and DC-coupled input for 480p/576p progressive scan timing. Use Value: Enables direct connection to 150-Ω internal routing traces and 75-Ω external connectors without level-shifting or impedance mismatch. |
| USB-Powered Portable Video Adapter | HDTV Source Component Video Interface |
Use Scenario: Low-power video signal conditioning in battery-operated HDMI-to-analog converters. IC Role / Device Role / Timing Role: 3.3-V, 16.6-mA total quiescent current amplifier with I²C-configurable 2:1 MUX for source switching. Use Value: Extends battery life while supporting hot-plug detection and dynamic resolution switching via I²C commands. | Use Scenario: Driving 720p/1080i Y'P'BP'R signals from Blu-ray players to AV receivers with long cable runs. IC Role / Device Role / Timing Role: SAG-corrected 35-MHz amplifier with rail-to-rail output to maintain flat frequency response over 30 m coax. Use Value: Compensates for low-frequency attenuation in RG-6 cables, preserving luminance detail and color fidelity at full HD resolutions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar video amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| THS7314RGTT | 4-channel, no I²C control, fixed 9-MHz filter, higher 25-mA quiescent current. | Lacks per-channel programmability and SAG correction; suited for cost-sensitive fixed-function designs. | Choose when I²C control and flexible filtering are unnecessary and channel count exceeds three. |
| LMH6732MA/NOPB | Single-channel, no integrated filter or MUX, 1.8-GHz bandwidth, 15.5-mA IQ at 5 V. | Requires external filter design and biasing; optimized for high-speed test equipment, not broadcast video. | Choose only for non-standard video formats requiring >100 MHz bandwidth and discrete filter tuning. |
Compared with THS7303PWRG4, THS7314RGTT offers higher channel density but sacrifices I²C configurability and SAG correction, while LMH6732MA/NOPB provides raw bandwidth at the cost of system-level integration-making THS7303PWRG4 optimal for standards-compliant, low-power, multi-source video routing.
Availability
THS7303PWRG4 is available at Aetrix Electronics and suitable for set-top box video output, PVR/DVDR analog buffering, and USB-powered portable video adapters requiring stable component supply across industrial temperature ranges (–40°C to +85°C).
Supply support for THS7303PWRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies for industrial, automotive, and consumer applications.
The THS7303 product line targets video signal conditioning in consumer electronics, delivering integrated filtering, I²C configurability, and low-power operation for SD/ED/HD video interfaces.
FAQ
What video standards does the THS7303PWRG4 support with its selectable filters?
The THS7303PWRG4 supports NTSC and PAL broadcast standards using its 9-MHz filter mode, 480p/576p EDTV with the 16-MHz mode, and 720p/1080i HDTV with the 35-MHz mode. Its bypass mode enables full-bandwidth operation up to 190 MHz for non-standard or future-proof video formats. All modes maintain differential gain ≤0.13% and phase ≤0.55° at 3.3 V, ensuring compliance with CCIR 576-2 unified SNR weighting.
How is SAG correction implemented on the THS7303PWRG4, and what is its design impact?
SAG correction on the THS7303PWRG4 is implemented via dedicated per-channel SAG pins (pins 14, 16, 18) that must be shorted to their respective output pins (15, 17, 19). This feedback loop actively compensates for low-frequency amplitude droop caused by capacitive cable loading, preserving luminance flatness over long 75-Ω coaxial runs. When enabled, THS7303PWRG4 maintains consistent black-level integrity and contrast in 1080i component video distribution.
Can the THS7303PWRG4 operate from a 3.3-V supply while driving a 75-Ω load?
Yes, the THS7303PWRG4 operates fully specified from 3.3 V and drives 75-Ω loads directly. At 3.3 V, it delivers ≥2.9 V high output swing and ≤0.24 V low output swing into 75 Ω to GND, meeting SMPTE RP-177 voltage compliance for component video. Its rail-to-rail output stage ensures minimal headroom loss, and the 16.6-mA total quiescent current enables efficient thermal performance in compact TSSOP-20 layouts.
What are the I²C timing requirements for configuring the THS7303PWRG4 during system startup?
The THS7303PWRG4 supports standard-mode (100 kHz) and fast-mode (400 kHz) I²C operation. Minimum SCL high/low pulse widths are 4 μs / 4.7 μs (standard) or 0.6 μs / 1.3 μs (fast), with rise/fall times ≤1000 ns / ≤300 ns respectively. Setup/hold times for SDA relative to SCL are ≥250 ns / ≥0 ns (standard) or ≥100 ns / ≥0 ns (fast). These timings ensure reliable register writes for filter selection, mute, and bias mode before video signal activation.
Does the THS7303PWRG4 require external passive components for basic operation?
No, the THS7303PWRG4 requires only decoupling capacitors (0.1 μF ceramic near VS+ and GND) and I²C pull-up resistors (2–19 kΩ to VS+) for basic operation. Its integrated 5th-order Butterworth filters, 2:1 MUX, SAG correction, and input bias circuitry eliminate the need for external RC networks, clamping diodes, or level-shifters-reducing BOM count and PCB area in space-constrained video interface designs.
THS7303PWRG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 20-TSSOP (0.173", 4.40mm Width)
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Applications:
- 2:1 Multiplexer-Amplifier
- Output Type:
- Rail-to-Rail
- Number of Circuits:
- 3
- -3db Bandwidth:
- 190 MHz
- Slew Rate:
- 320V/µs
- Current - Supply:
- 18.9 mA
- Current - Output / Channel:
- 85 mA
- Voltage - Supply, Single/Dual (±):
- 2.6V ~ 5.5V
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 20-TSSOP
THS7303PWRG4 FAQ
1.How can I place an order for THS7303PWRG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for THS7303PWRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for THS7303PWRG4 reliable?
The price and inventory of THS7303PWRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for THS7303PWRG4 is usually 5 days.
3.What payment methods are accepted for THS7303PWRG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for THS7303PWRG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for THS7303PWRG4?
THS7303PWRG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your THS7303PWRG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for THS7303PWRG4?
For technical support, including THS7303PWRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your THS7303PWRG4 requirements.
6.How does Aetrix verify that THS7303PWRG4 is sourced from the original manufacturer or authorized distributors?
All THS7303PWRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that THS7303PWRG4 meets industry standards.
7.What is the process for return or replacement of THS7303PWRG4?
All THS7303PWRG4 units undergo pre-shipment inspection (PSI). If there is an issue with THS7303PWRG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The THS7303PWRG4 part is unused and in its original packaging.
Return procedure for THS7303PWRG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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