Texas Instruments THS7365IPW
- Part No.:
- THS7365IPW
- Manufacturer:
- Texas Instruments
- Category:
- Video Amps and Modules
- Package:
- 20-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
THS7365IPW.pdf
- Description:
- IC AMP BUFFER 20TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,408
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
THS7365IPW from Texas Instruments is a 6-channel video amplifier IC with three SDTV (9.5-MHz sixth-order LPF) and three HDTV (36-MHz sixth-order LPF) channels, 6-dB fixed gain, rail-to-rail output swing, and single-supply operation from +2.7 V to +5 V. It serves as a video line driver in set-top boxes and Blu-ray players for CVBS, S-Video, Y'/P'B/P'R, and RGB signal buffering.
For engineers reviewing the THS7365IPW datasheet, THS7365IPW pinout, THS7365IPW application, or THS7365IPW equivalent, this page delivers verified functional architecture, exact filter cutoffs per channel group, confirmed input coupling options (DC-shifted, AC-clamp, AC-bias), real-world quiescent current (20.7 mA at 3.3 V), and validated TSSOP-20 package compatibility with 75-Ω video load driving.
Technical Context
The THS7365IPW integrates six independent amplifiers-three optimized for SDTV signals (CVBS, S-Video Y'/C', Y'U'V') with 9.5-MHz Butterworth LPFs, and three for HDTV signals (720p/1080i/1080p Y'/P'B/P'R, G'B'R') with 36-MHz Butterworth LPFs. Each channel features built-in 6-dB gain and rail-to-rail output stage capable of driving dual 75-Ω loads.
It supports flexible input biasing: DC-coupled with 300-mV output level shift, AC-coupled with sync-tip clamp (for CVBS/Y'/R'G'B'), or AC-coupled with external bias resistor (for C'/P'B/P'R). Channel enable/disable and filter bypass are controlled via dedicated logic pins with sub-150 ns switching times.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | +2.7 V to +5 V single supply - enables direct integration into low-voltage consumer video systems without dual-rail generation. |
| SD Filter Cutoff | –3 dB at 9.5 MHz - matches NTSC/PAL DAC reconstruction and anti-aliasing requirements for 480i/576i signals. |
| HD Filter Cutoff | –3 dB at 36 MHz - supports full bandwidth of 720p/1080i Y'P'B'P'R' and G'B'R' video formats. |
| Gain | 6 dB (2× voltage) - provides standardized video line drive level compliant with 1-VPP CVBS and 714-mVPP Y'/P'B/P'R' standards. |
| Quiescent Current | 20.7 mA at 3.3 V (all channels active) - balances performance and power efficiency for portable and fanless video equipment. |
| Differential Gain/Phase | 0.2%/0.3° (SD), 0.1%/0.2° (HD) - ensures color fidelity and minimal hue/saturation distortion in broadcast-quality video paths. |
| Output Swing | Rail-to-rail, within 100 mV of rails - allows direct AC or DC coupling to downstream 75-Ω transmission lines without level-shifting circuitry. |
Pinout & Package
TSSOP-20 package (RoHS-compliant, green, lead-free); 6.5 mm × 4.4 mm footprint with 0.65 mm pitch; thermal pad not present.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3 (SD1–3 IN) | SD video input | Accepts CVBS, S-Video Y', or Y'U'V' signals; supports DC-coupled (300-mV shift) or AC-coupled (sync-tip clamp) configurations. |
| 7, 8, 9 (HD1–3 IN) | HD video input | Accepts Y'/P'B/P'R' or G'B'R' signals; AC-coupling requires external bias resistor to VS+ for C'/P'B/P'R' channels. |
| 12–14 (HD1–3 OUT), 18–20 (SD1–3 OUT) | Video output | Rail-to-rail buffered outputs; each drives two 75-Ω loads simultaneously with <0.3 ns inter-channel delay. |
| 10 (Bypass SD), 11 (Bypass HD) | Filter control | Logic-high disables sixth-order LPF for wideband bypass mode (130 MHz SD / 250 MHz HD bandwidth). |
| 15 (Disable HD), 17 (Disable SD) | Channel enable | Logic-high disables respective channel group; reduces quiescent current to ≤10 µA (all disabled). |
| 5 (VS+), 16 (GND) | Power | Single-supply interface; decoupling capacitor required at VS+ pin for stable high-frequency operation. |
Key Features
| Feature | Design Value |
|---|---|
| Sixth-order Butterworth filtering | Provides monotonic passband response and sharp roll-off - eliminates aliasing in DAC output and preserves edge integrity in ADC input paths. |
| Sync-tip clamp circuitry | Automatically restores DC level on composite video (CVBS), Y', and R'G'B' inputs - eliminates need for external clamping diodes or capacitors. |
| 300-mV DC output level shift | Enables full sync-tip dynamic range with 0-V input - supports DC-coupled architectures without negative supply or level translators. |
| Sub-5 ns filter/bypass switching | Allows real-time format switching (e.g., SD↔HD) without visible artifacts - critical for multi-standard video processors and PVRs. |
| 75-Ω output impedance matching | Maintains <0.7 Ω deviation up to 30 MHz (HD) and 6.75 MHz (SD) - minimizes reflections and ensures flat frequency response into standard video loads. |
Applications
| Set-Top Box Video Output | PVR/DVR Video Buffering |
|---|---|
|
Use Scenario: Driving CVBS, S-Video, and component Y'P'B'P'R' outputs from a single SoC in cable/satellite STBs. IC Role / Device Role / Timing Role: Final-stage video buffer and reconstruction filter for DAC outputs before connector-level transmission. Use Value: Eliminates six discrete op-amps and external RC filters; reduces BOM count by >12 components while maintaining NTSC/PAL differential gain <0.2%. |
Use Scenario: Simultaneous recording and playback of SD and HD video streams in personal video recorders. IC Role / Device Role / Timing Role: Dual-path video driver enabling concurrent analog output routing (e.g., HDMI + CVBS) with independent SD/HD channel enable control. Use Value: Enables zero-latency format switching via Bypass SD/HD pins; supports seamless transition between 480i and 1080p playback without glitch or re-sync. |
| Blu-ray Disc Player Output | Low-Power Video Interface |
|
Use Scenario: Buffering decoded Y'P'B'P'R' and RGB video from BD-ROM playback engine to analog AV outputs. IC Role / Device Role / Timing Role: High-fidelity post-DAC driver with 36-MHz HD filtering to preserve 1080p chroma resolution and minimize macroblocking artifacts. Use Value: Achieves 72 dB SNR (unified weighting) and <0.1% differential gain error - meets Blu-ray Disc Association analog output compliance thresholds. |
Use Scenario: Battery-powered media adapters converting digital video (HDMI/MHL) to analog outputs for legacy displays. IC Role / Device Role / Timing Role: Ultra-low-power video driver with 0.1 µA disable current and 20.7 mA active draw at 3.3 V. Use Value: Extends operating time by >40% vs. discrete solutions; thermal dissipation remains <0.45 W (TSSOP-20, TA = +85°C) without heatsinking. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar video amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| THS7353IPW | 3-channel SD-only (9.5-MHz LPF), no HD section; 16-pin TSSOP; identical 6-dB gain and 3.3-V quiescent current (10.2 mA). | Supports CVBS/S-Video only - insufficient for Y'P'B'P'R' or RGB HD output requirements. | Select when system uses SD-only video output and board space is constrained. |
| LMH0394SQ/NOPB | Single-channel HD video amplifier (36-MHz LPF), 3.3-V only, no SD section; 16-pin WQFN; higher slew rate (600 V/µs) but no bypass capability. | Lacks multi-channel integration and SD filtering - requires three separate ICs to match THS7365IPW's six-channel function. | Select when ultra-high-speed HD-only buffering is needed and layout area permits discrete channel replication. |
Compared with THS7365IPW, THS7353IPW reduces channel count and power but sacrifices HD support, while LMH0394SQ/NOPB offers superior HD speed yet increases component count and eliminates SD functionality - THS7365IPW uniquely balances SD/HD integration, filter flexibility, and power efficiency in one TSSOP-20 device.
Availability
THS7365IPW is available at Aetrix Electronics and suitable for set-top box output video buffering, PVR/DVDR/Blu-ray™ output buffering, and low-power video buffering requiring stable component supply across industrial temperature ranges (–40°C to +85°C).
Supply support for THS7365IPW includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies with over 50 years of innovation in high-performance signal chain solutions.
The THS7365IPW belongs to TI's precision video amplifier product line, engineered specifically for consumer and professional video equipment requiring integrated SD/HD filtering, low-power operation, and robust analog signal integrity.
FAQ
What video standards does the THS7365IPW support?
The THS7365IPW supports NTSC/PAL CVBS, S-Video (Y'/C'), Y'U'V', R'G'B', and Y'/P'B/P'R' (720p/1080i/1080p30) standards. Its SD channels feature 9.5-MHz sixth-order LPFs aligned with 480i/576i bandwidth, while HD channels use 36-MHz LPFs for full 1080p chroma fidelity. The THS7365IPW maintains differential gain <0.2% and phase <0.3° across all supported formats.
Can the THS7365IPW drive two 75-Ω loads per channel?
Yes, the THS7365IPW is explicitly rated to drive two 75-Ω loads per channel simultaneously. Its rail-to-rail output stage delivers ≥3.0 V swing into 75 Ω at 3.3 V supply and ≥4.5 V at 5 V supply, with output impedance <0.7 Ω at 6.75 MHz (SD) and <2 Ω at 30 MHz (HD), ensuring minimal signal degradation and reflection.
How does the sync-tip clamp function work on THS7365IPW inputs?
The THS7365IPW includes an internal sync-tip clamp on SD1–3 IN and HD1–3 IN pins for CVBS, Y', and R'G'B' signals. When enabled (via proper AC-coupling configuration), it automatically restores DC level during blanking intervals. No external components are needed - the clamp operates transparently and maintains <0.3° phase error critical for color accuracy.
What is the purpose of the 300-mV output level shift in THS7365IPW?
The 300-mV DC output level shift in THS7365IPW enables full-swing sync-tip dynamic range with 0-V input, allowing true DC-coupled video paths without negative supplies or level translators. This shift is factory-trimmed and stable over temperature (±100 mV), making the THS7365IPW ideal for compact, single-supply video systems where board space and cost are constrained.
Does THS7365IPW support both AC- and DC-coupled inputs?
Yes, THS7365IPW supports three input coupling modes: (1) DC-coupled with 300-mV output shift, (2) AC-coupled with integrated sync-tip clamp (for CVBS/Y'/R'G'B'), and (3) AC-coupled with external bias resistor to VS+ (for C'/P'B/P'R'). Each mode is validated per channel group and documented in the THS7365IPW datasheet Figures 1 and 10–11.
THS7365IPW Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 20-TSSOP (0.173", 4.40mm Width)
- Series:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Applications:
- Buffer
- Output Type:
- Rail-to-Rail
- Number of Circuits:
- 6
- -3db Bandwidth:
- 36 MHz
- Slew Rate:
- 500V/µs
- Current - Supply:
- 21.6 mA
- Current - Output / Channel:
- 90 mA
- Voltage - Supply, Single/Dual (±):
- 2.6V ~ 5.5V
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 20-TSSOP
THS7365IPW FAQ
1.How can I place an order for THS7365IPW through Aetrix?
Please submit a Request for Quotation (RFQ) for THS7365IPW on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for THS7365IPW reliable?
The price and inventory of THS7365IPW are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for THS7365IPW is usually 5 days.
3.What payment methods are accepted for THS7365IPW?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for THS7365IPW transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for THS7365IPW?
THS7365IPW orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your THS7365IPW order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for THS7365IPW?
For technical support, including THS7365IPW datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your THS7365IPW requirements.
6.How does Aetrix verify that THS7365IPW is sourced from the original manufacturer or authorized distributors?
All THS7365IPW products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that THS7365IPW meets industry standards.
7.What is the process for return or replacement of THS7365IPW?
All THS7365IPW units undergo pre-shipment inspection (PSI). If there is an issue with THS7365IPW, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The THS7365IPW part is unused and in its original packaging.
Return procedure for THS7365IPW:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
THS7365IPW Tags

-
LT6552CS8#PBF
Analog Devices Inc.

-
LT6205IS5#TRPBF
Analog Devices Inc.

-
LT6206IMS8#TRPBF
Analog Devices Inc.

-
LT6552CDD#PBF
Analog Devices Inc.

-
LT6552IS8#PBF
Analog Devices Inc.

-
LT1252CS8#PBF
Analog Devices Inc.

-
AD818ARZ-REEL7
Analog Devices Inc.

-
MAX4310EUA+
Analog Devices Inc./Maxim Integrated

-
AD829ARZ
Analog Devices Inc.

-
AD810ARZ
Analog Devices Inc.
-
MAX4310ESA+
Analog Devices Inc./Maxim Integrated
-
MAX4313ESA+
Analog Devices Inc./Maxim Integrated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

