NXP Semiconductors TJA1128ATK/1Z
- Part No.:
- TJA1128ATK/1Z
- Manufacturer:
- NXP Semiconductors
- Category:
- Specialized
- Package:
- 14-VDFN Exposed Pad
- Datasheet:
-
TJA1128ATK/1Z.pdf
- Description:
- LIN MINI SYSTEM BASIS CHIP WITH
- Quantity:
- Payment:

- Shipping:

Inventory:4,650
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Product details
Overview
TJA1128ATK/1Z from NXP Semiconductors is a LIN Mini System Basis Chip (SBC) integrating a LIN transceiver, 5.0 V/85 mA LDO regulator, window watchdog, two level-sensitive WAKE inputs, one GPI, and an open-drain HVMPO output. It supports ISO 17987-4:2016, LIN 2.2A, and SAE J2602 compliance with bus and local wake-up capability in STANDBY (22 µA typ.) and SLEEP (14 µA typ.) modes - deployed in automotive body control modules for door locks and seat positioners.
For engineers reviewing the TJA1128ATK/1Z datasheet, TJA1128ATK/1Z pinout, TJA1128ATK/1Z application, or TJA1128ATK/1Z equivalent, key selection considerations include its 5.0 V LDO output, dual-WAKE input support, configurable HVMPO limp-home function, SPI-configurable watchdog period (16–128 ms), and HVSON14 package compatibility with AOI inspection and thermal management in 12 V vehicle networks.
Technical Context
The TJA1128ATK/1Z implements a state-machine-based system controller supporting nine deterministic operating modes (NORMAL, STANDBY, SLEEP, CONFIG, etc.), with mode transitions governed by EN, STBN, and RSTN signal levels and internal CRC validation. Its LIN physical layer operates at up to 20 kBd with high-speed slope support for >20 kBd, integrated termination, and TXD dominant time-out protection.
Wake-up detection is fully configurable per input: WAKE1/WAKE2 support edge- or level-sensitive triggering, while LIN wake-up is enabled via BUSWKE bit; all wake sources are recognized and reported in PORT mode via serial status flags on RXD. The HVMPO output is programmable via MPOMOD bits for cyclic wake bias control, limp-home signaling, or GPI-controlled switching - synchronized with internal timing logic.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| LDO Output Voltage | 5.0 V ±2 % - powers external microcontrollers with tight regulation across battery range (5–28 V) |
| LDO Output Current | 85 mA - sufficient for typical automotive MCUs without external boost stages |
| Standby Current | 22 µA typ. - enables low-power node operation while maintaining VCC supply and wake detection |
| Sleep Current | 14 µA typ. - minimal quiescent draw when regulator and LIN transceiver are disabled |
| LIN Baud Rate | Up to 20 kBd (standard), + high-speed slope mode - supports legacy and enhanced LIN communication |
| Watchdog Period | 16 ms to 128 ms selectable - configurable timeout window for MCU supervision in safety-critical functions |
| Operating Temp Range | −40 °C to +150 °C - qualified per AEC-Q100 Grade 0 for under-hood and cabin applications |
Pinout & Package
Package: HVSON14 (3.0 mm × 4.5 mm × 0.85 mm), leadless, thermally enhanced, AOI-compatible; exposed center pad must be soldered to PCB ground for optimal thermal and electrical performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| TXD (SDI) | LIN transmit / SPI data input | Drives LIN bus in NORMAL mode; serves as SPI data input during CONFIG mode |
| EN (SCK) | Enable / SPI clock | Controls mode transitions (e.g., STANDBY→NORMAL); clocks SPI configuration data |
| RSTN | Bidirectional reset | Active-low reset input/output; provides programmable 4 ms or 700 µs power-on reset pulse |
| RXD (SDO) | LIN receive / SPI data output | Outputs LIN data in NORMAL mode; reports wake-source flags in PORT mode via UART-like serial format |
| STBN (SCSN) | Standby control / SPI chip select | Active-low input controlling STANDBY entry; selects device during SPI configuration |
| WWD | Watchdog trigger | Accepts periodic pulses from MCU to prevent watchdog timeout and limp-home activation |
| GPI | General purpose input | Configurable digital input; can control HVMPO output state when MPOMOD = 001 |
| VCC | LDO regulated output | 5.0 V ±2 % supply rail delivering up to 85 mA; includes undervoltage detection with RSTN assertion |
| GND | Ground reference | Primary return path; center pad must connect to GND for thermal dissipation and EMI control |
| LIN | LIN bus I/O | Analog bidirectional interface compliant with ISO 17987-4; short-circuit proof to BAT and GND |
| BAT | Battery supply input | Accepts 5–28 V DC; load-dump protected to 43 V; feeds LDO and internal circuitry |
| WAKE2 / WAKE1 | Local wake-up inputs | Level- or edge-sensitive wake sources; configurable independently via LC2WKE/LC1WKE bits |
| HVMPO | High-voltage multipurpose output | Open-drain output supporting limp-home, cyclic wake bias, GPI-controlled switching, or state-driven signaling |
Key Features
| Feature | Design Value |
|---|---|
| LIN Transceiver Compliance | Fully compliant with ISO 17987-4:2016, LIN 2.2A, and SAE J2602 - ensures interoperability in multi-vendor automotive networks |
| Configurable Wake-Up Sources | Three independent wake paths (LIN bus, WAKE1, WAKE2) with source identification in PORT mode - eliminates ambiguity during low-power recovery |
| HVMPO Functional Flexibility | Seven programmable modes including limp-home output and cyclic wake bias control - replaces discrete components in fail-safe subsystems |
| Quasi One-Time SPI Configuration | Nonvolatile MTP memory stores register settings (e.g., watchdog period, wake enable, HVMPO mode) - eliminates boot-time initialization overhead |
| Automotive Robustness | AEC-Q100 qualified; ±8 kV HBM ESD on LIN; load dump protection to 43 V; ISO 7637 transient immunity - meets OEM stress test requirements |
Applications
| Door Lock Actuator Control | Seat Position Memory Module |
|---|---|
Use Scenario: Central body controller manages power door locks using LIN commands and monitors lock motor current via analog feedback. IC Role / Device Role / Timing Role: TJA1128ATK/1Z acts as LIN node SBC - providing regulated 5.0 V power, LIN physical layer, and wake-up from sleep upon key-fob signal. Use Value: Enables ultra-low standby current (22 µA) while retaining remote wake capability and limp-home output to hold lock state during overtemperature events. | Use Scenario: Seat ECU stores and recalls multiple seat positions via LIN commands from driver interface; requires reliable power and fault reporting. IC Role / Device Role / Timing Role: TJA1128ATK/1Z supplies 5.0 V to MCU and position sensors, monitors VCC undervoltage, and asserts limp-home on RSTN short-to-ground. Use Value: Integrates watchdog supervision (16–128 ms window) and wake-source recognition - ensuring deterministic recovery after brownout or software hang. |
| Roof Sunshade Motor Driver | Interior Ambient Light Sensor Node |
Use Scenario: Sunshade actuator responds to LIN commands to extend/retract shade; must survive load dump and operate across full battery range. IC Role / Device Role / Timing Role: TJA1128ATK/1Z serves as robust LIN interface and power manager - regulating 5.0 V for motor driver logic and enabling local wake via WAKE1 on sun sensor threshold crossing. Use Value: Delivers 85 mA LDO current and withstands 43 V load dump transients - eliminating need for external TVS and reducing BOM count. | Use Scenario: Ambient light sensor communicates luminance data over LIN; operates continuously in low-power cabin environment. IC Role / Device Role / Timing Role: TJA1128ATK/1Z powers sensor MCU in STANDBY mode, detects LIN bus activity for polling, and uses HVMPO as GPI-controlled enable for ADC sampling. Use Value: Configurable HVMPO (MPOMOD=001) allows sensor enable/disable synchronization with LIN traffic - minimizing average system current. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LIN SBC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLIN1029DR | Single-WAKE input; no HVMPO; 3.3 V LDO only; no window watchdog - basic LIN transceiver + regulator | Lacks limp-home, cyclic wake, and dual-WAKE support - suitable only for non-safety-critical LIN nodes | Select when cost sensitivity outweighs functional redundancy and fail-safe requirements |
| UJA1075ATW/3V3/1Z | 3.3 V LDO; includes CAN interface; larger HVQFN32 package; higher integration - full CAN+LIN SBC | Supports dual-bus (CAN+LIN) architectures but consumes more board area and power in STANDBY (40 µA) | Choose when CAN backbone coordination with LIN peripherals is required in gateway or junction box designs |
Compared with TLIN1029DR and UJA1075ATW/3V3/1Z, the TJA1128ATK/1Z delivers optimal balance of LIN-specific robustness, ultra-low-power operation (14 µA sleep), and flexible HVMPO functionality - making it ideal for cost-constrained, space-limited, and safety-aware LIN endpoints where dual wake-up inputs and limp-home are mandatory.
Availability
TJA1128ATK/1Z is available at Aetrix Electronics and suitable for automotive body electronics, chassis control systems, and interior lighting modules requiring stable component supply across extended temperature and voltage ranges.
Supply support for TJA1128ATK/1Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in automotive-grade mixed-signal ICs.
The TJA1128ATK/1Z belongs to NXP's LIN System Basis Chip product line, designed specifically to reduce system complexity and improve reliability in 12 V automotive LIN networks - targeting body control, comfort, and convenience subsystems.
FAQ
What is the LDO output voltage specification for the TJA1128ATK/1Z?
The TJA1128ATK/1Z features a fixed 5.0 V low-dropout voltage regulator with ±2 % accuracy across temperature and load conditions. It delivers up to 85 mA to power external microcontrollers and peripherals, includes undervoltage detection that asserts RSTN below threshold, and remains stable with small ceramic output capacitors - confirmed in Section 2.3 and Table 1 of the datasheet.
How does the TJA1128ATK/1Z support wake-up from low-power modes?
The TJA1128ATK/1Z supports three independent wake-up sources: remote wake-up via the LIN bus (pin LIN), and local wake-up via WAKE1 and WAKE2 pins. All are configurable for level- or edge-sensitive detection, and wake-source identification is available in PORT mode via serial status flags on RXD - enabling precise root-cause analysis after exit from STANDBY or SLEEP modes.
Can the HVMPO pin on the TJA1128ATK/1Z be used for limp-home functionality?
Yes, the HVMPO pin on the TJA1128ATK/1Z can be configured as a limp-home output via MPOMOD = 011 in the HVMPO register (address 15h). It activates automatically on overtemperature, watchdog service failure, VCC undervoltage, or RSTN short-to-ground - providing fail-safe signaling to external circuits without MCU intervention.
What LIN protocol versions does the TJA1128ATK/1Z support?
The TJA1128ATK/1Z is compliant with ISO 17987-4:2016 (12 V LIN), LIN 2.0, LIN 2.1, LIN 2.2, LIN 2.2A, and SAE J2602-1. It supports baud rates up to 20 kBd in standard mode and higher with high-speed slope mode - ensuring interoperability with legacy and next-generation LIN masters and slaves in automotive networks.
Is the TJA1128ATK/1Z pin-compatible with other variants in the TJA1128 family?
Yes, all TJA1128 variants - including TJA1128ATK/1Z, TJA1128BTK/1Z, and TJA1128GTK/1Z - share identical HVSON14 pinout and footprint. Differences lie in factory-programmed configuration (e.g., LDO voltage, WAKE count, watchdog enable), not physical layout - allowing drop-in replacement where functional requirements align.
TJA1128ATK/1Z Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 14-VDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- System Basis Chip
- Interface:
- SPI
- Voltage - Supply:
- 3V ~ 28V
- Supplier Device Package:
- 14-HVSON (3x4.5)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
TJA1128ATK/1Z FAQ
1.How can I place an order for TJA1128ATK/1Z through Aetrix?
Please submit a Request for Quotation (RFQ) for TJA1128ATK/1Z on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TJA1128ATK/1Z reliable?
The price and inventory of TJA1128ATK/1Z are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TJA1128ATK/1Z is usually 5 days.
3.What payment methods are accepted for TJA1128ATK/1Z?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TJA1128ATK/1Z transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TJA1128ATK/1Z?
TJA1128ATK/1Z orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TJA1128ATK/1Z order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TJA1128ATK/1Z?
For technical support, including TJA1128ATK/1Z datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TJA1128ATK/1Z requirements.
6.How does Aetrix verify that TJA1128ATK/1Z is sourced from the original manufacturer or authorized distributors?
All TJA1128ATK/1Z products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TJA1128ATK/1Z meets industry standards.
7.What is the process for return or replacement of TJA1128ATK/1Z?
All TJA1128ATK/1Z units undergo pre-shipment inspection (PSI). If there is an issue with TJA1128ATK/1Z, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TJA1128ATK/1Z part is unused and in its original packaging.
Return procedure for TJA1128ATK/1Z:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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