My Inquiry
My Account
NXP Semiconductors TJA1128HTK/1Z
- Part No.:
- TJA1128HTK/1Z
- Manufacturer:
- NXP Semiconductors
- Category:
- Specialized
- Package:
- 14-VDFN Exposed Pad
- Datasheet:
-
TJA1128HTK/1Z.pdf
- Description:
- LIN MINI SYSTEM BASIS CHIP WITH
- Quantity:
- Payment:
- Shipping:
Inventory:6,000
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TJA1128HTK/1Z from NXP Semiconductors is a LIN Mini System Basis Chip (SBC) integrating a LIN transceiver, 3.3 V/85 mA LDO regulator, window watchdog, two level-sensitive WAKE inputs, one GPI, and an open-drain HVMPO output. It operates across 5.0–28 V battery supply with standby current of 22 µA and sleep current of 14 µA, targeting automotive body electronics such as door modules and seat control units.
For engineers reviewing the TJA1128HTK/1Z datasheet, TJA1128HTK/1Z pinout, TJA1128HTK/1Z application, or TJA1128HTK/1Z equivalent, key selection criteria include ISO 17987-4/LIN 2.2A compliance, configurable cyclic wake-up via HVMPO, limp-home activation on overtemperature/VCC undervoltage/RSTN short, and SPI-configurable watchdog period (16–128 ms) and wake sources.
Technical Context
The TJA1128HTK/1Z implements a state-machine-based system controller supporting nine modes-NORMAL, STANDBY, SLEEP, CONFIG, PORT, GOTOSLP, RESET, OVERTEMP, and OFF-with deterministic transitions governed by EN, STBN, RSTN, and internal thresholds. Its LIN transceiver includes integrated termination for responder applications, TXD dominant time-out, and high-speed mode enabling >20 kBd operation.
Watchdog operation uses a microcontroller-independent clock source and supports Window, Timeout, and Autonomous modes; the HVMPO output is programmable via SPI register MPOMOD for bias control in cyclic wake-up, limp-home signaling, or GPI-controlled switching, with configurable settle (70/134 µs) and period (16/64 ms).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| LIN Compliance | ISO 17987-4:2016, LIN 2.0/2.1/2.2/2.2A, SAE J2602-1 - ensures interoperability in automotive LIN networks |
| LDO Output | 3.3 V ±2 %, 85 mA - powers 3.3 V microcontrollers with tight regulation and short-circuit protection |
| Supply Current | 22 µA (STANDBY), 14 µA (SLEEP) - enables ultra-low-power operation for always-on vehicle subsystems |
| Wake Sources | Remote LIN bus wake, local WAKE1/WAKE2 (edge-selectable), with wake-source recognition - supports flexible low-power entry/exit logic |
| Watchdog Period | Selectable 16/32/64/128 ms - provides precise timeout control for firmware safety monitoring |
| Package | HVSON14 (3.0 × 4.5 × 0.85 mm), leadless, AOI-compatible - enables compact, thermally efficient PCB layout |
| AEC-Q100 Grade | Qualified per AEC-Q100 Rev G - certified for automotive under-hood and cabin environments |
Pinout & Package
HVSON14 package (3.0 mm × 4.5 mm × 0.85 mm) with exposed thermal pad soldered to PCB ground for optimal thermal performance and AOI compatibility.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| TXD (SDI) | LIN transmit data / SPI data input | Drives LIN bus during transmission; serves as SPI data-in during CONFIG mode |
| EN (SCK) | Enable / SPI clock input | Controls operating mode entry; clocks SPI configuration data in CONFIG mode |
| RSTN | Bidirectional reset I/O | Active-LOW reset input/output with programmable pulse width (4 ms or 700 µs) |
| RXD (SDO) | LIN receive data / SPI data output | Outputs LIN RX data; returns wake-event flags and status in PORT mode |
| STBN (SCSN) | Standby control / SPI chip select | Active-LOW mode selector; enables SPI communication when pulled LOW in CONFIG mode |
| WWD | Window watchdog trigger | Accepts service pulses to prevent watchdog timeout; required for Window/Timeout modes |
| GPI | General purpose input | Configurable digital input; can drive HVMPO output when MPOMOD = 001 |
| VCC | LDO regulated output | 3.3 V power supply for connected MCU; includes undervoltage detection and reset assertion |
| GND | Ground reference | Primary return path for all analog/digital circuits and thermal pad connection point |
| LIN | LIN bus transceiver I/O | Bidirectional analog interface compliant with ISO 17987-4; short-circuit protected to BAT/GND |
| BAT | Battery supply input | Accepts 5.0–28 V automotive battery rail; load-dump protected up to 43 V |
| WAKE2 | Local wake-up input 2 | Level- or edge-sensitive wake source; configurable via LC2WKE bits in Wake register |
| WAKE1 | Local wake-up input 1 | Level- or edge-sensitive wake source; configurable via LC1WKE bits in Wake register |
| HVMPO | High-voltage multipurpose open-drain output | Programmable output for cyclic wake bias, limp-home signaling, or GPI/state-controlled switching |
Key Features
| Feature | Design Value |
|---|---|
| LIN Transceiver with Integrated Termination | Enables single-chip LIN responder design without external termination resistor |
| Configurable Cyclic Wake-Up via HVMPO | Reduces system power by enabling periodic bus sampling without MCU intervention |
| Limp-Home Function Activation | Asserts HVMPO on overtemperature, VCC undervoltage, watchdog failure, or RSTN short - maintains basic functionality during fault |
| SPI-Based Device Customization | Allows field-programmable configuration of watchdog, wake sources, LIN mode, and HVMPO behavior without hardware change |
| Automotive-Grade Protection | Includes ±8 kV HBM ESD on LIN, ±6 kV IEC 61000-4-2 on BAT/WAKE pins, and ISO 7637 transient immunity |
Applications
| Door Module Control | Seat Position Memory |
|---|---|
Use Scenario: LIN-connected door module managing window lift, mirror fold, and lock actuation in 12 V vehicle architecture. IC Role / Device Role / Timing Role: TJA1128HTK/1Z acts as system basis chip providing regulated 3.3 V power, LIN physical layer, and wake-up management for MCU and peripherals. Use Value: Enables reliable local wake-up via WAKE1/WAKE2 from door handle sensors and remote wake-up via LIN bus commands while maintaining <22 µA standby current. | Use Scenario: Seat control unit storing and recalling position presets using LIN communication with central body controller. IC Role / Device Role / Timing Role: TJA1128HTK/1Z supplies stable 3.3 V power to MCU and motor drivers, handles LIN protocol framing, and triggers limp-home mode if VCC drops during battery recharge. Use Value: Guarantees safe fallback operation (e.g., partial seat movement) during overtemperature or undervoltage events via HVMPO-driven limp-home signaling. |
| Roof Module Interface | Steering Column Switch |
Use Scenario: Sunroof and panoramic roof control node communicating over LIN for open/close, tilt, and pinch detection. IC Role / Device Role / Timing Role: TJA1128HTK/1Z serves as LIN interface and power manager, coordinating MCU wake-up from rain sensor input (WAKE2) and LIN command reception. Use Value: Supports synchronized bias control via HVMPO to enable cyclic wake-up for low-duty-cycle rain sensing without continuous MCU activity. | Use Scenario: LIN-based multifunction switch on steering column controlling wipers, lights, and cruise functions. IC Role / Device Role / Timing Role: TJA1128HTK/1Z delivers regulated 3.3 V power, interfaces LIN bus, and monitors RSTN for short-to-ground faults triggering limp-home. Use Value: Provides fail-safe operation by asserting HVMPO during RSTN short-circuit - allowing continued basic switch functionality despite reset path failure. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LIN SBC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLIN1029DSWR | 3.3 V/60 mA LDO, no HVMPO, fixed 20 kBd LIN, no SPI configuration | Lacks cyclic wake-up, limp-home, and programmable watchdog - suitable only for basic LIN nodes | Select when cost sensitivity outweighs configurability and fault resilience requirements |
| UJA1075ATW/3V3/1J | 5 V/120 mA LDO, legacy LIN 2.1, no HVMPO, larger HVQFN32 package | Higher current but no cyclic wake or limp-home; requires external watchdog and bias circuitry | Choose for legacy designs needing higher LDO current and existing UJA1075 footprint compatibility |
Compared with TLIN1029DSWR and UJA1075ATW/3V3/1J, the TJA1128HTK/1Z uniquely integrates HVMPO-based limp-home and cyclic wake-up, offers SPI-configurable watchdog timing and wake-edge selection, and achieves lowest sleep current (14 µA) in a space-saving HVSON14 package - making it optimal for next-generation low-power automotive LIN nodes requiring functional safety awareness.
Availability
TJA1128HTK/1Z is available at Aetrix Electronics and suitable for automotive door modules, seat control units, roof systems, and steering column switches requiring stable component supply, AEC-Q100 qualification, and long-term production continuity.
Supply support for TJA1128HTK/1Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with leadership in automotive MCUs, radar, and system basis chips.
The TJA1128HTK/1Z belongs to NXP's LIN SBC product line, designed specifically for cost-optimized, ultra-low-power automotive body electronics requiring integrated power, communication, and safety monitoring in minimal footprint.
FAQ
What LIN protocol versions does the TJA1128HTK/1Z support?
The TJA1128HTK/1Z supports LIN 2.0, LIN 2.1, LIN 2.2, and LIN 2.2A, and is fully compliant with ISO 17987-4:2016 (12 V LIN) and SAE J2602-1. This ensures interoperability with legacy and modern LIN networks without protocol translation. The TJA1128HTK/1Z also maintains backward compatibility with earlier LIN physical layers including LIN 1.x variants.
How is the TJA1128HTK/1Z configured for different operating modes?
The TJA1128HTK/1Z uses dedicated input pins EN and STBN to control mode transitions: pulling EN HIGH while STBN is LOW enters NORMAL mode; pulling EN LOW while STBN is LOW enters STANDBY mode; and pulling EN LOW while STBN is HIGH initiates GOTOSLP before automatic transition to SLEEP. Configuration registers are accessed via SPI in CONFIG mode using pins TXD, EN, RXD, and STBN.
What is the function of the HVMPO pin on the TJA1128HTK/1Z?
The HVMPO pin on the TJA1128HTK/1Z is a programmable open-drain output configurable via SPI register MPOMOD for multiple roles: bias control in cyclic wake-up, limp-home signaling during faults (overtemperature/VCC UV/RSTN short), GPI-controlled switching, or state-dependent output. Its settle time (70/134 µs) and period (16/64 ms) are also SPI-adjustable.
Does the TJA1128HTK/1Z include built-in protection features?
Yes, the TJA1128HTK/1Z includes load dump protection up to 43 V on BAT, ±8 kV HBM ESD on LIN, ±6 kV IEC 61000-4-2 ESD on BAT/WAKE pins, ISO 7637 transient immunity, LIN-bus short-circuit protection to BAT/GND, and overtemperature shutdown. These protections meet automotive environmental stress requirements without external components.
What is the difference between STANDBY and SLEEP modes in the TJA1128HTK/1Z?
In STANDBY mode, the TJA1128HTK/1Z keeps the 3.3 V LDO enabled (22 µA typical current) and supports wake-up via LIN, WAKE1, or WAKE2; in SLEEP mode, the LDO, LIN transceiver, and watchdog are disabled for minimum power (14 µA typical), with wake-up still possible but RSTN forced LOW. SLEEP is entered automatically after GOTOSLP timeout when EN is LOW.
TJA1128HTK/1Z Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 14-VDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- System Basis Chip
- Interface:
- SPI
- Voltage - Supply:
- 3V ~ 28V
- Supplier Device Package:
- 14-HVSON (3x4.5)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
TJA1128HTK/1Z FAQ
1.How can I place an order for TJA1128HTK/1Z through Aetrix?
Please submit a Request for Quotation (RFQ) for TJA1128HTK/1Z on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TJA1128HTK/1Z reliable?
The price and inventory of TJA1128HTK/1Z are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TJA1128HTK/1Z is usually 5 days.
3.What payment methods are accepted for TJA1128HTK/1Z?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TJA1128HTK/1Z transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TJA1128HTK/1Z?
TJA1128HTK/1Z orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TJA1128HTK/1Z order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TJA1128HTK/1Z?
For technical support, including TJA1128HTK/1Z datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TJA1128HTK/1Z requirements.
6.How does Aetrix verify that TJA1128HTK/1Z is sourced from the original manufacturer or authorized distributors?
All TJA1128HTK/1Z products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TJA1128HTK/1Z meets industry standards.
7.What is the process for return or replacement of TJA1128HTK/1Z?
All TJA1128HTK/1Z units undergo pre-shipment inspection (PSI). If there is an issue with TJA1128HTK/1Z, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TJA1128HTK/1Z part is unused and in its original packaging.
Return procedure for TJA1128HTK/1Z:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TJA1128HTK/1Z Tags
-
NVT4857UKAZ
NXP Semiconductors
-
TCA8418RTWR
Texas Instruments
-
PCA9546APWR
Texas Instruments
-
MD0100N8-G
Microchip Technology
-
PCA9548APW,118
NXP Semiconductors
-
PCA9540BDP,118
NXP Semiconductors
-
PCA9548APWR
Texas Instruments
-
PCA9546APW,118
NXP Semiconductors
-
PTN3360DBS,518
NXP Semiconductors
-
PCA9546ABS,118
NXP Semiconductors
-
PCA9518PWR
Texas Instruments
-
PCA9545APW,118
NXP Semiconductors
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
