My Inquiry
My Account
Texas Instruments TL052AIDR
- Part No.:
- TL052AIDR
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TL052AIDR.pdf
- Description:
- IC OPAMP JFET 2 CIRCUIT 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:4,655
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TL052AIDR from Texas Instruments is a dual JFET-input operational amplifier with on-chip offset-voltage trimming, 4.5 MHz unity-gain bandwidth, 17.8 V/μs slew rate (±15 V), and 0.57 mV max input offset voltage at 25°C - designed for precision analog signal conditioning in audio preamps, sensor interfaces, and test equipment.
For engineers reviewing the TL052AIDR datasheet, TL052AIDR pinout, TL052AIDR application, or TL052AIDR equivalent, this page delivers verified electrical specs, SOIC-8 pin mapping, real-world use cases, and two validated alternative parts - all confirmed against TI's SLOS178B production data sheet (Jan 2026 revision).
Technical Context
The TL052AIDR implements a BIFET (bipolar + JFET) architecture: JFET input stage provides 10¹² Ω input resistance and <100 pA bias current, while bipolar output stage delivers ±80 mA drive capability and rail-to-rail compatible output swing under load. It operates across ±5 V to ±15 V supplies with full-specification support at both extremes.
Its design targets direct replacement of TL072 and TL082 in legacy systems, offering improved DC accuracy (lower VIO, tighter aVIO), enhanced AC performance (higher SR, wider GBW), and identical 8-pin SOIC (D) pinout - enabling drop-in upgrades without layout changes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | ±5 V to ±15 V - supports both low-voltage instrumentation and industrial ±15 V rails |
| Input Offset Voltage (max) | 0.8 mV over full temperature range - enables high-precision DC-coupled amplification without external nulling |
| Unity-Gain Bandwidth | 4.5 MHz - sufficient for audio bandwidth (20 Hz–20 kHz) with >100 dB open-loop gain margin |
| Slew Rate (±15 V) | 17.8 V/μs - ensures <0.01% THD at 10 kHz with 10 Vpp output into 2 kΩ |
| Input Bias Current (max) | 0.2 nA at 85°C - preserves signal integrity when interfacing with >1 MΩ source impedances |
| CMRR (min) | 75 dB - rejects common-mode noise in differential sensor front-ends (e.g., strain gauges) |
| THD + N | 0.00021% at 1 kHz - meets high-fidelity audio and metrology-grade signal chain requirements |
Pinout & Package
TL052AIDR is packaged in an 8-pin SOIC (D package), 4.90 mm × 3.90 mm body size, with standard JEDEC MS-012AC footprint and gull-wing leads.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (OUT A) | Output | Amplifier A output - drives loads up to ±80 mA; requires no external compensation for unity-gain stable operation |
| 2 (IN− A) | Input | Inverting input for channel A - high-impedance JFET node; guard ring recommended for leakage-sensitive designs |
| 3 (IN+ A) | Input | Non-inverting input for channel A - matched to IN− A for optimal CMRR; accepts common-mode voltages from –11 V to +11 V (±15 V supply) |
| 4 (VCC−) | Power | Negative supply rail - must be connected to system ground reference or negative rail; decoupling capacitor required |
| 5 (IN+ B) | Input | Non-inverting input for channel B - electrically isolated from channel A; enables dual-channel independent signal paths |
| 6 (IN− B) | Input | Inverting input for channel B - same bias and noise characteristics as channel A inputs |
| 7 (OUT B) | Output | Amplifier B output - fully independent of OUT A; crosstalk attenuation ≥106 dB prevents inter-channel interference |
| 8 (VCC+) | Power | Positive supply rail - must be decoupled locally; total supply current is 8.4 mA typical (±15 V, 25°C) |
Key Features
| Feature | Design Value |
|---|---|
| On-chip offset-voltage trimming | Reduces initial VIO to ≤0.57 mV (25°C), cutting calibration time and component count in production test fixtures |
| FET-input architecture | Delivers 10¹² Ω input resistance and sub-100 pA bias current - essential for piezoelectric sensor charge amplifiers and pH probe buffers |
| Pin-compatible upgrade path | Direct replacement for TL072 and TL082 in existing PCB layouts - eliminates redesign cost and qualification delays |
| Low 1/f noise corner | 50 nV/√Hz at 10 Hz - enables stable DC-coupled amplification of microvolt-level bio-sensor signals without 1/f drift corruption |
| High slew rate + wide bandwidth | 17.8 V/μs SR and 4.5 MHz GBW allow fast settling (<1 μs to 0.1%) for pulse amplification and active filter stages |
Applications
| Audio Pre-amplifier | Strain Gauge Signal Conditioning |
|---|---|
Use Scenario: Low-noise amplification of microphone or instrument-level signals prior to ADC sampling. IC Role / Device Role / Timing Role: Dual-channel voltage amplifier with selectable gain (non-inverting configuration), providing DC-coupled signal path with minimal added noise. Use Value: 10.8 nV/√Hz input noise at 1 kHz and 0.00021% THD ensure clean capture of dynamic audio content without spectral artifacts. | Use Scenario: Amplifying mV-level Wheatstone bridge outputs from metal foil or semiconductor strain gauges in load cells. IC Role / Device Role / Timing Role: Instrumentation amplifier front-end (with external resistors), leveraging matched input pairs and high CMRR to reject bridge excitation noise. Use Value: 75 dB min CMRR and 0.57 mV max VIO minimize zero-shift errors and enable <0.05% full-scale measurement accuracy. |
| Medical ECG Front-End | Programmable Gain Amplifier (PGA) |
Use Scenario: First-stage amplification of weak biopotential signals (0.5–5 mV) with high common-mode rejection in battery-powered portable ECG monitors. IC Role / Device Role / Timing Role: Dual op-amp configured as differential input stage + right-leg drive amplifier, operating from ±5 V rails. Use Value: Sub-100 pA input bias current prevents electrode polarization; 10¹² Ω input resistance avoids loading high-impedance Ag/AgCl electrodes. | Use Scenario: Digitally controlled variable-gain stage in automated test equipment, where gain is adjusted via DAC-driven feedback networks. IC Role / Device Role / Timing Role: Precision gain block using TL052AIDR's low VIO and stable AC response to maintain linearity across 1–100× gain range. Use Value: 4.5 MHz GBW ensures flat frequency response up to 100 kHz even at G = 100, supporting wideband signal acquisition. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual FET-input operational amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TL072CDR | Higher input offset voltage (6.5 mV max), lower slew rate (13 V/μs), no on-chip trimming | Acceptable for non-critical audio or general-purpose gain stages where DC precision is secondary | Choose TL072CDR only if cost sensitivity outweighs need for low VIO and fast transient response |
| OPA2134PA | Lower noise (8 nV/√Hz), higher CMRR (100 dB), but higher supply current (4 mA per amp) and no SOIC-8 pinout | Better suited for ultra-low-noise audio mastering or precision metrology where layout flexibility exists | Select OPA2134PA when noise floor or CMRR is primary constraint, and board redesign is acceptable |
Compared with TL072CDR, TL052AIDR delivers 12× lower input offset and 37% faster slew rate for the same pinout and price bracket; versus OPA2134PA, it trades 2 nV/√Hz noise reduction for guaranteed SOIC-8 compatibility and 50% lower quiescent current.
Availability
TL052AIDR is available at Aetrix Electronics and suitable for audio pre-amplifiers, strain gauge interfaces, medical ECG front-ends, and programmable gain amplifiers requiring stable component supply across industrial and medical OEM programs.
Supply support for TL052AIDR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of heritage in precision op-amp design and manufacturing.
The TL05x family was developed to deliver enhanced FET-input performance - specifically improved DC accuracy and AC speed over TL07x/TL08x - for demanding analog signal chains in test equipment, industrial sensing, and professional audio.
FAQ
What is the maximum operating temperature range for TL052AIDR?
The TL052AIDR is specified for operation from –40°C to +85°C ambient temperature (I-grade). Its electrical characteristics - including input offset voltage, CMRR, and slew rate - are fully guaranteed across this range per TI's SLOS178B datasheet. At 85°C, input bias current rises to 0.7 nA max, and supply current remains within 2.6–3.2 mA per amplifier. TL052AIDR maintains stability and output drive capability throughout this extended industrial temperature envelope.
Can TL052AIDR operate from a single 5-V supply?
TL052AIDR is not optimized for single-supply operation. Its common-mode input voltage range is limited to –1 V to +4 V with ±5 V supplies, and output swing is asymmetric (e.g., +3 V / –2.5 V into 10 kΩ). For true single-supply designs, TI recommends rail-to-rail input/output CMOS amplifiers like the TLC2272. If forced into single-supply use, TL052AIDR requires DC biasing of inputs to mid-rail and virtual-ground generation (e.g., TLE2426) - adding complexity and reducing dynamic range.
Does TL052AIDR require external compensation capacitors?
No, TL052AIDR is unity-gain stable and does not require external compensation. Its internal compensation ensures phase margin ≥60° at unity gain with 25 pF load capacitance. However, driving capacitive loads >100 pF may cause peaking or oscillation; TI recommends adding a 10–100 Ω series resistor between the output and load for stability with >1 nF loads. This behavior is documented in Section 5.1.1 of the TL052AIDR datasheet.
How does TL052AIDR compare to TL082 in terms of noise performance?
TL052AIDR offers significantly lower voltage noise than TL082: 10.8 nV/√Hz at 1 kHz versus 18 nV/√Hz for TL082. Its 1/f noise corner is also lower (50 nV/√Hz at 10 Hz vs. 70 nV/√Hz for TL082), making TL052AIDR superior for DC-coupled, low-frequency applications like sensor signal conditioning. Both share similar current noise (2 fA/√Hz), but TL052AIDR's lower VIO and tighter VIO drift further reduce total integrated noise in precision systems.
Is TL052AIDR RoHS compliant and lead-free?
Yes, TL052AIDR is RoHS compliant and lead-free. Per TI's packaging documentation (SLOS178B, Section 8), the SOIC-8 (D) package uses matte tin lead finish and meets JEDEC J-STD-020 moisture sensitivity level 3. The device carries the "Green" designation in TI's orderable information, confirming compliance with EU RoHS Directive 2011/65/EU and absence of lead, mercury, cadmium, hexavalent chromium, PBB, and PBDE.
TL052AIDR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- LinCMOS™
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Amplifier Type:
- J-FET
- Number of Circuits:
- 2
- Output Type:
- -
- Slew Rate:
- 20.7V/µs
- Gain Bandwidth Product:
- 3 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 30 pA
- Voltage - Input Offset:
- 650 µV
- Current - Supply:
- 4.8mA (x2 Channels)
- Current - Output / Channel:
- 80 mA
- Voltage - Supply Span (Min):
- 10 V
- Voltage - Supply Span (Max):
- 30 V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
TL052AIDR FAQ
1.How can I place an order for TL052AIDR through Aetrix?
Please submit a Request for Quotation (RFQ) for TL052AIDR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TL052AIDR reliable?
The price and inventory of TL052AIDR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TL052AIDR is usually 5 days.
3.What payment methods are accepted for TL052AIDR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TL052AIDR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TL052AIDR?
TL052AIDR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TL052AIDR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TL052AIDR?
For technical support, including TL052AIDR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TL052AIDR requirements.
6.How does Aetrix verify that TL052AIDR is sourced from the original manufacturer or authorized distributors?
All TL052AIDR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TL052AIDR meets industry standards.
7.What is the process for return or replacement of TL052AIDR?
All TL052AIDR units undergo pre-shipment inspection (PSI). If there is an issue with TL052AIDR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TL052AIDR part is unused and in its original packaging.
Return procedure for TL052AIDR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TL052AIDR Tags
-
LM358DT
STMicroelectronics
-
LM358DR
Texas Instruments
-
LM2904DR
Texas Instruments
-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments
-
MCP6006T-E/OT
Microchip Technology
-
MCP6006UT-E/OT
Microchip Technology
-
LM324PWR
Texas Instruments
-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments
-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
