Texas Instruments TL052AIDRG4
- Part No.:
- TL052AIDRG4
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TL052AIDRG4.pdf
- Description:
- IC OPAMP JFET 2 CIRCUIT 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,980
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TL052AIDRG4 from Texas Instruments is a dual enhanced JFET-input operational amplifier with on-chip offset-voltage trimming, 4.5 MHz unity-gain bandwidth, 17.8 V/μs slew rate (±15 V), and 0.57 mV max input offset voltage at 25°C. It operates from ±5 V to ±15 V supplies and targets precision analog signal conditioning in audio preamps, sensor interfaces, and instrumentation circuits.
For engineers reviewing the TL052AIDRG4 datasheet, TL052AIDRG4 pinout, TL052AIDRG4 application, or TL052AIDRG4 equivalent, this page delivers verified specifications, SOIC-8 package layout, real-world use cases, and validated alternative options - all grounded in TI's SLOS178B production data sheet (Jan 2026 revision).
Technical Context
The TL052AIDRG4 implements a dual-channel FET-input architecture with independent high-impedance inputs (10¹² Ω), low input bias current (≤30 pA at 25°C), and rail-to-rail output swing limited by supply headroom (e.g., ±13.9 V at ±15 V with 10 kΩ load). Its internal offset trimming enables stable DC performance across temperature.
It maintains pin compatibility with TL072 and TL082 but improves slew rate (+25% vs TL082), reduces input offset voltage (−40% vs TL082A), and retains low 10.8 nV/√Hz input voltage noise at 1 kHz - making it suitable for medium-speed, low-noise, high-Z signal chains where bipolar op-amps introduce excessive input current error.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | ±5 V to ±15 V - supports industrial dual-supply systems without level-shifting circuitry |
| Input Offset Voltage (max) | 0.8 mV at 25°C (TL052AC grade) - enables <1 LSB error in 12-bit ADC front-ends with gain ≤10 |
| Unity-Gain Bandwidth | 4.5 MHz - sufficient for audio band amplification (20 Hz–20 kHz) with >60° phase margin |
| Slew Rate (±15 V) | 17.8 V/μs - supports 10 Vpp signals up to ~280 kHz without slew-induced distortion |
| Input Bias Current (max) | 0.2 nA at 70°C - preserves accuracy with >1 MΩ source impedances (e.g., piezoelectric sensors) |
| CMRR (min) | 75 dB at 25°C - rejects common-mode interference in differential sensor bridges |
| THD + N | 0.00021% at 1 kHz - meets high-fidelity audio signal path requirements |
Pinout & Package
TL052AIDRG4 is housed in an 8-pin SOIC (D package), 4.90 mm × 3.90 mm body size, with exposed pad not present and moisture sensitivity level (MSL) 1 per JEDEC J-STD-020.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Output Channel 1 | Low-impedance buffered output; drives loads ≥2 kΩ without stability issues |
| 2 | Inverting Input, Ch. 1 | High-Z node (10¹² Ω); requires guard ring routing to minimize PCB leakage error |
| 3 | Non-inverting Input, Ch. 1 | High-Z node; matched to Pin 2 for optimal CMRR in differential configurations |
| 4 | Power Supply Negative | Return path for both channels; must be low-inductance connection to avoid crosstalk |
| 5 | Non-inverting Input, Ch. 2 | Independent high-Z input; electrically isolated from Ch. 1 except via shared VCC– |
| 6 | Inverting Input, Ch. 2 | Matched pair with Pin 5; enables dual-channel instrumentation or active filtering |
| 7 | Output Channel 2 | Independent output; crosstalk attenuation ≥106 dB prevents inter-channel signal coupling |
| 8 | Power Supply Positive | Supply rail for both amplifiers; decoupling capacitor (0.1 μF) required within 5 mm |
Key Features
| Feature | Design Value |
|---|---|
| On-chip offset-voltage trimming | Reduces initial VIO to ≤0.57 mV (25°C), cutting calibration time in production test fixtures |
| FET-input architecture | 10¹² Ω input resistance enables direct interfacing with pH electrodes and photodiode transimpedance stages |
| Enhanced slew rate vs TL082 | 17.8 V/μs (±15 V) supports faster settling in active filters and anti-aliasing stages than TL082's 13 V/μs |
| Low 1/f noise corner | 50 nV/√Hz at 10 Hz allows stable DC-coupled amplification of microvolt-level bio-sensor outputs |
| Pin-compatible upgrade path | Direct replacement for TL072/TL082 in existing SOIC-8 layouts - no PCB rework required |
Applications
| Audio Pre-amplifier | Strain Gauge Signal Conditioning |
|---|---|
|
Use Scenario: Amplifying low-level microphone or line-level signals before ADC sampling in studio-grade audio equipment. IC Role / Device Role / Timing Role: Dual-channel voltage amplifier providing gain, DC blocking, and low-noise buffering. Use Value: 10.8 nV/√Hz input noise and 0.00021% THD ensure clean signal integrity up to 20 kHz without audible artifacts. |
Use Scenario: Conditioning mV-level Wheatstone bridge outputs from metal foil strain gauges in load cells. IC Role / Device Role / Timing Role: Instrumentation-grade dual op-amp configured as difference amplifier with adjustable gain. Use Value: 0.57 mV max VIO and 75 dB min CMRR minimize zero-shift and common-mode interference under mechanical stress. |
| Photodiode Transimpedance Stage | Programmable Gain Instrumentation Amplifier |
|
Use Scenario: Converting nanoampere photocurrents from precision optical sensors into measurable voltage signals. IC Role / Device Role / Timing Role: Single-channel transimpedance amplifier (TIA) with feedback resistor and capacitor compensation. Use Value: ≤30 pA input bias current prevents significant error in high-Rf (>100 MΩ) TIA designs used in spectrophotometry. |
Use Scenario: Building a 3-op-amp instrumentation amplifier with user-adjustable gain (2–100×) for medical ECG front-ends. IC Role / Device Role / Timing Role: Dual op-amp implementing gain-setting stage and offset-null circuit (U2B in TI Figure 5-4). Use Value: Matched VIO drift (23 μV/°C) and low long-term drift (0.04 μV/month) maintain calibration stability over device lifetime. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual FET-input operational amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TL072CDR | Higher 3 mV max VIO, lower 13 V/μs slew rate, 16 V/μs typical noise (10 Hz) | Acceptable for cost-sensitive audio where <0.5 mV VIO not required | Choose TL072CDR only if offset and speed margins allow relaxed spec compliance |
| OPA2134PA | Lower 0.5 mV max VIO, higher 20 V/μs slew rate, 8 nV/√Hz noise, ±18 V rating | Preferred for high-end audio or wide-supply industrial systems needing extended dynamic range | OPA2134PA offers superior specs but requires validation of SOIC-8 thermal derating at full load |
Compared with TL052AIDRG4, TL072CDR trades precision and speed for lower cost, while OPA2134PA delivers higher performance at increased price and power - making TL052AIDRG4 the optimal balance for mid-tier instrumentation requiring verified offset stability and SOIC-8 footprint compatibility.
Availability
TL052AIDRG4 is available at Aetrix Electronics and suitable for audio pre-amplifiers, strain gauge interfaces, photodiode transimpedance stages, and programmable gain instrumentation amplifiers requiring stable component supply across production lifecycles.
Supply support for TL052AIDRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with over 90 years of innovation in precision analog ICs.
The TL05x family was designed to deliver enhanced FET-input op-amp performance - specifically improved DC accuracy, AC response, and noise - over legacy TL07x/TL08x series for industrial and instrumentation signal chains.
FAQ
What is the maximum operating temperature range for TL052AIDRG4?
The TL052AIDRG4 is specified for operation from 0°C to 70°C (commercial grade, C-suffix). It is not rated for extended industrial temperature ranges (–40°C to 85°C); for that, the TL052AI variant must be selected. Thermal derating begins above 70°C, and junction temperature must remain below 150°C under all conditions per absolute maximum ratings.
Does TL052AIDRG4 support single-supply operation?
TL052AIDRG4 is designed for dual-supply operation (±5 V to ±15 V) and does not feature rail-to-rail input or output. When used with single supplies, external DC biasing of inputs and virtual-ground generation (e.g., using TI's TLE2426) is mandatory to stay within common-mode input voltage limits (e.g., –1 V to +4 V at ±5 V supply) and avoid clipping.
What is the input capacitance of TL052AIDRG4 and how does it affect high-frequency stability?
TL052AIDRG4 has a typical input capacitance of 10 pF per input terminal. This value interacts with source impedance to form unintended poles; for example, with a 100 kΩ source, a pole appears at ~160 kHz. Layout best practices - including short traces, guard rings, and avoiding floating nodes - are essential to prevent oscillation in high-Z sensor interfaces.
Can TL052AIDRG4 drive capacitive loads directly?
TL052AIDRG4 can drive ≤100 pF loads stably without external compensation. For larger capacitive loads (e.g., 1000 pF), a series isolation resistor (typically 20–100 Ω) between the output and load is required to maintain ≥60° phase margin and prevent peaking or oscillation, as confirmed in TI's Figure 5-2 test circuit and SLOS178B Section 5.1.1.
How does the crosstalk attenuation of TL052AIDRG4 impact dual-channel designs?
TL052AIDRG4 provides ≥106 dB crosstalk attenuation between channels, meaning a 1 V signal on Channel 1 induces less than 0.5 μV of coupled signal on Channel 2. This enables independent simultaneous use - such as stereo audio paths or dual-sensor readouts - without measurable inter-channel interference in PCB layouts with proper grounding and supply decoupling.
TL052AIDRG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- LinCMOS™
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Amplifier Type:
- J-FET
- Number of Circuits:
- 2
- Output Type:
- -
- Slew Rate:
- 20.7V/µs
- Gain Bandwidth Product:
- 3 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 30 pA
- Voltage - Input Offset:
- 650 µV
- Current - Supply:
- 4.8mA (x2 Channels)
- Current - Output / Channel:
- 80 mA
- Voltage - Supply Span (Min):
- 10 V
- Voltage - Supply Span (Max):
- 30 V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
TL052AIDRG4 FAQ
1.How can I place an order for TL052AIDRG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for TL052AIDRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TL052AIDRG4 reliable?
The price and inventory of TL052AIDRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TL052AIDRG4 is usually 5 days.
3.What payment methods are accepted for TL052AIDRG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TL052AIDRG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TL052AIDRG4?
TL052AIDRG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TL052AIDRG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TL052AIDRG4?
For technical support, including TL052AIDRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TL052AIDRG4 requirements.
6.How does Aetrix verify that TL052AIDRG4 is sourced from the original manufacturer or authorized distributors?
All TL052AIDRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TL052AIDRG4 meets industry standards.
7.What is the process for return or replacement of TL052AIDRG4?
All TL052AIDRG4 units undergo pre-shipment inspection (PSI). If there is an issue with TL052AIDRG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TL052AIDRG4 part is unused and in its original packaging.
Return procedure for TL052AIDRG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TL052AIDRG4 Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
