Texas Instruments TL062CDRG4
- Part No.:
- TL062CDRG4
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TL062CDRG4.pdf
- Description:
- IC OPAMP JFET 2 CIRCUIT 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:3,151
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TL062CDRG4 from Texas Instruments is a dual JFET-input operational amplifier optimized for low-power, high-input-impedance analog signal conditioning in cost-sensitive industrial and consumer systems. It delivers 200 µA per amplifier supply current, 3.5 V/µs slew rate, ±11 V common-mode input range (including VCC+), and 1 MHz unity-gain bandwidth - enabling precision DC-coupled amplification and filtering in battery-powered or thermally constrained designs such as sensor front-ends and audio preamps.
For engineers reviewing the TL062CDRG4 datasheet, TL062CDRG4 pinout, TL062CDRG4 application, or TL062CDRG4 equivalent, this page provides verified electrical parameters, SOIC-8 package mapping, dual-amplifier functional context, thermal derating guidance, and real-world substitution options aligned with TI's SLOS078N revision August 2023 production data.
Technical Context
The TL062CDRG4 implements a JFET-input differential pair with internal frequency compensation, delivering rail-to-rail common-mode input capability (VCM = VCC– + 4 V to VCC+ – 4 V) and output short-circuit protection. Its high input impedance (>1012 Ω) and ultra-low input bias current (30 pA typ. at 25°C) minimize loading on high-impedance sources like piezoelectric sensors or photodiode transimpedance nodes.
Designed as a lower-power counterpart to the TL072 and TL082 families, it maintains comparable AC performance (1 MHz GBW, 3.5 V/µs slew rate) while reducing quiescent current by ~50%. It operates across 0°C to 70°C (Commercial grade) with ±5 V to ±15 V dual-supply support and integrated EMI/RF filtering for noise-resilient operation in mixed-signal environments.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Current | 200 µA per amplifier - enables multi-channel analog signal chains in power-constrained systems without thermal throttling. |
| Input Bias Current | 30 pA typical at 25°C - preserves accuracy in high-Z sensor interfaces and long-time-constant integrators. |
| Slew Rate | 3.5 V/µs typical - supports clean amplification of audio-band signals (≤20 kHz) and moderate-speed control loops. |
| Unity-Gain Bandwidth | 1 MHz - defines stable closed-loop gain-bandwidth tradeoff for filters, buffers, and active RC networks. |
| Common-Mode Input Range | VCC– + 4 V to VCC+ – 4 V - allows direct sensing of signals referenced to positive rail (e.g., single-supply derived references). |
| Input Offset Voltage | 3 mV max at 25°C - sets baseline DC error floor for precision DC amplification without trimming. |
| ESD Rating (HBM) | 2000 V - meets IEC 61000-4-2 Level 2 for robustness during board handling and system integration. |
Pinout & Package
TL062CDRG4 is supplied in an 8-pin SOIC (D) package measuring 4.90 mm × 6.00 mm, compatible with standard surface-mount reflow profiles and IPC-7351B land patterns.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | OUT A | Amplifier A output - drives loads ≥10 kΩ; short-circuit protected up to indefinite duration. |
| 2 | IN– A | Inverting input of Amplifier A - high-impedance JFET node; sensitive to PCB leakage and guarding. |
| 3 | IN+ A | Non-inverting input of Amplifier A - accepts common-mode voltages up to VCC+ – 4 V. |
| 4 | VCC– | Negative supply rail - must be decoupled locally with ≥0.1 µF ceramic capacitor. |
| 5 | IN+ B | Non-inverting input of Amplifier B - electrically isolated from Amplifier A; crosstalk attenuation >120 dB. |
| 6 | IN– B | Inverting input of Amplifier B - shares same JFET process characteristics as Pin 2 but independent layout routing required. |
| 7 | OUT B | Amplifier B output - independently buffered; no shared output stage with Amplifier A. |
| 8 | VCC+ | Positive supply rail - supplies both amplifiers; requires local 0.1 µF ceramic + optional 10 µF bulk capacitance. |
Key Features
| Feature | Design Value |
|---|---|
| JFET-input stage | Input resistance >1012 Ω and bias current ≤200 pA enable direct connection to megohm-level sources without signal degradation. |
| Internal frequency compensation | Guarantees unity-gain stability without external components - simplifies design of buffers, followers, and first-order filters. |
| Output short-circuit protection | Allows safe operation into grounded or rail-connected loads indefinitely - eliminates need for series current-limiting resistors. |
| Latch-up-free process | Prevents destructive parasitic conduction under overvoltage or ESD stress - ensures reliability in unregulated or noisy supply environments. |
| Integrated EMI/RF filters | Suppresses high-frequency interference (e.g., GSM bursts, switch-mode noise) before it reaches the input stage - improves SNR in noisy PCB layouts. |
Applications
| Instrumentation Signal Conditioning | Audio Pre-amplification |
|---|---|
|
Use Scenario: Amplifying low-level outputs from strain gauges, thermocouples, or pH electrodes in portable test equipment. IC Role / Device Role / Timing Role: Dual-channel DC-coupled instrumentation amplifier front-end with matched gain paths and low drift. Use Value: 30 pA input bias current prevents offset errors in high-impedance bridge configurations; 3 mV max VIO limits initial calibration burden. |
Use Scenario: Low-noise microphone preamp or line-level buffer in battery-powered speakers and voice recorders. IC Role / Device Role / Timing Role: Dual op-amp configured as non-inverting gain stage and active filter section. Use Value: 30 nV/√Hz input voltage noise at 1 kHz preserves dynamic range; 200 µA per channel extends battery life vs bipolar alternatives. |
| Industrial Sensor Interface | White Goods Motor Control Feedback |
|
Use Scenario: Converting 4–20 mA current loop signals to voltage in PLC analog input modules. IC Role / Device Role / Timing Role: Precision current-to-voltage converter with rail-compatible input and buffered output. Use Value: Common-mode input range extending to VCC+ – 4 V allows direct sensing of loop voltage without level-shifting; 120 dB crosstalk isolates dual-channel measurements. |
Use Scenario: Amplifying hall-effect or encoder signals in washing machine drum motor controllers. IC Role / Device Role / Timing Role: Dual comparator-like signal conditioner for position/speed feedback with hysteresis and filtering. Use Value: High ESD rating (2 kV HBM) withstands field-repair electrostatic events; wide temperature range (0°C to 70°C) covers appliance ambient conditions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual JFET-input op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TL072CDR | Higher supply current (2.8 mA vs 0.2 mA), 13 V/µs slew rate, tighter VIO (10 mV max), identical SOIC-8 pinout. | Better AC performance but 14× higher power draw - suitable where speed outweighs battery life or thermal budget. | Select TL072CDR when bandwidth >3 MHz or slew rate >10 V/µs is required; avoid in energy-harvesting or sealed enclosures. |
| RC4558DR | Bipolar input (200 nA IIB), 3 V/µs slew rate, 3 MHz GBW, 16 V max supply, SOIC-8 compatible footprint. | Lower cost and wider supply range, but higher input current degrades high-Z source accuracy and increases thermal drift. | Choose RC4558DR for general-purpose AC coupling or low-precision DC apps; not recommended for sensor front-ends or precision integrators. |
Compared with TL072CDR and RC4558DR, TL062CDRG4 uniquely balances ultra-low power (200 µA), JFET input integrity (30 pA IIB), and adequate bandwidth (1 MHz) - making it the optimal choice for always-on sensor nodes, portable instrumentation, and thermally limited industrial controls where power and input fidelity are prioritized over raw speed.
Availability
TL062CDRG4 is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable instrumentation, audio preamplification, and white goods motor control requiring stable component supply across commercial temperature grades.
Supply support for TL062CDRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of heritage in precision op-amp design and high-volume manufacturing reliability.
The TL06x family was engineered to deliver JFET-input performance at bipolar-op-amp price points - targeting cost-sensitive industrial, consumer, and computing applications where low power, high Zin, and robust ESD tolerance are essential.
FAQ
What is the maximum operating supply voltage for TL062CDRG4?
The absolute maximum supply voltage for TL062CDRG4 is ±18 V (36 V total). However, the recommended operating range is ±5 V to ±15 V per the datasheet. Operating beyond ±15 V risks exceeding junction temperature limits and may degrade long-term reliability - especially in SOIC-8 packages with RθJA = 97°C/W. Always verify thermal margin using PD = (TJ(max) – TA) / RθJA for your layout and ambient conditions.
Does TL062CDRG4 support single-supply operation?
TL062CDRG4 is specified for dual-supply operation (±VCC), but can be used in single-supply configurations with proper biasing. Its common-mode input range extends to VCC– + 4 V, so with VCC– = 0 V and VCC+ = +15 V, inputs can swing from +4 V to +11 V. Output swing is limited to ±10 V under load - meaning a mid-rail reference (e.g., +7.5 V) and AC-coupled inputs are typically required for full-range signal handling in single-supply TL062CDRG4 designs.
What is the input offset voltage specification for TL062CDRG4 at full temperature range?
For TL062CDRG4 (Commercial grade, 0°C to 70°C), the input offset voltage is guaranteed to be ≤20 mV across the full temperature range. At 25°C, it is tighter: ≤3 mV typical and ≤15 mV maximum. The temperature coefficient is ≤10 µV/°C, meaning worst-case drift adds ≤700 µV over the 70°C span - critical for DC-critical applications like precision current sensing or integrator circuits where long-term drift dominates error budgets.
How does TL062CDRG4 compare to TL062CP in terms of performance and packaging?
TL062CDRG4 and TL062CP share identical electrical specifications and temperature grading (Commercial, 0°C to 70°C), but differ in packaging and compliance. TL062CDRG4 is a green, RoHS-compliant, lead-free SOIC-8 device with tape-and-reel packaging (G4 suffix); TL062CP is a legacy PDIP-8 package with leaded finish. Both meet the same SLOS078N spec sheet, but TL062CDRG4 supports modern SMT assembly and environmental requirements, while TL062CP suits through-hole prototyping or legacy repair.
Is TL062CDRG4 suitable for driving capacitive loads?
TL062CDRG4 is not unity-gain stable into purely capacitive loads >100 pF without isolation resistance. Driving cables or ADC input capacitance directly may cause peaking or oscillation. For loads >100 pF, add a 100 Ω to 500 Ω series resistor between TL062CDRG4 output and the capacitance - this isolates the pole and restores phase margin. This technique is validated in TI's SLOS078N Figure 7-1 and maintains stability while preserving bandwidth for most sensor interface use cases.
TL062CDRG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Amplifier Type:
- J-FET
- Number of Circuits:
- 2
- Output Type:
- -
- Slew Rate:
- 3.5V/µs
- Gain Bandwidth Product:
- 1 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 30 pA
- Voltage - Input Offset:
- 3 mV
- Current - Supply:
- 200µA (x2 Channels)
- Current - Output / Channel:
- 20 mA
- Voltage - Supply Span (Min):
- 10 V
- Voltage - Supply Span (Max):
- 30 V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
TL062CDRG4 FAQ
1.How can I place an order for TL062CDRG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for TL062CDRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TL062CDRG4 reliable?
The price and inventory of TL062CDRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TL062CDRG4 is usually 5 days.
3.What payment methods are accepted for TL062CDRG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TL062CDRG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TL062CDRG4?
TL062CDRG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TL062CDRG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TL062CDRG4?
For technical support, including TL062CDRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TL062CDRG4 requirements.
6.How does Aetrix verify that TL062CDRG4 is sourced from the original manufacturer or authorized distributors?
All TL062CDRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TL062CDRG4 meets industry standards.
7.What is the process for return or replacement of TL062CDRG4?
All TL062CDRG4 units undergo pre-shipment inspection (PSI). If there is an issue with TL062CDRG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TL062CDRG4 part is unused and in its original packaging.
Return procedure for TL062CDRG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TL062CDRG4 Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
