Texas Instruments TL072CPSRG4
- Part No.:
- TL072CPSRG4
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-SOIC (0.209", 5.30mm Width)
- Datasheet:
-
TL072CPSRG4.pdf
- Description:
- IC OPAMP JFET 2 CIRCUIT 8SO
- Quantity:
- Payment:

- Shipping:

Inventory:1,457
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TL072CPSRG4 from Texas Instruments is a dual JFET-input operational amplifier optimized for low-noise audio and precision signal conditioning. It delivers 37 nV/√Hz input voltage noise at 1 kHz, 20 V/μs slew rate, ±15 V supply operation, and common-mode input range extending to VCC+, making it suitable for pro-audio mixers and battery test equipment.
For engineers reviewing the TL072CPSRG4 datasheet, TL072CPSRG4 pinout, TL072CPSRG4 application, or TL072CPSRG4 equivalent, key selection criteria include its FET-input architecture for ultra-low bias current (≤200 pA), rail-to-rail common-mode capability, 5.25 MHz gain-bandwidth product, and SO-8 package compatibility with legacy TL072 designs.
Technical Context
The TL072CPSRG4 implements a high-impedance JFET differential pair front-end, enabling femtoampere-level input bias currents and low 1/f noise. Its internal compensation ensures stable unity-gain operation with ≤20 pF capacitive load.
It supports dual independent amplifiers sharing a single 4.5–40 V (±2.25–±20 V) supply, with output swing limited to ~115 mV from rails under 10 kΩ load - a trade-off for low quiescent current (1.4–2.5 mA/ch) and wide supply flexibility.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Noise Density | 37 nV/√Hz at 1 kHz - enables high-fidelity analog signal amplification without degrading SNR in audio paths |
| Slew Rate | 20 V/μs - supports clean reproduction of fast transients up to ~300 kHz at unity gain |
| Gain-Bandwidth Product | 5.25 MHz - allows stable closed-loop gain ≥10 at 500 kHz |
| Input Bias Current | ≤200 pA (max) - preserves signal integrity in high-impedance sensor interfaces and integrator circuits |
| Common-Mode Input Range | Extends to VCC+ - simplifies single-supply design by accepting inputs at the positive rail |
| Supply Voltage Range | ±2.25 V to ±20 V (or 4.5 V to 40 V) - accommodates both low-voltage portable and industrial high-voltage systems |
| Quiescent Current | 1.4–2.5 mA per amplifier - balances power efficiency with bandwidth/noise performance |
Pinout & Package
The TL072CPSRG4 is housed in an 8-pin SO (Small Outline) package, designated PS in TI's packaging nomenclature, with standard 1.27 mm pitch and gull-wing leads compatible with automated SMT assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Output A | Amplifier A output; drives loads ≥2 kΩ to maintain specified swing and distortion |
| 2 | Inverting Input A | High-impedance JFET node; bias current ≤200 pA minimizes DC error in precision feedback networks |
| 3 | Noninverting Input A | Matches Pin 2 impedance; used for unity-gain buffers or noninverting configurations |
| 4 | VCC− | Negative supply rail connection; must be decoupled locally to suppress supply-induced noise |
| 5 | VCC+ | Positive supply rail connection; common to both amplifiers; requires 0.1 μF ceramic bypass |
| 6 | Noninverting Input B | Independent input for second amplifier; no crosstalk coupling to Channel A above 100 dB at DC |
| 7 | Inverting Input B | Matches Pin 2 electrical behavior; supports matched dual-channel instrumentation topologies |
| 8 | Output B | Amplifier B output; electrically isolated from Output A except through shared supply pins |
Key Features
| Feature | Design Value |
|---|---|
| Low Input Voltage Noise | 37 nV/√Hz at 1 kHz enables high-SNR preamplification in microphone and piezoelectric sensor interfaces |
| FET Input Stage | Input bias current ≤200 pA prevents loading of high-Z sources like photodiode transimpedance nodes |
| Output Short-Circuit Protection | Withstands indefinite short to ground on either output without latch-up or parametric shift |
| Wide Supply Range | Operates from ±2.25 V to ±20 V, supporting both battery-powered portables and industrial ±15 V systems |
| EMI/RF Immunity | Integrated filters reject 1 GHz RF interference, critical in noisy motor drive or inverter environments |
Applications
| Pro Audio Mixer Channel | Battery Test Equipment |
|---|---|
Use Scenario: Amplifying low-level microphone or line-level signals before ADC conversion in analog mixing consoles. IC Role / Device Role: Dual-channel preamplifier and summing amplifier with matched gain and phase response. Use Value: 37 nV/√Hz noise floor preserves dynamic range; ±15 V operation supports >20 Vpp headroom for transient peaks. | Use Scenario: Precision voltage/current sourcing and sensing during electrochemical battery characterization cycles. IC Role / Device Role: Dual op-amp implementing programmable current source and differential voltage monitor. Use Value: ≤200 pA input bias avoids measurement error in high-impedance shunt resistor sensing; rail-to-rail CM input accepts full-cell voltage range. |
| Solar String Inverter Sensor Interface | AC Motor Drive Feedback Conditioning |
Use Scenario: Isolated current/voltage sensing in photovoltaic string monitoring units with galvanically separated front-ends. IC Role / Device Role: Signal conditioner for isolated amplifier outputs prior to isolation barrier or ADC input. Use Value: EMI rejection ratio of 53 dB at 1 GHz suppresses switching noise from nearby IGBT gate drivers. | Use Scenario: Analog conditioning of encoder sine/cosine signals or current-sense amplifier outputs in servo motor control loops. IC Role / Device Role: Dual-stage filtering and level-shifting for resolver-to-digital converter (RDC) interface circuits. Use Value: 20 V/μs slew rate preserves edge fidelity in 20 kHz PWM feedback paths; low THD+N (0.003%) maintains loop stability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual JFET-input op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TL072CDR | Same SO-8 package, identical pinout, but rated for 0°C to 70°C (commercial temp) vs TL072CPSRG4's 0°C to 70°C - functionally identical silicon | No difference in circuit implementation; both support same supply, noise, and bandwidth specs | Select TL072CDR when tape-and-reel volume pricing or alternate logistics channel is preferred |
| RC4558DR | Bipolar input (not JFET); higher input bias current (300 nA), higher noise (15 nV/√Hz), lower slew rate (1.7 V/μs) | Not suitable for high-Z sensor interfaces or low-noise audio; acceptable for general-purpose DC-coupled gain stages | Choose RC4558DR only where cost is primary constraint and JFET advantages are unnecessary |
Compared with TL072CDR, TL072CPSRG4 offers identical performance and pinout but differs in packaging marking and reel configuration; versus RC4558DR, it provides 15× lower input bias current and 2.5× lower voltage noise - critical for precision and audio applications.
Availability
TL072CPSRG4 is available at Aetrix Electronics and suitable for pro audio mixer design, battery test equipment development, solar string inverter sensor conditioning, and AC motor drive feedback circuits requiring stable component supply across production lifecycles.
Supply support for TL072CPSRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions for industrial, automotive, and personal electronics markets.
The TL072CPSRG4 belongs to TI's legacy low-noise JFET-input op-amp family, designed specifically for high-fidelity audio, precision instrumentation, and robust industrial signal conditioning where low bias current and low voltage noise are essential.
FAQ
What is the maximum operating temperature range for the TL072CPSRG4?
The TL072CPSRG4 is rated for operation from 0°C to +70°C ambient temperature, consistent with its "C" grade designation. This commercial temperature range is validated per TI's SLOS080W datasheet Section 5.3, and applies to all TL072C variants including TL072CPSRG4. Operation outside this range may result in parametric shift or reliability degradation.
Does the TL072CPSRG4 support single-supply operation?
Yes, the TL072CPSRG4 supports true single-supply operation with common-mode input voltage range extending to VCC+. When powered from +15 V and GND, it accepts inputs from 1.5 V to 15 V (per datasheet Section 5.8), enabling use in rail-to-rail input buffer and level-shifting applications without dual supplies.
What is the input offset voltage specification for TL072CPSRG4?
The TL072CPSRG4 has a maximum input offset voltage of 10 mV at 25°C (typical 3 mV), as specified in Section 5.8 of the TI SLOS080W datasheet. Over the full 0°C to +70°C temperature range, the max offset increases to 13 mV, with drift rated at ±18 µV/°C - critical for DC-coupled precision gain stages.
Can TL072CPSRG4 drive capacitive loads directly?
The TL072CPSRG4 is stable driving up to 300 pF capacitive load in unity-gain configuration (Section 5.7). For loads exceeding 20 pF, external series resistance (e.g., 10–100 Ω) at the output is recommended to prevent peaking or oscillation, especially in high-impedance sensor buffering applications.
Is TL072CPSRG4 pin-compatible with other TL072 variants?
Yes, TL072CPSRG4 uses the standard 8-pin SO (PS) package with identical pinout to TL072CDR, TL072CP, and TL072ACPSR - all share Pin 1 (Out A), Pin 2 (In– A), Pin 3 (In+ A), Pin 4 (V–), Pin 5 (V+), Pin 6 (In+ B), Pin 7 (In– B), Pin 8 (Out B), enabling drop-in replacement within the same temperature grade.
TL072CPSRG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.209", 5.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Amplifier Type:
- J-FET
- Number of Circuits:
- 2
- Output Type:
- -
- Slew Rate:
- 13V/µs
- Gain Bandwidth Product:
- 3 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 65 pA
- Voltage - Input Offset:
- 3 mV
- Current - Supply:
- 1.4mA (x2 Channels)
- Current - Output / Channel:
- -
- Voltage - Supply Span (Min):
- 10 V
- Voltage - Supply Span (Max):
- 30 V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SO
TL072CPSRG4 FAQ
1.How can I place an order for TL072CPSRG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for TL072CPSRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TL072CPSRG4 reliable?
The price and inventory of TL072CPSRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TL072CPSRG4 is usually 5 days.
3.What payment methods are accepted for TL072CPSRG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TL072CPSRG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TL072CPSRG4?
TL072CPSRG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TL072CPSRG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TL072CPSRG4?
For technical support, including TL072CPSRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TL072CPSRG4 requirements.
6.How does Aetrix verify that TL072CPSRG4 is sourced from the original manufacturer or authorized distributors?
All TL072CPSRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TL072CPSRG4 meets industry standards.
7.What is the process for return or replacement of TL072CPSRG4?
All TL072CPSRG4 units undergo pre-shipment inspection (PSI). If there is an issue with TL072CPSRG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TL072CPSRG4 part is unused and in its original packaging.
Return procedure for TL072CPSRG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TL072CPSRG4 Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
