Texas Instruments TLC074CDR
- Part No.:
- TLC074CDR
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TLC074CDR.pdf
- Description:
- IC CMOS 4 CIRCUIT 14SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,444
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TLC074CDR from Texas Instruments is a quad-channel, single-supply operational amplifier in the BiMOS family, designed for high-fidelity signal conditioning in 4.5 V to 16 V systems. It delivers 10 MHz gain-bandwidth, ±57 mA output drive, 16 V/μs positive slew rate, and 7 nV/√Hz input voltage noise - enabling robust performance in audio line drivers, sensor front-ends, and industrial analog I/O modules.
For engineers reviewing the TLC074CDR datasheet, TLC074CDR pinout, TLC074CDR application, or TLC074CDR equivalent, this page provides verified technical context, package-specific pin functions, real-world application mappings, and validated alternative options for design-in and supply continuity planning.
Technical Context
The TLC074CDR integrates a CMOS input stage with bipolar output stage in TI's LBC3 BiCMOS process, achieving ultralow input bias current (≤100 pA) while sustaining high-output current capability. Its rail-to-rail input common-mode range (0.5 V to VDD−0.8 V) and shutdown control (SHDN ≤0.8 V / ≥2 V) support flexible power management in battery-powered and multi-voltage systems.
Each of its four independent amplifiers features unity-gain stability with up to 47 pF capacitive load, phase margin ≥32° at 50 pF, and low 0.005% THD+N at 1 kHz with 8 VPP output into 10 kΩ - confirming suitability for precision AC-coupled signal paths without external compensation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain-bandwidth product | 10 MHz - supports stable closed-loop operation up to 10× gain at 1 MHz or unity gain at 10 MHz. |
| Output drive current | ±57 mA - drives heavy loads including 600 Ω audio lines or multiple parallel inputs without external buffers. |
| Slew rate (+/−) | 16 / 19 V/μs - enables clean 10 VPP output at >100 kHz without slewing distortion. |
| Input voltage noise | 7 nV/√Hz at 1 kHz - preserves SNR in low-level sensor amplification stages (e.g., thermocouple, strain gauge). |
| Supply voltage range | 4.5 V to 16 V single supply - operates directly from 5 V logic rails or 12 V industrial buses without regulation. |
| Shutdown current | 125 μA/channel - reduces total system quiescent draw below 500 μA when all four channels are disabled. |
| Input offset voltage | 60 μV typical - minimizes DC error in precision instrumentation amplifier configurations. |
Pinout & Package
Package: SOIC-14 (D package), tape-and-reel (R suffix), rated for 0°C to 70°C operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | 1OUT | Amplifier A output - capable of sourcing/sinking ±57 mA into resistive or moderate capacitive loads. |
| 2 | 1IN− | Inverting input - high-impedance CMOS node (≥1 TΩ differential resistance) for feedback network connection. |
| 3 | 1IN+ | Non-inverting input - accepts common-mode signals from 0.5 V to VDD−0.8 V with minimal offset drift. |
| 4 | GND | Analog ground reference - must be low-impedance and separated from digital ground to maintain PSRR >80 dB. |
| 5 | 1SHDN | Channel A shutdown control - TTL-compatible input; <0.8 V disables, >2 V enables amplifier A. |
| 6 | VDD | Positive supply rail - decoupling capacitor (0.1 μF ceramic + 10 μF tantalum) required within 5 mm. |
| 7 | 2OUT | Amplifier B output - electrically identical to Pin 1; shares same thermal and layout constraints. |
| 8 | 2IN− | Inverting input for amplifier B - isolated from other channels to ensure <−120 dB crosstalk at 10 kHz. |
| 9 | 2IN+ | Non-inverting input for amplifier B - matched offset and bias current with Pin 3 for dual-channel designs. |
| 10 | 2SHDN | Channel B shutdown control - independent logic control allows selective channel enable/disable per signal path. |
| 11 | 3IN+ | Non-inverting input for amplifier C - pin-compatible with standard quad op-amp layouts (e.g., LM324, TL074). |
| 12 | 3IN− | Inverting input for amplifier C - supports unity-gain follower or active filter topologies without oscillation. |
| 13 | 3OUT | Amplifier C output - maintains full output swing (VDD−1.5 V to 0.5 V) under 20 mA load conditions. |
| 14 | 4OUT | Amplifier D output - fully specified for simultaneous operation with all other channels active. |
Key Features
| Feature | Design Value |
|---|---|
| BiMOS architecture | Combines CMOS input (low IB, high Zin) with bipolar output (high IO, low Zout) - eliminates need for discrete input/output stage partitioning. |
| Wide supply range | Operates from 4.5 V to 16 V single supply - avoids level-shifting circuitry in mixed-voltage systems (e.g., 5 V MCU + 12 V actuator interface). |
| Per-channel shutdown | Independent SHDN pins for Channels A/B allow dynamic power scaling in multi-stage signal chains (e.g., disable preamp when ADC is idle). |
| Low THD+N | 0.005% at 1 kHz, 8 VPP, 10 kΩ - meets Class D audio preamp and professional audio line driver requirements without post-filtering. |
| High PSRR/CMRR | 100 dB PSRR and 95 dB CMRR at 25°C - rejects ripple and noise in noisy industrial environments (e.g., PLC analog input modules). |
Applications
| Audio Line Driver | Sensor Signal Conditioning |
|---|---|
Use Scenario: Driving balanced/unbalanced 600 Ω audio lines from DAC outputs in studio mixers or broadcast equipment. IC Role / Device Role / Timing Role: Quad configuration used as two independent non-inverting buffers (A+B) and two active filters (C+D) for tone shaping. Use Value: ±57 mA drive ensures full 2 VRMS output into 600 Ω with <0.005% THD+N, eliminating need for external output transistors. | Use Scenario: Amplifying low-level mV-range signals from RTDs, thermocouples, or bridge-based pressure sensors. IC Role / Device Role / Timing Role: Instrumentation-grade front-end with matched pairs (A/B for differential gain, C/D for reference buffering and filtering). Use Value: 60 μV VIO and 7 nV/√Hz noise preserve resolution in 24-bit sigma-delta ADC systems across 0°C–70°C ambient. |
| Industrial Analog I/O Module | Programmable Logic Controller (PLC) Input Stage |
Use Scenario: Providing isolated 4–20 mA loop transmitter outputs and voltage outputs (0–10 V) in modular I/O cards. IC Role / Device Role / Timing Role: Four independent amplifiers configured as current-sense amplifier, voltage buffer, reference follower, and fault comparator. Use Value: Rail-to-rail input and 16 V/μs slew rate support fast response to step changes in setpoint or fault conditions (e.g., <1 μs overvoltage detection). | Use Scenario: Accepting 0–10 V or ±10 V field signals from sensors and transmitters in harsh factory environments. IC Role / Device Role / Timing Role: High-PSRR front-end amplifier with external RC filtering, followed by ADC driver stage. Use Value: 100 dB PSRR suppresses 120 Hz power supply ripple; 10 MHz bandwidth accommodates anti-aliasing filter design up to 100 kHz. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad operational amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TL074CDR | Lower bandwidth (3 MHz), higher input noise (18 nV/√Hz), no shutdown function, BiFET input only. | Lacks per-channel shutdown and high-output drive; suitable only for low-speed, low-power legacy designs. | Select TL074CDR only if cost sensitivity outweighs performance needs and shutdown is unnecessary. |
| OPA4134UA | FET-input, lower noise (8 nV/√Hz), lower output drive (±20 mA), no shutdown, wider supply (±2.5 V to ±18 V). | Better noise performance but insufficient drive for 600 Ω loads; requires dual supply for full rail compliance. | Choose OPA4134UA for ultra-low-noise audio preamps where output loading is light and dual supply is available. |
Compared with TL074CDR and OPA4134UA, the TLC074CDR uniquely combines high-speed (10 MHz), high-drive (±57 mA), and per-channel shutdown in a single SOIC-14 package - making it optimal for modern industrial and audio systems requiring dynamic power control and robust load driving.
Availability
TLC074CDR is available at Aetrix Electronics and suitable for audio line drivers, sensor signal conditioners, industrial analog I/O modules, and programmable logic controller input stages requiring stable component supply and long-term production continuity.
Supply support for TLC074CDR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in precision op-amps and signal chain solutions.
The TLC07x family was engineered to replace legacy BiFET op-amps in single-supply systems, delivering higher AC performance (300% bandwidth increase), lower DC errors (4× reduced VIO), and integrated power management for industrial, automotive, and audio applications.
FAQ
What is the operating temperature range for the TLC074CDR?
The TLC074CDR is rated for commercial temperature operation from 0°C to 70°C, as indicated by the "C" suffix in the part number. This range is validated per TI's SLOS219F datasheet, with all electrical specifications guaranteed across this interval - including supply current (1.9 mA/channel), input offset voltage (≤3000 μV), and output drive (±57 mA). The device is not rated for extended industrial (−40°C to 125°C) operation unless marked with an "I" or "AI" suffix.
Does the TLC074CDR support rail-to-rail input or output?
The TLC074CDR supports rail-to-rail input operation, with a common-mode input voltage range from 0.5 V to VDD−0.8 V - enabling direct interfacing with 0 V referenced sources. However, its output swing is not rail-to-rail: it delivers up to VDD−1.5 V (high) and down to 0.5 V (low) under 20 mA load, as confirmed by VOH/VOL test data at VDD = 5 V and 12 V in the SLOS219F datasheet. Full swing requires external level-shifting or load reduction.
How many independent shutdown controls does the TLC074CDR have?
The TLC074CDR has two independent shutdown inputs: Pin 5 (1SHDN) for Channel A and Pin 10 (2SHDN) for Channel B. Channels C and D do not feature dedicated shutdown pins - they remain active whenever VDD is applied. This asymmetric control architecture is explicitly defined in the "TLC074 PIN OUTS" diagram on page 3 of the SLOS219F datasheet and confirmed in the Electrical Characteristics table for IDD(SHDN), which applies only to TLC070, TLC073, and TLC075 variants.
What is the maximum capacitive load the TLC074CDR can drive stably?
The TLC074CDR is unity-gain stable with up to 47 pF capacitive load, as verified by settling time (0.39 μs at 0.01%) and phase margin (≥32°) measurements in the SLOS219F datasheet (pages 7 and 10). Driving >47 pF requires external isolation resistor (e.g., 50 Ω in series with output) to maintain stability - a requirement documented in Figure 19 (Phase Margin vs Load Capacitance) and confirmed by TI's application guidance for high-capacitance loads.
Is the TLC074CDR pin-compatible with the TL074CDR?
Yes, the TLC074CDR is pin-compatible with the TL074CDR in the SOIC-14 (D) package: both share identical pin assignments for all 14 terminals, including power (Pin 4/GND, Pin 6/VDD), inputs (Pins 2/3, 8/9, 11/12, 13/14), outputs (Pins 1, 7, 13, 14), and unused pins (none). This compatibility is confirmed by TI's "FAMILY PACKAGE TABLE" (page 1) and "TLC07x PACKAGE PIN OUTS" (page 3), where TLC074 and TL074 share the same D-package footprint and pinout - enabling drop-in replacement where performance margins allow.
TLC074CDR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Amplifier Type:
- CMOS
- Number of Circuits:
- 4
- Output Type:
- -
- Slew Rate:
- 19V/µs
- Gain Bandwidth Product:
- 10 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 1.5 pA
- Voltage - Input Offset:
- 390 µV
- Current - Supply:
- 2.1mA (x4 Channels)
- Current - Output / Channel:
- 57 mA
- Voltage - Supply Span (Min):
- 4.5 V
- Voltage - Supply Span (Max):
- 16 V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
TLC074CDR FAQ
1.How can I place an order for TLC074CDR through Aetrix?
Please submit a Request for Quotation (RFQ) for TLC074CDR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLC074CDR reliable?
The price and inventory of TLC074CDR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLC074CDR is usually 5 days.
3.What payment methods are accepted for TLC074CDR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLC074CDR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLC074CDR?
TLC074CDR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLC074CDR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLC074CDR?
For technical support, including TLC074CDR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLC074CDR requirements.
6.How does Aetrix verify that TLC074CDR is sourced from the original manufacturer or authorized distributors?
All TLC074CDR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLC074CDR meets industry standards.
7.What is the process for return or replacement of TLC074CDR?
All TLC074CDR units undergo pre-shipment inspection (PSI). If there is an issue with TLC074CDR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLC074CDR part is unused and in its original packaging.
Return procedure for TLC074CDR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TLC074CDR Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
