Texas Instruments TLC2574IPW
- Part No.:
- TLC2574IPW
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 20-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TLC2574IPW.pdf
- Description:
- IC ADC 12BIT SAR 20TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,366
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TLC2574IPW from Texas Instruments is a 12-bit, 4-channel single-ended pseudodifferential analog-to-digital converter (ADC) with SPI/DSP-compatible serial interface, ±10 V bipolar input range, 200-KSPS maximum throughput, and integrated 8× FIFO. It operates from a single 5-V analog supply and 3-/5-V digital supply, targeting precision data acquisition in industrial process control and test instrumentation.
For engineers reviewing the TLC2574IPW datasheet, TLC2574IPW pinout, TLC2574IPW application, or TLC2574IPW equivalent, key selection criteria include its 12-bit resolution with ±0.5 LSB INL/DNL, hardware-configurable sampling (normal/short/extended), built-in conversion clock, low-power operation (5.8 mA active, 20 µA power-down), and TSSOP-20 package compatibility with system-level signal integrity requirements.
Technical Context
The TLC2574IPW implements a successive approximation register (SAR) architecture with on-chip analog multiplexer selecting among four single-ended inputs (A0–A3), internal scaling for ±10 V full-scale range, and programmable sampling modes controlled via CSTART or SCLK timing. Its conversion clock is either internal 6.5-MHz oscillator or external SCLK up to 25 MHz.
Serial communication supports both SPI (CS/SDI/SDO/SCLK) and DSP (FS/SDI/SDO/SCLK) protocols, with frame sync (FS) enabling multi-device daisy-chaining and chip select (CS) providing slave-select functionality. The 8× FIFO buffers conversion results, reducing host processor overhead during burst acquisition sequences.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit SAR ADC - delivers 12-bit linear output codes with no missing codes guaranteed. |
| Input Channels | 4 single-ended analog inputs (A0–A3) - supports multiplexed acquisition from four independent sensors or signals. |
| Input Range | ±10 V bipolar - enables direct interfacing with industrial transducers and op-amp outputs without external level-shifting. |
| Throughput Rate | 200 KSPS - supports real-time monitoring of fast-changing physical parameters such as motor current or vibration. |
| INL / DNL | ±0.5 LSB - ensures high code-linearity critical for closed-loop control accuracy and calibration traceability. |
| Power Consumption | 5.8 mA active, 20 µA power-down - allows battery-backed or energy-constrained embedded systems to maintain measurement readiness. |
| SINAD / THD | 72 dB / −82 dB at 20 kHz - provides sufficient dynamic range for medium-fidelity sensor digitization in noisy industrial environments. |
Pinout & Package
Package: 20-pin TSSOP (PW), 4.4 mm × 6.5 mm body, 0.65 mm pitch, exposed pad optional.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A3 | Analog input channels | Selectable single-ended inputs; source impedance ≤25 Ω required for normal sampling; CSTART extends hold time for higher-Z sources. |
| AGND, AVDD | Analog ground and supply | Separate analog reference domain; decoupling capacitors mandatory between AVDD and AGND to suppress noise coupling into conversion path. |
| DGND, DVDD | Digital ground and supply | Isolated digital domain; DVDD supports 3 V or 5 V logic levels; DGND must be connected to AGND at single point near device. |
| REFP / REFM | External reference inputs | Defines full-scale range; REFP–REFM = 4 V typical; install 10 µF + 0.1 µF capacitor pair to minimize reference noise and drift. |
| CS, SCLK, SDI, SDO | SPI interface signals | Standard 4-wire SPI with CS as slave select; SDO is 3-state; supports daisy-chain or multi-drop configurations via FS or CS addressing. |
| EOC/INT | Conversion status output | Open-drain interrupt indicates data ready; falling edge triggers host read; cleared by CS↓, FS↑, or CSTART↓. |
| CSTART | Hardware sampling trigger | Asynchronous start of sample-and-hold; low pulse width controls sampling period; required for precise timing or high-impedance sources. |
| COMP | Internal compensation | Connect 0.1 µF capacitor to AGND to stabilize internal op-amp loop; omission causes conversion instability or offset drift. |
Key Features
| Feature | Design Value |
|---|---|
| Built-in 8× FIFO | Reduces host CPU polling overhead and enables burst-mode acquisition without data loss during serial transfer latency. |
| Programmable sampling modes | Normal (44 SCLK), short (12 SCLK), or extended (CSTART-controlled) sampling - accommodates wide range of source impedances and timing constraints. |
| Hardware default configuration | SDI tied to DVDD enables automatic initialization post-power-up - eliminates firmware initialization sequence for basic operation. |
| Internal conversion clock | 6.5-MHz oscillator eliminates need for external clock source - simplifies BOM and layout while ensuring deterministic conversion timing. |
| Low-power autopower-down | Enters 20 µA sleep state automatically after conversion completes - ideal for intermittent measurement applications like environmental monitoring. |
Applications
| Industrial Process Monitoring | Automated Test Equipment (ATE) |
|---|---|
|
Use Scenario: Continuous voltage/current sensing from PLC analog I/O modules in chemical plant control loops. IC Role / Device Role / Timing Role: Primary ADC digitizing 4-channel 4–20 mA transmitter outputs with ±10 V range and 200-KSPS throughput. Use Value: ±0.5 LSB INL ensures <0.01% full-scale error across temperature, supporting ISO 50001-compliant energy metering accuracy. |
Use Scenario: Multi-point voltage measurement during functional testing of power supply units on production line. IC Role / Device Role / Timing Role: High-speed 12-bit digitizer capturing transient response waveforms with hardware-triggered CSTART synchronization. Use Value: 8× FIFO enables gapless capture of 8 consecutive samples per channel without host intervention, accelerating test cycle time. |
| Motor Drive Current Sensing | Portable Data Loggers |
|
Use Scenario: Isolated phase current feedback in 3-phase inverter drives using shunt resistors and op-amp conditioning. IC Role / Device Role / Timing Role: Precision ADC acquiring synchronized current samples across three phases via A0–A2 with programmable sampling window. Use Value: Bipolar ±10 V input directly interfaces with op-amp outputs, eliminating level-shifter ICs and reducing component count and board area. |
Use Scenario: Battery-powered environmental sensor node recording temperature, humidity, and pressure over extended periods. IC Role / Device Role / Timing Role: Low-power ADC operating in autopower-down mode, waking only for scheduled measurements every 10 seconds. Use Value: 20 µA power-down current extends lithium primary cell life beyond 5 years in continuous logging applications. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 12-bit SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS7822U | 8-bit resolution, SPI-only interface, no FIFO, 200-KSPS max, 2.7–5.25 V supply | Limited to lower-accuracy sensor readouts; lacks bipolar input and hardware sampling control | Choose when cost sensitivity outweighs resolution and feature requirements; not suitable for ±10 V or precision control loops. |
| MAX11100ETK+ | 12-bit, 8-channel, SPI, internal reference, 250-KSPS, 2.7–3.6 V supply only | Requires level-shifting for ±10 V inputs; no CSTART or extended sampling; incompatible with 5-V digital systems | Prefer for compact 3.3-V battery systems needing more channels but unable to support external reference or dual-supply design. |
Compared with ADS7822U and MAX11100ETK+, the TLC2574IPW uniquely combines 12-bit ±0.5 LSB linearity, ±10 V bipolar input, hardware-synchronized sampling, and 5-V digital compatibility-making it the only option among the three that satisfies industrial-grade precision acquisition with minimal external components.
Availability
TLC2574IPW is available at Aetrix Electronics and suitable for industrial process monitoring, automated test equipment, and motor drive current sensing requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for TLC2574IPW includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in precision data converters and industrial-grade signal chain solutions.
The TLC2574IPW belongs to TI's TLC25xx family of low-power, high-accuracy SAR ADCs designed specifically for industrial automation, test instrumentation, and energy metering applications demanding robust performance under wide temperature and supply variations.
FAQ
What is the maximum analog input voltage range supported by the TLC2574IPW?
The TLC2574IPW supports a bipolar analog input range of ±10 V, defined by the voltage difference between REFP and REFM pins. Absolute maximum analog input voltage is ±17 V, but operation within ±10 V ensures specified DC accuracy (±0.5 LSB INL) and AC performance (72 dB SINAD). Exceeding ±10 V requires external clamping or scaling circuitry to avoid violating the device's linear operating region.
Does the TLC2574IPW require an external reference voltage?
Yes, the TLC2574IPW requires external reference voltages applied to REFP and REFM pins. The typical reference span is 4 V (e.g., REFP = 4 V, REFM = 0 V), establishing a ±10 V full-scale input range. Decoupling capacitors-10 µF in parallel with 0.1 µF-must be placed between REFP and REFM to ensure stable reference operation and prevent conversion noise or drift. No internal reference is provided.
How does the CSTART pin function in the TLC2574IPW?
The CSTART pin on the TLC2574IPW provides hardware-controlled asynchronous sampling initiation. A high-to-low transition starts analog sampling; a subsequent low-to-high transition places the sample-and-hold in hold mode and begins conversion. Its low-time directly sets sampling duration-critical for high-impedance sources (>25 Ω)-and operates independently of SCLK or CS/FS states, enabling precise timing-critical acquisitions.
Can the TLC2574IPW operate with a 3-V digital supply?
Yes, the TLC2574IPW supports DVDD from 2.7 V to 5.5 V, making it compatible with both 3-V and 5-V digital systems. Digital input thresholds scale accordingly: VIH = 2.1 V min at DVDD = 3 V, and VIL = 0.6 V max. However, AVDD must remain at 4.75–5.5 V for specified analog performance; the device uses separate analog and digital supplies to maintain SNR and linearity regardless of DVDD level.
What is the purpose of the COMP pin on the TLC2574IPW?
The COMP pin on the TLC2574IPW connects to the internal compensation network of the on-chip operational amplifier used in the analog front-end. A 0.1 µF capacitor must be placed between COMP and AGND to stabilize the amplifier's frequency response. Omitting this capacitor causes gain peaking, increased noise, and potential conversion errors-especially noticeable in high-frequency or high-precision applications.
TLC2574IPW Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 20-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 200k
- Number of Inputs:
- 2, 4
- Input Type:
- Pseudo-Differential, Single Ended
- Data Interface:
- SPI
- Configuration:
- MUX-S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 2.7V ~ 5.5V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 20-TSSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
TLC2574IPW FAQ
1.How can I place an order for TLC2574IPW through Aetrix?
Please submit a Request for Quotation (RFQ) for TLC2574IPW on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLC2574IPW reliable?
The price and inventory of TLC2574IPW are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLC2574IPW is usually 5 days.
3.What payment methods are accepted for TLC2574IPW?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLC2574IPW transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLC2574IPW?
TLC2574IPW orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLC2574IPW order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLC2574IPW?
For technical support, including TLC2574IPW datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLC2574IPW requirements.
6.How does Aetrix verify that TLC2574IPW is sourced from the original manufacturer or authorized distributors?
All TLC2574IPW products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLC2574IPW meets industry standards.
7.What is the process for return or replacement of TLC2574IPW?
All TLC2574IPW units undergo pre-shipment inspection (PSI). If there is an issue with TLC2574IPW, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLC2574IPW part is unused and in its original packaging.
Return procedure for TLC2574IPW:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TLC2574IPW Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

