Texas Instruments TLC2652M-8DG4
- Part No.:
- TLC2652M-8DG4
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TLC2652M-8DG4.pdf
- Description:
- IC OPAMP ZERO-DRIFT 1 CIRC 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TLC2652M-8DG4 from Texas Instruments is a military-grade chopper-stabilized operational amplifier designed for ultra-precision DC signal conditioning in harsh environments. It delivers 3 µV max input offset voltage, 0.003 µV/°C typical offset drift, 135 dB min open-loop gain, 120 dB min CMRR, and operates across −55°C to 125°C. It is used in strain gauge amplifiers, thermocouple interfaces, and precision transducer front-ends where long-term stability under thermal stress is critical.
For engineers reviewing the TLC2652M-8DG4 datasheet, TLC2652M-8DG4 pinout, TLC2652M-8DG4 application, or TLC2652M-8DG4 equivalent, key selection criteria include its guaranteed 3 µV VIO over full military temperature range, rail-to-rail common-mode input (including negative rail), single-supply compatibility down to ±1.9 V, and integrated output clamp functionality for fast overload recovery.
Technical Context
The TLC2652M-8DG4 employs Texas Instruments' Advanced LinCMOS™ process with on-chip chopper-stabilization circuitry that continuously nulls input offset voltage in real time-compensating for drift due to temperature, time, supply variation, and common-mode voltage shifts. Its architecture includes dedicated CLAMP and C RETURN terminals enabling external control of output saturation behavior.
It features dual internal clock paths: one fixed 450 Hz chopping frequency for automatic stabilization, and an optional external clock interface via INT/EXT and CLK IN pins (available in D014/J/N/FK packages). The TLC2652M-8DG4 uses the 8-pin D008 small-outline package, which omits the clock control pins-confirming it operates exclusively in internal-clock mode with no user-accessible clock configuration.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Offset Voltage | 3 µV max over −55°C to 125°C - ensures sub-microvolt baseline error in precision sensor bridges without recalibration. |
| Offset Drift vs Temp | 0.003 µV/°C typ - enables stable DC gain over extreme thermal cycling, critical for aerospace and defense instrumentation. |
| Open-Loop Gain (AVD) | 135 dB min - supports ≥1 million closed-loop gain accuracy for low-level mV-range signals from RTDs or load cells. |
| CMRR | 120 dB min - rejects common-mode interference in noisy industrial 4–20 mA loop receivers or motor current sensing. |
| Supply Range | ±1.9 V to ±8 V - allows operation from low-voltage battery systems (e.g., 3.3 V single-supply with VDD− = GND) up to high-reliability ±5 V rails. |
| Input Bias Current | 500 pA max over full temp range - preserves signal integrity in high-impedance pH electrodes or piezoelectric sensors. |
| Chopping Frequency | 450 Hz fixed - eliminates 1/f noise below 1 kHz while avoiding audible frequencies; no external capacitor tuning required. |
Pinout & Package
Package: 8-pin SOIC (D008), body size 3.9 mm × 4.9 mm, standard JEDEC MS-012AC footprint. Pin 1 indicator marked; lead finish SnPb (per MIL-PRF-38535 Class B).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (IN−) | Inverting Input | High-impedance CMOS node; accepts differential inputs down to VDD− rail for true single-supply operation. |
| 2 (IN+) | Non-Inverting Input | Matches IN− in bias current and offset; enables precision instrumentation amplifier configurations with matched feedback networks. |
| 3 (VDD−) | Negative Supply Rail | Reference for all internal biasing; common-mode input range extends to this pin, enabling rail-to-rail input swing. |
| 4 (CLAMP) | Output Clamp Control | Sinks 25 µA when active; connects to external diode/resistor network to limit output slew during overdrive and reduce recovery time. |
| 5 (C RETURN) | Chopper Capacitor Return | Provides low-impedance AC return path for internal chopping capacitors; must be connected to VDD− for stable nulling operation. |
| 6 (OUT) | Amplifier Output | Capable of ±50 mA short-circuit current; drives 10 kΩ loads with ±4.7 V swing at ±5 V supplies. |
| 7 (VDD+) | Positive Supply Rail | Power domain for output stage and internal logic; supports asymmetric supplies (e.g., +5 V / −2.5 V). |
| 8 (CXB) | Chopper Capacitor B | Second external capacitor terminal; forms switched-capacitor nulling network with CXA (pin 3 is VDD−, not CXA - per functional block diagram and D008 pinout). |
Key Features
| Feature | Design Value |
|---|---|
| Chopper-Stabilized Architecture | Real-time offset cancellation eliminates need for manual zeroing or periodic calibration in field-deployed systems. |
| Rail-to-Rail Common-Mode Input | Operates with inputs at VDD−, enabling direct connection to grounded sensors without level-shifting circuitry. |
| Integrated Output Clamp | Dedicated CLAMP pin allows external control of output saturation, reducing overload recovery time by >50% vs unclamped operation. |
| MIL-PRF-38535 Qualified | Class B screening, −55°C to 125°C operation, and 2000 V HBM ESD protection ensure reliability in avionics and missile guidance electronics. |
| No External Clock Required | Fixed 450 Hz internal chopper frequency removes timing component dependencies and PCB layout sensitivity of external clock routing. |
Applications
| Strain Gauge Amplifier | Thermocouple Signal Conditioning |
|---|---|
|
Use Scenario: Amplifying microvolt-level Wheatstone bridge outputs from metal foil strain gauges in structural health monitoring systems exposed to −55°C to 125°C ambient. IC Role / Device Role / Timing Role: Primary DC-coupled instrumentation amplifier stage with ultra-low offset and drift to preserve bridge imbalance resolution. Use Value: 3 µV max VIO and 0.003 µV/°C drift enable ≤0.02% full-scale error over full military temperature range without recalibration. |
Use Scenario: Cold-junction compensation and linearization of Type K thermocouples in turbine engine control units operating at extreme temperatures. IC Role / Device Role / Timing Role: Precision cold-junction reference amplifier and thermocouple voltage buffer before ADC sampling. Use Value: 120 dB CMRR rejects EMI from adjacent power converters; rail-to-rail input accommodates thermocouple polarity reversal during transient events. |
| High-Voltage Isolated Current Sense | Medical EEG/ECG Front-End |
|
Use Scenario: Shunt-based current measurement in 400 V DC bus inverters for electric propulsion, requiring galvanic isolation and sub-µV offset stability. IC Role / Device Role / Timing Role: First-stage difference amplifier in isolated sigma-delta modulator interface, referenced to floating ground. Use Value: ±100 mA surge tolerance on inputs prevents latch-up during IGBT switching transients; 135 dB AVD ensures accurate gain in high-common-mode rejection topologies. |
Use Scenario: Biopotential acquisition in portable EEG devices requiring ultra-low noise, low drift, and immunity to electrode half-cell potential shifts. IC Role / Device Role / Timing Role: Ultra-low-noise, high-input-impedance buffer for dry-contact scalp electrodes with DC-coupled signal path. Use Value: 500 pA max input bias current minimizes electrode polarization errors; 2.8 µVPP (0–10 Hz) noise enables detection of <1 µV neural spikes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar precision op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA189IDR | Zero-drift architecture (auto-zero), 0.005 µV/°C drift, 5.7 MHz GBW, but only rated −40°C to 125°C (not −55°C). | Lacks MIL-qualified screening and 2000 V HBM ESD rating; unsuitable for space or tactical military deployments. | Select OPA189IDR only for commercial/high-reliability industrial use where extended low-temp operation is not required. |
| AD8628ARZ | Zero-drift op-amp, 1 µV max VIO, 0.002 µV/°C drift, but max operating temp +105°C and no CLAMP pin. | No output clamp capability limits overload recovery performance in fast transient environments like motor phase current sensing. | Choose AD8628ARZ for lab-grade metrology where ultimate offset spec matters more than ruggedized recovery or military temp range. |
Compared with OPA189IDR and AD8628ARZ, the TLC2652M-8DG4 uniquely combines full military temperature qualification (−55°C to 125°C), integrated CLAMP functionality for sub-µs overload recovery, and MIL-PRF-38535 Class B screening-making it irreplaceable in mission-critical analog signal chains where environmental robustness is non-negotiable.
Availability
TLC2652M-8DG4 is available at Aetrix Electronics and suitable for aerospace flight control systems, defense radar front-ends, and nuclear instrumentation requiring stable component supply across extended temperature extremes and long product lifecycles.
Supply support for TLC2652M-8DG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a U.S.-based semiconductor company founded in 1930, specializing in analog ICs, embedded processors, and high-reliability components for industrial, automotive, and defense markets.
The TLC2652M-8DG4 belongs to TI's precision chopper-stabilized op-amp family, engineered specifically for ultra-stable DC amplification in mil-aero and energy infrastructure applications where parametric drift cannot be tolerated.
FAQ
What is the maximum operating temperature range for the TLC2652M-8DG4?
The TLC2652M-8DG4 is specified for continuous operation from −55°C to +125°C, meeting MIL-PRF-38535 Class B requirements. This full military temperature range is confirmed in the "Available Options" table and "Absolute Maximum Ratings" section of the SLOS019E datasheet, distinguishing it from commercial (C), industrial (I), and extended industrial (Q) variants.
Does the TLC2652M-8DG4 require external capacitors, and if so, what values?
Yes, the TLC2652M-8DG4 requires two external capacitors: one connected between pin 8 (CXB) and pin 3 (VDD−), and another between pin 1 (IN−) and pin 3 (VDD−) as CXA per the functional block diagram. Typical values are 0.1 µF ceramic, rated for ≥16 V, placed within 2 mm of the device per layout guidelines in the datasheet.
Is the TLC2652M-8DG4 pin-compatible with other variants like the TLC2652AM-8D?
No - the TLC2652M-8DG4 and TLC2652AM-8D share the same D008 package and pinout, but the "G4" suffix denotes a specific TI assembly/test flow compliant with MIL-PRF-38535 Class B. Electrical specs are identical; mechanical fit is guaranteed, but qualification documentation differs.
Can the TLC2652M-8DG4 operate from a single 5 V supply?
Yes - the TLC2652M-8DG4 supports single-supply operation with VDD+ = +5 V and VDD− = GND (0 V). Its common-mode input range includes the negative rail, and output swings to within 0.3 V of each rail under 10 kΩ load, enabling true single-supply signal conditioning without level-shifting circuitry.
What is the purpose of the CLAMP pin (pin 4) on the TLC2652M-8DG4?
The CLAMP pin (pin 4) provides a dedicated current-sink path (25 µA typical) to externally limit output voltage excursion during overload. When connected to a diode-resistor network tied to VDD+ or VDD−, it reduces recovery time after saturation by actively discharging internal nodes - a feature absent in most precision op-amps and critical for fast-control-loop applications.
TLC2652M-8DG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- LinCMOS™
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Amplifier Type:
- Zero-Drift
- Number of Circuits:
- 1
- Output Type:
- Single-Ended
- Slew Rate:
- 3.1V/µs
- Gain Bandwidth Product:
- 1.9 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 4 pA
- Voltage - Input Offset:
- 0.6 µV
- Current - Supply:
- 1.5mA
- Current - Output / Channel:
- 50 mA
- Voltage - Supply Span (Min):
- 3.8 V
- Voltage - Supply Span (Max):
- 16 V
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
TLC2652M-8DG4 FAQ
1.How can I place an order for TLC2652M-8DG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for TLC2652M-8DG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLC2652M-8DG4 reliable?
The price and inventory of TLC2652M-8DG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLC2652M-8DG4 is usually 5 days.
3.What payment methods are accepted for TLC2652M-8DG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLC2652M-8DG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLC2652M-8DG4?
TLC2652M-8DG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLC2652M-8DG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLC2652M-8DG4?
For technical support, including TLC2652M-8DG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLC2652M-8DG4 requirements.
6.How does Aetrix verify that TLC2652M-8DG4 is sourced from the original manufacturer or authorized distributors?
All TLC2652M-8DG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLC2652M-8DG4 meets industry standards.
7.What is the process for return or replacement of TLC2652M-8DG4?
All TLC2652M-8DG4 units undergo pre-shipment inspection (PSI). If there is an issue with TLC2652M-8DG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLC2652M-8DG4 part is unused and in its original packaging.
Return procedure for TLC2652M-8DG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TLC2652M-8DG4 Tags

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