Texas Instruments TLC2654I-8DR
- Part No.:
- TLC2654I-8DR
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TLC2654I-8DR.pdf
- Description:
- IC OPAMP GP 1 CIRCUIT 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,459
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TLC2654I-8DR from Texas Instruments is a chopper-stabilized operational amplifier optimized for ultra-low-noise, high-precision DC signal conditioning in demanding industrial and automotive sensor interfaces. It delivers 10 µV max input offset voltage (TLC2654AI grade), 0.05 µV/°C max offset drift, 13 nV/√Hz input noise at 1 kHz, 10 kHz chopping frequency, and rail-to-rail common-mode input range extending to VDD– - enabling accurate amplification of microvolt-level thermocouple or strain gauge outputs in single-supply systems.
For engineers reviewing the TLC2654I-8DR datasheet, TLC2654I-8DR pinout, TLC2654I-8DR application, or TLC2654I-8DR equivalent, key selection criteria include verified low-frequency noise performance (0.5 µVPP, 0–1 Hz), guaranteed offset stability over –40°C to 85°C, absence of clock noise below 10 kHz, and compatibility with external capacitor-based chopper control in D-package variants.
Technical Context
The TLC2654I-8DR employs Advanced LinCMOS™ process technology combined with continuous auto-zeroing chopper stabilization to null input offset voltage dynamically across temperature, time, and supply variations. Its 10 kHz internal chopping frequency eliminates intermodulation error up to 5 kHz while preserving wideband gain-bandwidth product (1.9 MHz) and phase margin (48°).
Unlike conventional auto-zero amplifiers, it integrates transparent on-chip chopper-control circuitry requiring only two external capacitors (CXA, CXB), with optional external clock access via INT/EXT and CLK IN pins on larger packages - though the 8-pin D package (DR suffix) omits these pins and operates exclusively in internal-clock mode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Offset Voltage | 10 µV max (TLC2654AI grade) - ensures sub-millivolt DC error in precision bridge or thermocouple amplifiers without trimming. |
| Offset Drift | 0.05 µV/°C max - maintains calibration integrity over full –40°C to 85°C operating range in automotive ECUs or industrial controllers. |
| Input Noise Voltage | 13 nV/√Hz @ 1 kHz - enables clean amplification of low-frequency sensor signals without significant noise folding. |
| Chopping Frequency | 10 kHz typ - suppresses 1/f noise and eliminates clock feedthrough below audio band, critical for subsonic instrumentation. |
| Common-Mode Range | Includes VDD– - supports true single-supply operation down to ±2.3 V, simplifying power architecture in battery-powered sensors. |
| Supply Current | 2.4 mA max - balances ultra-low-noise performance with moderate power consumption for always-on monitoring nodes. |
| Open-Loop Gain | 135 dB min - provides >300,000 V/V loop gain for stable closed-loop configurations with high closed-loop accuracy. |
Pinout & Package
Package: SOIC-8 (D package), tape-and-reel (R suffix), body size 3.9 mm × 4.9 mm, standard JEDEC MS-012AC.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | CXA | Chopper capacitor terminal A - connects to external 100 nF capacitor for internal chopping clock stabilization. |
| 2 | IN– | Inverting input - high-impedance CMOS node; accepts differential inputs referenced to VDD– in single-supply configurations. |
| 3 | IN+ | Non-inverting input - matched to IN– for optimal common-mode rejection; supports rail-to-rail common-mode voltage range. |
| 4 | VDD– | Negative supply rail - serves as reference for input common-mode range and output swing; must be connected even in single-supply use. |
| 5 | CXB | Chopper capacitor terminal B - completes chopper capacitor network with CXA; requires matched 100 nF capacitor. |
| 6 | VDD+ | Positive supply rail - supports ±2.3 V to ±8 V dual supply or single-ended 4.6 V to 16 V total supply range. |
| 7 | OUT | Amplifier output - capable of ±4.7 V swing into 10 kΩ load; includes internal clamp diode structure for fast overload recovery. |
| 8 | CLAMP | Output clamp control - sinking 25 µA activates internal clamp to limit output slew during saturation, reducing recovery time. |
Key Features
| Feature | Design Value |
|---|---|
| Chopper-stabilized architecture | Continuous real-time offset nulling eliminates drift-induced errors in long-duration measurements without external calibration. |
| No clock noise below 10 kHz | Enables direct amplification of 0–5 kHz physiological or mechanical vibration signals without spectral contamination from chopping artifacts. |
| Rail-to-rail common-mode input | Permits direct interface to grounded-sensor bridges or thermocouples without level-shifting circuitry, reducing component count. |
| Internal ESD protection | Withstands 2000 V HBM per MIL-STD-883C Method 3015 - enhances robustness in assembly and field-deployed industrial modules. |
| Output clamp pin | Reduces overload recovery time by actively clamping output during saturation, critical for fast-cycling feedback loops. |
Applications
| Thermocouple Amplifier | Strain Gauge Signal Chain |
|---|---|
|
Use Scenario: Amplifying µV-level Seebeck voltages from Type-K thermocouples in furnace temperature controllers. IC Role / Device Role / Timing Role: Primary DC-coupled instrumentation amplifier stage with ultra-low offset and drift to preserve absolute temperature accuracy. Use Value: 10 µV max VIO and 0.05 µV/°C drift ensure <±0.2°C measurement uncertainty over full industrial temperature range without recalibration. |
Use Scenario: Conditioning mV-level Wheatstone bridge outputs from load cells in industrial weighing systems. IC Role / Device Role / Timing Role: Low-noise, high-PSRR front-end amplifier driving 24-bit sigma-delta ADCs. Use Value: 110 dB min PSRR and 13 nV/√Hz noise prevent supply ripple and thermal noise from degrading effective resolution. |
| Automotive Battery Monitoring | Medical EEG Front-End |
|
Use Scenario: Measuring cell voltage differentials in 12 V lead-acid or Li-ion battery packs under engine cranking transients. IC Role / Device Role / Timing Role: High-CMRR differential amplifier rejecting common-mode noise induced by alternator switching. Use Value: 110 dB min CMRR and rail-to-rail VICR allow accurate sensing despite >100 mV common-mode shifts during load dump events. |
Use Scenario: Amplifying scalp potentials (0.5–100 µV) in portable EEG devices with battery-powered analog front-ends. IC Role / Device Role / Timing Role: First-stage chopper amplifier eliminating 1/f noise and DC drift before programmable gain and filtering. Use Value: 0.5 µVPP (0–1 Hz) noise floor enables detection of sub-µV neural activity without compromising bandwidth or dynamic range. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar chopper-stabilized op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA2189IDR | Zero-drift architecture (auto-zero + chopper), 5.6 nV/√Hz noise @ 1 kHz, 2 µV max VIO, but no CLAMP pin and higher IDD (1.3 mA per amp). | Preferred for ultra-low-noise, low-power portable instrumentation where clamp functionality is unnecessary. | Select OPA2189IDR when lower noise and tighter offset specs outweigh need for active overload recovery. |
| LTC2057HMS8#PBF | Higher VIO max (12.5 µV), wider supply range (±1.65 V to ±5.5 V), integrated RF filtering, but no CLAMP pin and 20 nV/√Hz noise @ 1 kHz. | Better suited for RF-noise-prone environments (e.g., motor drive feedback) due to built-in EMI hardening. | Choose LTC2057HMS8#PBF when EMI immunity and rail-to-rail output swing are prioritized over lowest possible noise. |
Compared with OPA2189IDR and LTC2057HMS8#PBF, the TLC2654I-8DR uniquely combines verified 10 kHz chopping (no aliasing below 5 kHz), dedicated CLAMP pin for fast recovery, and proven automotive-grade reliability over –40°C to 85°C - making it irreplaceable in safety-critical sensor front-ends where deterministic timing behavior and transient robustness are mandatory.
Availability
TLC2654I-8DR is available at Aetrix Electronics and suitable for industrial sensor conditioning, automotive battery monitoring, and medical bio-potential amplification requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for TLC2654I-8DR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of heritage in precision op-amps and industrial-grade signal chain solutions.
The TLC2654I-8DR belongs to TI's Advanced LinCMOS™ chopper-stabilized op-amp family, designed specifically for ultra-stable, low-noise DC amplification in harsh environments - targeting applications where offset drift, 1/f noise, and long-term calibration stability are primary constraints.
FAQ
What is the maximum operating temperature range for the TLC2654I-8DR?
The TLC2654I-8DR is characterized for operation from –40°C to +85°C, as indicated by its "I" temperature suffix. This rating is validated per TI's production test flow and applies across all electrical specifications in the datasheet, including input offset voltage, noise, and open-loop gain - ensuring reliable performance in automotive under-hood and industrial control cabinet environments.
Does the TLC2654I-8DR require external clock components?
No, the TLC2654I-8DR operates exclusively in internal-clock mode. Unlike 14-pin or 20-pin variants, the 8-pin SOIC (D) package lacks INT/EXT and CLK IN/OUT pins. It relies solely on the internal 10 kHz chopper oscillator, stabilized by external CXA and CXB capacitors (typically 100 nF each), with no provision for external clock synchronization.
How does the CLAMP pin function in the TLC2654I-8DR?
The CLAMP pin (Pin 8) sinks 25 µA when pulled low, activating an internal clamp circuit that limits output voltage excursion during overload. This reduces recovery time after saturation - a critical feature in fast-cycling control loops or pulse-amplification circuits where traditional op-amps exhibit slow settling after clipping. The TLC2654I-8DR's CLAMP functionality is fully specified and tested across temperature.
Can the TLC2654I-8DR operate from a single supply?
Yes, the TLC2654I-8DR supports true single-supply operation with a common-mode input voltage range that includes VDD–. When powered with VDD+ = 5 V and VDD– = 0 V, it accepts inputs from 0 V to 2.7 V and delivers output swings from ~0.3 V to ~4.7 V into 10 kΩ, enabling direct interfacing with grounded sensors without level-shifting circuitry.
What is the purpose of the CXA and CXB pins on the TLC2654I-8DR?
Pins 1 (CXA) and 5 (CXB) connect to external 100 nF capacitors that stabilize the internal chopper clock oscillator. These capacitors set the chopping frequency (10 kHz typ) and suppress residual ripple; mismatch or instability here directly impacts low-frequency noise performance and offset nulling accuracy. TI specifies tight tolerance (±10%) and low-ESR ceramic types for optimal operation.
TLC2654I-8DR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- LinCMOS™
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Amplifier Type:
- General Purpose
- Number of Circuits:
- 1
- Output Type:
- -
- Slew Rate:
- 3.7V/µs
- Gain Bandwidth Product:
- 1.9 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 50 pA
- Voltage - Input Offset:
- 5 µV
- Current - Supply:
- 1.5mA
- Current - Output / Channel:
- 50 mA
- Voltage - Supply Span (Min):
- 4.6 V
- Voltage - Supply Span (Max):
- 16 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
TLC2654I-8DR FAQ
1.How can I place an order for TLC2654I-8DR through Aetrix?
Please submit a Request for Quotation (RFQ) for TLC2654I-8DR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLC2654I-8DR reliable?
The price and inventory of TLC2654I-8DR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLC2654I-8DR is usually 5 days.
3.What payment methods are accepted for TLC2654I-8DR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLC2654I-8DR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLC2654I-8DR?
TLC2654I-8DR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLC2654I-8DR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLC2654I-8DR?
For technical support, including TLC2654I-8DR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLC2654I-8DR requirements.
6.How does Aetrix verify that TLC2654I-8DR is sourced from the original manufacturer or authorized distributors?
All TLC2654I-8DR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLC2654I-8DR meets industry standards.
7.What is the process for return or replacement of TLC2654I-8DR?
All TLC2654I-8DR units undergo pre-shipment inspection (PSI). If there is an issue with TLC2654I-8DR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLC2654I-8DR part is unused and in its original packaging.
Return procedure for TLC2654I-8DR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TLC2654I-8DR Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
