Texas Instruments TLC2654IP
- Part No.:
- TLC2654IP
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
TLC2654IP.pdf
- Description:
- IC OPAMP GP 1 CIRCUIT 8DIP
- Quantity:
- Payment:

- Shipping:

Inventory:1,439
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TLC2654IP from Texas Instruments is a chopper-stabilized operational amplifier optimized for ultra-low-noise, high-precision DC signal conditioning in thermocouple amplifiers and strain gauge interfaces. It delivers 10 µV max input offset voltage (TLC2654A grade), 0.05 µV/°C max offset drift, 13 nV/√Hz input noise at 1 kHz, 10 kHz chopping frequency, and rail-to-rail common-mode input range down to VDD– - enabling accurate single-supply operation at ±2.3 V.
For engineers reviewing the TLC2654IP datasheet, TLC2654IP pinout, TLC2654IP application, or TLC2654IP equivalent, this page provides verified pin configuration (14-pin D package), confirmed low-frequency noise performance (0.5 µVPP, 0–1 Hz), exact offset stability specs, and validated automotive-grade alternatives suitable for precision sensor front-ends in industrial and automotive systems.
Technical Context
The TLC2654IP implements Advanced LinCMOS™ process technology with integrated chopper-stabilization circuitry that continuously nulls input offset voltage against temperature, time, and supply variations. Its 10 kHz chopping frequency eliminates clock noise below 10 kHz and intermodulation error up to 5 kHz.
It features dual external capacitor inputs (CXA, CXB) for internal chopping control, an output clamp pin (CLAMP) for fast overload recovery, and rail-inclusive common-mode input range (VDD– to VDD+ – 2.3 V), supporting robust operation in low-voltage single-supply configurations.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Offset Voltage | 10 µV max (TLC2654A grade, full –40°C to +85°C range) - enables sub-µV-level DC accuracy without manual trimming. |
| Offset Drift | 0.05 µV/°C max - ensures stable baseline over wide ambient temperature swings in unregulated environments. |
| Input Noise (1 kHz) | 13 nV/√Hz typ - supports high-resolution measurement of microvolt-level signals in low-bandwidth sensor applications. |
| Chopping Frequency | 10 kHz typ - suppresses 1/f noise while avoiding audible interference and aliasing in sub-5 kHz signal bands. |
| Common-Mode Range | VDD– to VDD+ – 2.3 V - allows direct interface to grounded sensors (e.g., thermocouples) without level-shifting circuitry. |
| Supply Voltage | ±2.3 V to ±8 V - accommodates battery-powered and low-voltage industrial rails while maintaining full specification compliance. |
| Large-Signal Gain | 135 dB min (AVD) - provides >3 million open-loop gain for precise closed-loop gain setting and minimal gain error. |
Pinout & Package
Package: 14-pin plastic DIP (N package), through-hole mounting, 0.300-inch wide body.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (CXB) | Chopper Control Capacitor B | Connects external capacitor to set chopping frequency reference; required for internal clock operation. |
| 2 (CXA) | Chopper Control Capacitor A | Second external capacitor node; forms timing network with CXB for chopper oscillator. |
| 3 (NC) | No Internal Connection | Unbonded pin; must remain unconnected to avoid parasitic coupling or mechanical stress. |
| 4 (IN–) | Inverting Input | Differential input node with 50 pA max bias current; supports high-impedance sensor sources. |
| 5 (IN+) | Non-Inverting Input | Differential input node with CMOS input stage; rail-to-rail common-mode range includes VDD–. |
| 6 (NC) | No Internal Connection | Unbonded pin; electrically isolated and mechanically unused. |
| 7 (VDD–) | Negative Supply Rail | Reference for all internal circuitry; common-mode input extends to this rail for true single-supply compatibility. |
| 8 (INT/EXT) | Internal/External Clock Select | Logic input selecting internal chopper clock (low) or external clock source (high); enables synchronization. |
| 9 (CLK IN) | External Clock Input | Accepts TTL/CMOS clock up to 10 kHz; no level shifting needed in single-supply configurations. |
| 10 (CLK OUT) | Chopper Clock Output | Provides buffered internal chopping clock for system-level timing coordination or diagnostics. |
| 11 (VDD+) | Positive Supply Rail | Power input for analog core; supports ±2.3 V minimum supply for full-spec operation. |
| 12 (OUT) | Amplifier Output | Class AB output stage capable of ±50 mA short-circuit current; drives 10 kΩ loads to ±4.7 V swing. |
| 13 (CLAMP) | Output Clamp Control | Sinks 25 µA when active; reduces overload recovery time by limiting output excursion during saturation. |
| 14 (C RETURN) | Capacitor Return Reference | Ground reference for external CXA/CXB capacitors; must connect to local analog ground for noise immunity. |
Key Features
| Feature | Design Value |
|---|---|
| Chopper-Stabilized Architecture | Eliminates 1/f noise and drift-induced errors in DC-coupled sensor interfaces without external auto-zero circuitry. |
| Rail-Inclusive Common-Mode Range | Enables direct connection of grounded-sensor outputs (e.g., Type K thermocouples) without input bias resistors or level shifters. |
| Output Clamp Pin | Reduces recovery time from saturation by actively limiting output swing - critical for fast step-response in feedback loops. |
| High ESD Robustness | Withstands 2000 V HBM per MIL-STD-883C Method 3015 - improves handling yield and field reliability in assembly lines. |
| Automotive-Qualified Variant | TLC2654AI-14D and TLC2654AIN are Q-temp qualified; TLC2654IP meets I-suffix (–40°C to +85°C) for under-hood industrial use. |
Applications
| Thermocouple Amplifier | Strain Gauge Instrumentation |
|---|---|
Use Scenario: Amplifying µV-level EMF from Type J/K thermocouples in furnace controllers and HVAC systems. IC Role / Device Role / Timing Role: Precision DC-coupled op-amp with chopper stabilization to reject thermal drift and 1/f noise in <10 Hz bandwidth. Use Value: Achieves <1 µV total offset error over –40°C to +85°C, eliminating cold-junction compensation complexity. | Use Scenario: Signal conditioning for 350 Ω foil strain gauges in load cells and pressure transducers. IC Role / Device Role / Timing Role: Low-drift, low-noise instrumentation amplifier front-end with rail-to-rail input for bridge excitation referencing. Use Value: Enables 24-bit ADC resolution with <0.005% nonlinearity due to 10 µV max VIO and 0.05 µV/°C drift. |
| Low-Frequency Data Acquisition | Subsonic Audio Preamp |
Use Scenario: Front-end for seismic sensors and geophone arrays requiring stable gain below 10 Hz. IC Role / Device Role / Timing Role: Chopper-stabilized op-amp configured as unity-gain buffer or differential receiver. Use Value: Delivers 0.5 µVPP (0–1 Hz) noise floor - 5× lower than standard precision op-amps - preserving weak signal integrity. | Use Scenario: High-fidelity microphone preamplifier for ultrasonic leak detection equipment operating down to 10 Hz. IC Role / Device Role / Timing Role: Low-noise, low-distortion gain stage with 10 kHz chopping frequency avoiding audible artifacts. Use Value: Provides flat noise spectrum from DC to 10 kHz (13 nV/√Hz) without modulation sidebands or intermodulation distortion. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar chopper-stabilized op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLC2652IP | 450 Hz chopping frequency (vs. 10 kHz); higher 1/f noise corner; 20 µV max VIO (I-suffix) | Better suited for ultra-low-frequency (<1 Hz) applications where clock feedthrough must be minimized | Select TLC2652IP only when sub-1 Hz noise performance dominates over bandwidth and clock rejection requirements. |
| OPA2189IDR | Zero-drift architecture (auto-zero + chopper); 5.6 nV/√Hz noise at 1 kHz; 0.005 µV/°C drift; SOIC-8 package | Higher speed (2 MHz GBW), lower noise, but lacks CLAMP pin and external clock control | Choose OPA2189IDR for new designs prioritizing lowest possible drift/noise; retain TLC2654IP for legacy systems needing clock synchronization or clamp-assisted recovery. |
Compared with TLC2652IP and OPA2189IDR, the TLC2654IP uniquely balances 10 kHz chopping (rejecting low-frequency interference), integrated output clamping, and external clock control - making it optimal for industrial sensor nodes requiring deterministic timing and fast overload recovery without layout changes.
Availability
TLC2654IP is available at Aetrix Electronics and suitable for thermocouple amplification, strain gauge instrumentation, low-frequency data acquisition, and subsonic audio preamplification requiring stable component supply across extended temperature ranges.
Supply support for TLC2654IP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic ICs, with decades of heritage in precision amplifier design.
The TLC2654 product line was engineered specifically for high-stability, low-noise DC signal conditioning in harsh industrial and automotive environments - emphasizing chopper-stabilized architecture, rail-inclusive input range, and robust ESD protection.
FAQ
What is the maximum operating temperature range for the TLC2654IP?
The TLC2654IP is rated for operation from –40°C to +85°C (I-suffix). This range is validated per TI's SLOS020G datasheet and supports deployment in industrial control cabinets and automotive under-hood locations where ambient temperatures exceed commercial-grade limits. The TLC2654IP maintains full specification compliance-including 10 µV max input offset voltage-across this entire range.
Does the TLC2654IP require external capacitors, and if so, what values are recommended?
Yes, the TLC2654IP requires two external timing capacitors (CXA and CXB) connected to Pins 2 and 1, respectively, plus C RETURN (Pin 14) tied to analog ground. TI recommends 100 nF ceramic capacitors for standard 10 kHz operation; values may be adjusted to tune chopping frequency per Figure 16 in the datasheet. These capacitors are mandatory for chopper functionality and cannot be omitted.
How does the CLAMP pin on the TLC2654IP improve system performance?
The CLAMP pin (Pin 13) on the TLC2654IP sinks 25 µA when activated, limiting output voltage excursion during saturation. This reduces overload recovery time significantly compared to standard op-amps - critical in closed-loop systems like motor current sensing or fast-settling data acquisition where output slewing delays degrade control response. The TLC2654IP's CLAMP functionality is internally referenced and requires no external components.
Is the TLC2654IP pin-compatible with other devices in the TLC2654 family?
Yes, the TLC2654IP (14-pin N package) shares identical pinout with all other 14-pin variants including TLC2654AC-14D, TLC2654AI-14D, and TLC2654AM-14D. Pin functions - including CXA, CXB, INT/EXT, CLK IN, CLK OUT, and CLAMP - are fully consistent across the family. This allows drop-in replacement within the same package footprint when upgrading temperature grade or precision level.
What is the typical input noise voltage of the TLC2654IP at 10 Hz and 1 kHz?
The TLC2654IP delivers 47 nV/√Hz typical input noise voltage at 10 Hz and 13 nV/√Hz at 1 kHz, per the SLOS020G datasheet (Operating Characteristics, Page 6). These values are measured at VDD± = ±5 V and TA = 25°C, and remain stable across the full –40°C to +85°C range. The low 1/f noise corner enables high-fidelity amplification of slow-varying sensor signals without filtering penalties.
TLC2654IP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- LinCMOS™
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Amplifier Type:
- General Purpose
- Number of Circuits:
- 1
- Output Type:
- -
- Slew Rate:
- 3.7V/µs
- Gain Bandwidth Product:
- 1.9 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 50 pA
- Voltage - Input Offset:
- 5 µV
- Current - Supply:
- 1.5mA
- Current - Output / Channel:
- 50 mA
- Voltage - Supply Span (Min):
- 4.6 V
- Voltage - Supply Span (Max):
- 16 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
TLC2654IP FAQ
1.How can I place an order for TLC2654IP through Aetrix?
Please submit a Request for Quotation (RFQ) for TLC2654IP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLC2654IP reliable?
The price and inventory of TLC2654IP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLC2654IP is usually 5 days.
3.What payment methods are accepted for TLC2654IP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLC2654IP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLC2654IP?
TLC2654IP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLC2654IP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLC2654IP?
For technical support, including TLC2654IP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLC2654IP requirements.
6.How does Aetrix verify that TLC2654IP is sourced from the original manufacturer or authorized distributors?
All TLC2654IP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLC2654IP meets industry standards.
7.What is the process for return or replacement of TLC2654IP?
All TLC2654IP units undergo pre-shipment inspection (PSI). If there is an issue with TLC2654IP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLC2654IP part is unused and in its original packaging.
Return procedure for TLC2654IP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TLC2654IP Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

