Texas Instruments TLC5924DAP
- Part No.:
- TLC5924DAP
- Manufacturer:
- Texas Instruments
- Category:
- LED Drivers
- Package:
- 32-PowerTSSOP (0.240", 6.10mm Width)
- Datasheet:
-
TLC5924DAP.pdf
- Description:
- IC LED DRVR LINEAR 80MA 32HTSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:336
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Product details
Overview
TLC5924DAP from Texas Instruments is a 16-channel constant-current LED sink driver with 7-bit dot correction (128-step brightness adjustment per channel), ±1% typical current accuracy, and integrated pre-charge FETs for dynamic LED display image quality enhancement. It operates from 3.0 V to 5.5 V VCC and supports up to 17 V LED supply voltage (VUP), targeting high-reliability outdoor signage and full-color LED video walls.
For engineers reviewing the TLC5924DAP datasheet, TLC5924DAP pinout, TLC5924DAP application, or TLC5924DAP equivalent, key selection criteria include its 30 MHz serial interface speed, thermal error flag (TEF) and LED open detection (LOD) diagnostics, HTSSOP-32 PowerPAD™ package thermal performance, and dual-mode serial control (ON/OFF vs. dot-correction data).
Technical Context
The TLC5924DAP implements two independent 16-bit shift register paths-16-bit for ON/OFF control and 112-bit (16 × 7-bit) for dot correction-selected by the MODE pin. Its constant-current sinks are set by a single external IREF resistor, with output current scaling at 40× the IREF current (e.g., 1.24 V / 1.3 kΩ ≈ 0.95 mA → 38 mA max per channel).
Each output features a dedicated pre-charge FET activated during BLANK=H, with fixed 20 ns inter-channel delay to limit inrush current. Error reporting uses an open-drain XERR pin that asserts low on either TEF (junction >160°C) or LOD (OUTn <0.3 V while ON), with LOD status readable via SOUT in a 16-bit serial frame after XLAT latching.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 3.0 V to 5.5 V - compatible with standard 3.3 V and 5 V logic systems without level shifting |
| Max Output Current | 80 mA per channel - sufficient for driving high-brightness LEDs at full duty cycle |
| Current Accuracy | ±1% typical - enables uniform brightness across 16 channels without per-channel trimming |
| Digital Interface | 30 MHz SCLK - supports >1 kHz full-frame updates for 16×16 LED matrices |
| Dot Correction | 7-bit (128 steps) per channel - allows fine-grained compensation of LED binning and aging drift |
| Thermal Protection | TEF threshold = 160°C - prevents latch-up or parametric shift during sustained high-current operation |
| LED Open Detection | LOD threshold = 0.3 V - reliably identifies open-circuit LEDs under active drive conditions |
Pinout & Package
Package: 32-pin HTSSOP with exposed PowerPAD™ thermal pad (DAP suffix). Designed for high-power dissipation: 42.54 mW/°C derating above 25°C when soldered, enabling stable 80 mA/channel operation at 85°C ambient.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BLANK | Global output enable/disable | Active-HIGH forces all 16 outputs to VUP (off); used for PWM dimming and blanking intervals |
| XLAT | Data latch control | Rising edge latches ON/OFF data; HIGH level latches dot-correction data - mode-selectable via MODE pin |
| MODE | Serial interface mode select | LOW configures 16-bit ON/OFF shift register; HIGH configures 112-bit dot-correction shift register |
| IREF | Reference current input | Connects to GND via external resistor to set max channel current (IOUT = 40 × VIREF/RIREF) |
| XERR | Open-drain error flag | Asserts LOW on thermal fault (TEF) or LED open (LOD); multiple devices can be wire-OR'd to single MCU interrupt |
| VUP | Pre-charge power supply | Provides voltage source for pre-charge FETs; must be ≥3 V and ≤15 V; two pins (6 & 27) require parallel connection |
| PGND | Power ground | Four dedicated pins (9,14,19,24) minimize ground bounce during simultaneous 16-channel switching |
Key Features
| Feature | Design Value |
|---|---|
| 16-channel constant-current sink | Independent 0–80 mA per channel with ±1% matching - eliminates need for external current-setting resistors |
| 7-bit per-channel dot correction | 128-step brightness calibration stored in internal registers - corrects for LED forward-voltage variation and aging |
| Integrated pre-charge FETs | Reduces ghosting and improves contrast in multiplexed LED displays by pre-charging segment lines before sink activation |
| Inter-channel output delay | 20 ns fixed delay between consecutive OUTn transitions - limits peak inrush current to reduce PCB bypass capacitor requirements |
| Dual diagnostic flags (TEF/LOD) | Single XERR pin reports both thermal overtemperature and open-LED faults - simplifies system-level fault monitoring |
Applications
| Monocolor LED Signboard | Full-Color LED Video Wall |
|---|---|
Use Scenario: Outdoor advertising sign using 16×N rows of red/green/blue LED modules driven in 1:16 multiplexing. IC Role / Device Role / Timing Role: TLC5924DAP provides synchronized 16-channel constant-current sinking with programmable dot correction per row to compensate for LED batch variance. Use Value: Enables uniform luminance across 10,000+ LEDs using only one reference resistor and no per-channel calibration hardware. | Use Scenario: Indoor rental LED panel with 16×16 RGB subpixels per module, requiring real-time brightness correction and fault detection. IC Role / Device Role / Timing Role: TLC5924DAP acts as column driver with BLANK-controlled PWM dimming and LOD feedback to detect dead pixels during operation. Use Value: Reduces service downtime by identifying open-circuit LEDs via SOUT-read LOD data without halting display refresh. |
| Automotive Interior Lighting | Industrial Control Panel Backlight |
Use Scenario: Dashboard backlighting with 16 individually dimmable white LEDs, operating from 12 V battery with 5 V logic rail. IC Role / Device Role / Timing Role: TLC5924DAP serves as current-regulated sink with VUP supplied from 12 V via local LDO, enabling precise intensity control via dot correction. Use Value: Maintains consistent color temperature and brightness over temperature (-40°C to 85°C) without software compensation. | Use Scenario: HMI panel with 16 status indicator LEDs requiring fail-safe operation and thermal monitoring in enclosed enclosures. IC Role / Device Role / Timing Role: TLC5924DAP delivers regulated current while TEF flag triggers system shutdown before junction exceeds 160°C. Use Value: Eliminates need for external thermal sensor and reduces BOM count by integrating overtemperature protection. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LED driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLC5925DAP | Same pinout and function but adds 16-bit grayscale PWM (4096 steps) instead of 7-bit dot correction; higher ICC (36 mA vs. 32 mA) | Better suited for high-fidelity grayscale video where PWM flicker must be eliminated | Select TLC5925DAP if 12-bit PWM dimming is required; TLC5924DAP remains optimal for cost-sensitive dot-correction-only designs |
| MAX6966AUG+ | 16-channel, 8-bit dot correction, 100 mA max, I²C interface (vs. SPI-like serial), no pre-charge FET | Lacks pre-charge capability and inter-channel delay - may require larger bypass capacitors in high-speed multiplexing | Choose MAX6966AUG+ for I²C-based systems needing higher current; prefer TLC5924DAP for fast serial interfaces and display image quality optimization |
Compared with TLC5924DAP, TLC5925DAP offers enhanced grayscale resolution at the cost of higher power and identical footprint, while MAX6966AUG+ trades pre-charge functionality and timing control for I²C simplicity and higher current - making TLC5924DAP the optimal choice for thermally constrained, high-refresh-rate LED signage.
Availability
TLC5924DAP is available at Aetrix Electronics and suitable for outdoor LED signage, automotive interior lighting, and industrial HMI backlighting requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for TLC5924DAP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in LED driver innovation and automotive-grade reliability.
The TLC59xx family was designed specifically for high-channel-count LED display systems requiring precision current matching, integrated diagnostics, and robust thermal management - with TLC5924DAP targeting cost-optimized, high-yield manufacturing of commercial signage.
FAQ
What is the maximum LED supply voltage supported by the TLC5924DAP?
The TLC5924DAP supports up to 17 V on the VUP pin, enabling direct connection to common 12 V or 15 V LED string supplies without intermediate regulation. This allows efficient operation with high-Vf LED arrays while maintaining full 80 mA sink capability across all 16 channels. The device's OUTn pins tolerate VUP – 0.3 V, and proper decoupling of VUP is required to ensure stable pre-charge FET operation. TLC5924DAP does not regulate VUP - it must be supplied externally within 3 V to 15 V range.
How does the TLC5924DAP implement dot correction, and what is its resolution?
The TLC5924DAP implements per-channel dot correction using a 7-bit value (0–127) loaded into internal DC registers, allowing 128-step linear adjustment of each output current from 0% to 100% of the maximum set by IREF. Dot correction data is loaded as a 112-bit serial frame (16 × 7 bits, MSB first) when MODE = HIGH and latched by holding XLAT HIGH. TLC5924DAP applies correction multiplicatively: IOUTn = IMAX × DCn/127. This enables precise binning compensation without altering the master IREF setting.
Can multiple TLC5924DAP devices be cascaded, and how is data routed?
Yes, multiple TLC5924DAP devices can be cascaded using the SOUT-to-SIN daisy-chain topology. Serial data enters the first device's SIN pin, shifts through its 16-bit (ON/OFF) or 112-bit (dot correction) register, and exits SOUT to feed the next device's SIN. XLAT and MODE are shared across all devices in the chain, while SCLK clocks data synchronously. The TLC5924DAP SOUT pin also outputs LOD status data, enabling fault visibility across the entire cascade without additional signal lines.
What is the function of the BLANK pin, and how does it interact with the pre-charge FETs?
The BLANK pin is an active-HIGH global control that forces all 16 outputs to VUP (high-impedance off state) and simultaneously activates all pre-charge FETs. When BLANK transitions LOW, pre-charge FETs turn OFF and sink current resumes according to ON/OFF register contents. This sequence eliminates ghosting in multiplexed displays. TLC5924DAP's BLANK timing is critical: pre-charge occurs only while BLANK = HIGH, and the 20 ns inter-channel delay applies to both turn-on and turn-off edges triggered by BLANK or XLAT.
How does the TLC5924DAP report LED open and thermal faults?
The TLC5924DAP reports both LED open detection (LOD) and thermal error flag (TEF) via the open-drain XERR pin, which pulls LOW when either condition occurs. LOD triggers when an output is commanded ON (via ON/OFF register) but its voltage remains below 0.3 V (indicating open circuit), while TEF asserts when junction temperature exceeds 160°C. Both flags are OR'ed internally - XERR cannot distinguish between them electrically. However, LOD status per channel is readable serially via SOUT, while TEF requires monitoring XERR concurrent with thermal design validation. TLC5924DAP ensures system-level fault visibility without external sensors.
TLC5924DAP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 32-PowerTSSOP (0.240", 6.10mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Type:
- Linear
- Topology:
- Shift Register
- Internal Switch(s):
- Yes
- Number of Outputs:
- 16
- Voltage - Supply (Min):
- 3V
- Voltage - Supply (Max):
- 5.5V
- Voltage - Output:
- 15V
- Current - Output / Channel:
- 80mA
- Frequency:
- 30MHz
- Dimming:
- -
- Applications:
- Backlight
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-HTSSOP
TLC5924DAP FAQ
1.How can I place an order for TLC5924DAP through Aetrix?
Please submit a Request for Quotation (RFQ) for TLC5924DAP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLC5924DAP reliable?
The price and inventory of TLC5924DAP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLC5924DAP is usually 5 days.
3.What payment methods are accepted for TLC5924DAP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLC5924DAP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLC5924DAP?
TLC5924DAP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLC5924DAP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLC5924DAP?
For technical support, including TLC5924DAP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLC5924DAP requirements.
6.How does Aetrix verify that TLC5924DAP is sourced from the original manufacturer or authorized distributors?
All TLC5924DAP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLC5924DAP meets industry standards.
7.What is the process for return or replacement of TLC5924DAP?
All TLC5924DAP units undergo pre-shipment inspection (PSI). If there is an issue with TLC5924DAP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLC5924DAP part is unused and in its original packaging.
Return procedure for TLC5924DAP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TLC5924DAP Tags

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BCR402RE6327HTSA1
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BCR420UW6-7
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