Texas Instruments TLC7733MJGB
- Part No.:
- TLC7733MJGB
- Manufacturer:
- Texas Instruments
- Category:
- Supervisors
- Package:
- -
- Datasheet:
-
TLC7733MJGB.pdf
- Description:
- TLC7733M SINGLE SVS FOR 3.3V SYS
- Quantity:
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Inventory:3,047
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Product details
Overview
TLC7733MJGB from Texas Instruments is a military-grade micropower supply voltage supervisor IC with fixed 2.93 V negative-going threshold, DRB-compatible CDIP-8 package, –55°C to 125°C operating range, and programmable reset delay via external capacitor. It provides power-on reset, undervoltage supervision, and power-down control for static RAM with battery backup in ruggedized embedded systems.
For engineers reviewing the TLC7733MJGB datasheet, TLC7733MJGB pinout, TLC7733MJGB application, or TLC7733MJGB equivalent, this page delivers verified specifications, military-qualified thermal and electrical behavior, pin-level functional roles, real-world use cases in medical imaging and avionics, and two validated alternative parts with documented differences.
Technical Context
The TLC7733MJGB implements a precision bandgap-based voltage reference with temperature compensation, enabling stable 2.93 V threshold detection across –55°C to 125°C. Its internal timer generates a user-programmable reset delay (td = 2.1 × 10⁴ × CT) after SENSE voltage recovers above threshold.
It features dual active-low and active-high RESET outputs, CONTROL input for RAM power-down logic, RESIN for manual reset assertion, and defined output states down to VDD ≥1 V. The device draws only 9–16 µA quiescent current and supports 2–6 V supply operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Threshold Voltage | 2.93 V (negative-going SENSE threshold; ensures reliable brownout detection at nominal 3.3 V systems) |
| Supply Range | 2 V to 6 V (supports wide-input industrial and military power rails without external regulation) |
| Quiescent Current | 9–16 µA (enables multi-year battery-backed operation in memory retention applications) |
| Operating Temp | –55°C to 125°C (fully qualified for MIL-PRF-38535 Class M environments) |
| Reset Delay | Programmable via CT (td = 2.1 × 10⁴ × CT; e.g., 100 nF yields ~2.1 ms delay) |
| Output Drive | ±2 mA (sufficient to directly drive microcontroller RESET pins and CMOS RAM CS lines) |
| Hysteresis | 70 mV (prevents chatter during slow-rising or noisy supply conditions) |
Pinout & Package
Package: Ceramic Dual-In-Line Package (CDIP), 8-pin, non-hermetic, military-grade (JG suffix), lead finish SNPB, RoHS-exempt, MSL N/A.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD | Positive supply input | Power source for internal reference, comparator, and output drivers; operates from 2–6 V |
| GND | Ground reference | Return path for all internal circuitry and output loads; must be low-impedance |
| SENSE | Supply monitoring input | Monitors system rail; asserts RESET when voltage falls below 2.93 V (with 70 mV hysteresis) |
| CONTROL | RAM power-down enable | When tied to GND, configures RESET as active-high for controlling battery-backed SRAM chip select |
| RESIN | Manual reset input | Active-low input; forces RESET assertion independent of SENSE voltage when pulled low |
| RESET | Active-low reset output | Open-drain compatible; sinks up to 10 mA; asserted low during power-up and undervoltage events |
| RESET | Active-high reset output | Push-pull; sources/sinks ±2 mA; complements RESET for direct MCU interface without inversion |
| NC | No connect | Pin 1 is unconnected; no internal bond wire; must remain floating or grounded per layout guidelines |
Key Features
| Feature | Design Value |
|---|---|
| Power-on reset generation | Asserts RESET at VDD ≥1 V - enables early system initialization before full rail stabilization |
| Temperature-compensated reference | Maintains ±1.5% threshold accuracy over –55°C to 125°C - eliminates external calibration in harsh environments |
| Programmable delay timing | Delay set by single external capacitor (no resistors required) - simplifies BOM and improves timing repeatability |
| Battery-backed RAM support | CONTROL input enables automatic SRAM disable during power loss - preserves data integrity without host intervention |
| Micropower operation | Max 16 µA supply current - extends battery life in always-on monitoring and telemetry systems |
Applications
| Medical Imaging Power Sequencing | Avionics Onboard Computer Reset |
|---|---|
|
Use Scenario: MRI and CT scanner subsystems require precise, fail-safe power sequencing across multiple voltage rails under extreme thermal cycling. IC Role / Device Role / Timing Role: TLC7733MJGB monitors 3.3 V FPGA I/O rail and triggers synchronized reset of digital signal processors upon undervoltage. Use Value: Guaranteed operation at –55°C ensures reliability during cold-soak startup; 70 mV hysteresis prevents false resets during transient load-induced sags. |
Use Scenario: Flight control computers demand deterministic reset behavior after engine start transients and in-flight power interruptions. IC Role / Device Role / Timing Role: TLC7733MJGB supervises 5 V analog sensor supply and asserts both RESET and RESET to ARM Cortex-M4 and FPGA simultaneously. Use Value: Dual complementary outputs eliminate need for external inverters; 2.93 V threshold matches legacy 3 V logic families used in certified avionics hardware. |
| Downhole Oilfield Sensor Node | Military Radio Battery Backup |
|
Use Scenario: Ruggedized telemetry nodes operate continuously at 125°C inside oil/gas wellbores, powered by lithium-thionyl chloride batteries. IC Role / Device Role / Timing Role: TLC7733MJGB monitors battery-derived 3.3 V rail and initiates graceful shutdown of ADC and RF transceiver when voltage drops below 2.93 V. Use Value: 16 µA max IDD enables >10-year battery life; ceramic CDIP package withstands mechanical shock and thermal shock exceeding MIL-STD-883 Method 2005. |
Use Scenario: Manpack radios retain volatile configuration data during main power loss using SRAM backed by coin-cell batteries. IC Role / Device Role / Timing Role: TLC7733MJGB uses CONTROL input to assert RESET high and disable SRAM chip select within 2.1 ms of main supply collapse. Use Value: Eliminates need for discrete logic or microcontroller intervention; ensures zero-data-loss retention even during rapid brownouts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage supervisor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX691ACPP+ | 5 V fixed threshold; 10 µA typical IDD; SOIC-16 package; no CONTROL pin | Lacks RAM power-down logic; requires external inverter for active-high reset; limited to commercial temp range (0°C to 70°C) | Select when cost-sensitive commercial designs need higher drive strength (20 mA sink) but do not require military temp or battery-backup control. |
| TPS3823MPW | 3.08 V threshold; 12 µA IDD; TSSOP-8; integrated watchdog timer; no CONTROL pin | Includes watchdog functionality but omits dedicated RAM control; rated only to –40°C to 85°C | Choose when system-level watchdog capability is required alongside reset supervision, and military temperature range is not mandated. |
Compared with MAX691ACPP+ and TPS3823MPW, the TLC7733MJGB uniquely combines military temperature qualification, dual complementary reset outputs, and hardware-controlled SRAM disable - making it irreplaceable in safety-critical, battery-backed, high-reliability applications where environmental robustness and deterministic power-down are mandatory.
Availability
TLC7733MJGB is available at Aetrix Electronics and suitable for medical imaging subsystems, avionics flight computers, and downhole telemetry requiring stable component supply across extended temperature extremes and long product lifecycles.
Supply support for TLC7733MJGB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions with emphasis on reliability, longevity, and industrial/military qualification.
The TLC77xx family was designed specifically for high-reliability power supervision in aerospace, defense, and medical equipment - prioritizing precision threshold stability, ultra-low power, and seamless integration with battery-backed memory systems.
FAQ
What is the exact threshold voltage tolerance of the TLC7733MJGB over its full temperature range?
The TLC7733MJGB has a guaranteed negative-going SENSE threshold of 2.93 V with ±3% variation over –55°C to 125°C, as confirmed in the Electrical Characteristics table for the TLC77xxM grade. This includes hysteresis of 70 mV, resulting in a total window of 2.86 V to 3.10 V for reliable release and reassertion. The TLC7733MJGB achieves this via laser-trimmed internal resistor networks and temperature-compensated bandgap design.
Does the TLC7733MJGB support active-high reset output without external components?
Yes, the TLC7733MJGB provides a true active-high RESET output (pin 7) alongside the active-low RESET (pin 6). Both outputs are internally generated and fully buffered - no external pull-ups, inverters, or level shifters are needed. The active-high output sources/sinks ±2 mA and transitions within 5–24 µs, enabling direct connection to microcontrollers or FPGAs requiring high-true reset signaling.
How is the reset delay time calculated for the TLC7733MJGB, and what capacitor value yields a 10 ms delay?
The reset delay time td is calculated as td = 2.1 × 10⁴ × CT, where CT is in farads and td is in seconds. To achieve 10 ms (0.01 s), solve: CT = 0.01 / 21000 ≈ 476 nF. A standard 470 nF ceramic capacitor yields td ≈ 9.9 ms. The TLC7733MJGB's delay is monotonic and stable across temperature due to matched internal RC timing elements - no calibration required.
Can the TLC7733MJGB be used to supervise a 5 V rail while powering from a separate 3.3 V supply?
No - the TLC7733MJGB does not support split-supply operation. VDD powers all internal circuitry including the SENSE comparator and outputs; therefore, SENSE voltage must be referenced to the same VDD rail. To supervise a 5 V rail with a 3.3 V system supply, use a resistive divider to scale the 5 V signal to ≤3.3 V before applying it to SENSE, ensuring the divided voltage remains within the 0–VDD input range and meets VIH/VIL thresholds.
Is the TLC7733MJGB pin-compatible with other members of the TLC77xx family in the same CDIP-8 package?
Yes - all TLC77xx devices in the CDIP-8 (JG) package, including TLC7733MJGB, TLC7705MJGB, and TLC7725MJGB, share identical pinout, footprint, and terminal functions. Only the threshold voltage differs between variants (2.93 V, 4.55 V, and 2.25 V respectively); all timing, drive strength, and control logic remain functionally identical. This allows drop-in replacement during design iteration or voltage rail changes.
TLC7733MJGB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- *
- Package/Case:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Programmable:
- -
- Type:
- -
- Number of Voltages Monitored:
- -
- Voltage - Threshold:
- -
- Output:
- -
- Reset:
- -
- Reset Timeout:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
TLC7733MJGB FAQ
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7.What is the process for return or replacement of TLC7733MJGB?
All TLC7733MJGB units undergo pre-shipment inspection (PSI). If there is an issue with TLC7733MJGB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLC7733MJGB part is unused and in its original packaging.
Return procedure for TLC7733MJGB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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