Texas Instruments TLE2062ACD
- Part No.:
- TLE2062ACD
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TLE2062ACD.pdf
- Description:
- IC OPAMP JFET 2 CIRCUIT 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,065
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Product details
Overview
TLE2062ACD from Texas Instruments is a dual FET-input operational amplifier optimized for high-output-drive, low-power, and high-voltage operation (±18 V). It delivers 1.1 MHz gain-bandwidth, 120 μA per channel supply current, ±14.9 V output swing into 10 kΩ, and 2.6 V/μs slew rate at ±15 V - enabling precision signal conditioning in engine control and flight systems.
For engineers reviewing the TLE2062ACD datasheet, TLE2062ACD pinout, TLE2062ACD application, or TLE2062ACD equivalent, key selection criteria include its JFET-input architecture for ultra-low input bias current (±10 pA typ), wide common-mode range (–11 V to +13 V at ±15 V supplies), and SOIC-8 packaging suitable for space-constrained industrial analog modules.
Technical Context
The TLE2062ACD uses JFET-input transistors with on-chip Zener trimming for offset voltage stability, supporting rail-to-rail input operation within its specified common-mode range. Its unity-gain stable design features 58° phase margin (RL = 10 kΩ, CL = 100 pF) and 1.8 MHz unity-gain bandwidth.
It operates across 0°C to 70°C ambient temperature with ±3.5 V to ±18 V dual-supply capability, delivering high output drive into 100 Ω loads while maintaining low noise (40 nV/√Hz at 1 kHz) and low THD (0.025% at 10 kHz).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain-Bandwidth Product | 1.1 MHz - supports stable closed-loop operation up to ~100 kHz with moderate gain. |
| Supply Current per Channel | 120 μA (typ) - enables battery-powered or energy-sensitive analog front-ends. |
| Input Offset Voltage (max) | 2 mV at 25°C - ensures ≤2 mV DC error in precision sensor amplification paths. |
| Output Swing (±15 V) | ±14.9 V into 10 kΩ - delivers near-rail dynamic range for 16-bit ADC driver applications. |
| Slew Rate | 2.6 V/μs at ±15 V - supports clean 10 kHz sine-wave output with <0.025% THD. |
| Input Bias Current | ±10 pA (typ) - minimizes voltage error across high-impedance source networks (e.g., piezoelectric sensors). |
| Common-Mode Range | –11 V to +13 V at ±15 V - accommodates signals referenced to negative rails in motor control feedback loops. |
Pinout & Package
Package: SOIC-8 (D package), 4.9 mm × 6 mm body size, surface-mount, tape-and-reel compatible.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Inverting Input (Ch A) | High-impedance FET node accepting differential signal reference for Channel A. |
| 2 | Non-Inverting Input (Ch A) | High-Z FET node for positive signal path of Channel A; supports high-source-impedance sensors. |
| 3 | Output (Ch A) | Capable of sourcing/sinking ≥10 mA into 100 Ω load with minimal distortion. |
| 4 | V– (Negative Supply) | Reference return for dual-supply operation; must be decoupled locally to ground. |
| 5 | Inverting Input (Ch B) | Independent high-Z FET input for second channel; electrically isolated from Ch A. |
| 6 | Non-Inverting Input (Ch B) | Second independent FET input; enables dual-channel instrumentation without cross-talk. |
| 7 | Output (Ch B) | Full-output-drive capability identical to Pin 3; supports dual-sensor or differential pair buffering. |
| 8 | V+ (Positive Supply) | Primary power rail; requires local 0.1 μF ceramic decoupling to minimize supply-induced noise. |
Key Features
| Feature | Design Value |
|---|---|
| FET-input architecture | Enables picoampere-level input bias current for high-impedance transducer interfacing. |
| High-output-drive capability | Specified performance into 100 Ω loads supports direct driving of cables or low-R ADC inputs. |
| Low-power operation | 120 μA/channel allows integration into multi-channel, thermally constrained modules. |
| Wide supply range | ±3.5 V to ±18 V operation supports legacy ±15 V systems and modern low-voltage designs. |
| On-chip Zener-trimmed offset | Guarantees ≤2 mV max VIO over temperature, reducing need for external trimming in production. |
Applications
| Full Authority Digital Engine Control | Flight Control Unit |
|---|---|
Use Scenario: Amplifying throttle position sensor and manifold absolute pressure (MAP) signals in automotive ECU subsystems. IC Role / Device Role / Timing Role: Dual-channel precision buffer and signal conditioner for analog sensor inputs prior to ADC sampling. Use Value: Low input bias current prevents loading of high-impedance potentiometric sensors; wide supply range accommodates vehicle battery fluctuations. | Use Scenario: Signal conditioning for gyroscope and accelerometer outputs in fly-by-wire actuator feedback loops. IC Role / Device Role / Timing Role: Dual op-amp providing gain, filtering, and drive strength for inertial measurement unit (IMU) analog outputs. Use Value: High CMRR (≥72 dB) rejects common-mode noise from switching power supplies; ±14.9 V swing preserves full dynamic range of ±10 V IMU outputs. |
| Analog Input Module | Industrial Data Acquisition System |
Use Scenario: Front-end amplification for 4–20 mA loop receivers and thermocouple cold-junction compensation circuits. IC Role / Device Role / Timing Role: Precision instrumentation amplifier stage with programmable gain and offset correction. Use Value: 2 mV max input offset ensures ≤0.1% error in 20 mA full-scale current loop conversion; SOIC-8 footprint simplifies layout in dense I/O modules. | Use Scenario: Buffering and level-shifting sensor outputs before multiplexing into a 16-bit SAR ADC. IC Role / Device Role / Timing Role: Rail-compatible input driver ensuring signal integrity across ±10 V input ranges. Use Value: 1.1 MHz GBW and 2.6 V/μs slew rate support accurate acquisition of 10 kHz transients without phase lag or distortion. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual FET-input op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLE2062CD | Higher max input offset voltage (4 mV vs. 2 mV), same SOIC-8 package and electrical specs otherwise. | Acceptable where tighter DC accuracy is not required; lower cost tier for non-critical analog paths. | Select when budget constraints outweigh need for guaranteed ≤2 mV VIO at 25°C. |
| TL072CD | Lower GBW (3 MHz), higher supply current (1.4 mA/ch), no guaranteed 100 Ω drive spec; same SOIC-8 footprint. | Used in audio and general-purpose circuits where output drive and ultra-low bias current are secondary. | Choose only if system does not require sub-200 μA/channel operation or high-current output capability. |
Compared with TLE2062CD and TL072CD, the TLE2062ACD provides superior DC precision (2 mV VIO max), lower power (120 μA/ch), and verified high-output-drive performance - making it optimal for safety-critical engine and flight control signal chains where accuracy and reliability are non-negotiable.
Availability
TLE2062ACD is available at Aetrix Electronics and suitable for full authority digital engine control, flight control unit, and analog input module applications requiring stable component supply across extended temperature and voltage ranges.
Supply support for TLE2062ACD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of heritage in high-reliability op-amp design.
The TLE206x family was engineered for high-voltage, low-power, FET-input precision amplification in aerospace, automotive, and industrial control systems - emphasizing DC accuracy, thermal stability, and robust output drive.
FAQ
What is the maximum operating supply voltage for the TLE2062ACD?
The TLE2062ACD supports a total supply voltage range of ±3.5 V to ±18 V, with absolute maximum rating of ±19 V (VCC+ − VCC− ≤ 38 V). Operation beyond ±18 V risks exceeding safe operating area limits and is not characterized or guaranteed.
Does the TLE2062ACD support rail-to-rail input or output operation?
The TLE2062ACD does not provide rail-to-rail input or output operation. Its common-mode input range extends to –11 V to +13 V at ±15 V supplies, and output swing reaches ±14.9 V into 10 kΩ - approximately 100 mV from each rail. True rail-to-rail performance requires alternative devices such as the OPA2333.
What is the guaranteed input offset voltage specification for the TLE2062ACD?
The TLE2062ACD guarantees a maximum input offset voltage of 2 mV at 25°C and 4 mV across the full 0°C to 70°C operating temperature range, as confirmed in Table 4-2 and Section 5.3 of the official datasheet.
Can the TLE2062ACD drive a 100 Ω load reliably?
Yes - the TLE2062ACD is explicitly specified for high-output-drive performance into 100 Ω loads, with output swing and distortion data validated under those conditions. This distinguishes it from standard low-power op-amps that degrade significantly below 2 kΩ loads.
Is the TLE2062ACD pin-compatible with other TLE2062 variants in SOIC-8 packages?
Yes - all TLE2062x variants in SOIC-8 (D) packages, including TLE2062CD, TLE2062ID, and TLE2062ACD, share identical pinout, footprint, and solder-reflow profiles, enabling drop-in replacement within the same temperature grade and offset class.
TLE2062ACD Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Amplifier Type:
- J-FET
- Number of Circuits:
- 2
- Output Type:
- -
- Slew Rate:
- 3.4V/µs
- Gain Bandwidth Product:
- 2 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 4 pA
- Voltage - Input Offset:
- 800 µV
- Current - Supply:
- 625µA (x2 Channels)
- Current - Output / Channel:
- 80 mA
- Voltage - Supply Span (Min):
- 7 V
- Voltage - Supply Span (Max):
- 36 V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
TLE2062ACD FAQ
1.How can I place an order for TLE2062ACD through Aetrix?
Please submit a Request for Quotation (RFQ) for TLE2062ACD on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLE2062ACD reliable?
The price and inventory of TLE2062ACD are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLE2062ACD is usually 5 days.
3.What payment methods are accepted for TLE2062ACD?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLE2062ACD transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLE2062ACD?
TLE2062ACD orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLE2062ACD order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLE2062ACD?
For technical support, including TLE2062ACD datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLE2062ACD requirements.
6.How does Aetrix verify that TLE2062ACD is sourced from the original manufacturer or authorized distributors?
All TLE2062ACD products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLE2062ACD meets industry standards.
7.What is the process for return or replacement of TLE2062ACD?
All TLE2062ACD units undergo pre-shipment inspection (PSI). If there is an issue with TLE2062ACD, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLE2062ACD part is unused and in its original packaging.
Return procedure for TLE2062ACD:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TLE2062ACD Tags

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