Texas Instruments TLE2062ACDR
- Part No.:
- TLE2062ACDR
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TLE2062ACDR.pdf
- Description:
- IC OPAMP JFET 2 CIRCUIT 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:6,251
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Product details
Overview
TLE2062ACDR from Texas Instruments is a dual FET-input operational amplifier optimized for high-output-drive, low-power, and high-voltage operation (±18 V supply). It delivers 1.1 MHz gain-bandwidth, 120 μA per channel supply current, and rail-to-rail output swing into 100 Ω loads - enabling precision signal conditioning in engine control units and flight control analog front-ends.
For engineers reviewing the TLE2062ACDR datasheet, TLE2062ACDR pinout, TLE2062ACDR application, or TLE2062ACDR equivalent, key selection criteria include its JFET-input architecture, 1 mV max input offset voltage at 25°C (C-suffix), SOIC-8 packaging with tape-and-reel (R suffix), and specified performance across 0°C to 70°C ambient.
Technical Context
The TLE2062ACDR uses JFET-input transistors with on-chip Zener trimming for DC precision, delivering low input bias current (±10 pA typ) and high common-mode rejection (72 dB min at ±15 V). Its unity-gain stable design supports capacitive loads up to 100 pF while maintaining ≥46° phase margin.
It operates over ±3.5 V to ±18 V supplies, with common-mode input range extending to –11 V to +13 V at ±15 V rails and output swing within 1.5 V of rails into 10 kΩ - making it suitable for single-supply or split-supply instrumentation interfaces requiring wide dynamic range and low quiescent power.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain-Bandwidth Product | 1.1 MHz - enables stable unity-gain amplification up to ~1.1 MHz with minimal phase loss |
| Supply Current per Channel | 120 μA (typ) - allows battery-powered or energy-constrained systems to integrate dual op-amps without significant power penalty |
| Input Offset Voltage (max) | 1 mV at 25°C - ensures ≤1 mV DC error in precision sensor amplification or reference buffering |
| Output Drive Capability | Specified into 100 Ω - supports direct driving of low-impedance loads like ADC input networks or transmission lines |
| Common-Mode Input Range | –11 V to +13 V at ±15 V supply - accommodates signals near negative rail in industrial sensor interfaces |
| Slew Rate | 2.6 V/μs (at ±15 V) - supports clean amplification of 10 kHz full-scale sine waves with <0.025% THD |
| Input Bias Current | ±10 pA (typ) - minimizes voltage drop across high-impedance source networks (e.g., piezoelectric sensors) |
Pinout & Package
Package: SOIC-8 (D package), 4.9 mm × 6 mm, tape-and-reel (R suffix).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Inverting input (Channel A) | High-impedance FET node accepting differential signal reference for first amplifier |
| 2 | Non-inverting input (Channel A) | High-Z FET node for positive signal path; supports high-source-impedance sensors |
| 3 | Output (Channel A) | Class-AB output stage capable of sourcing/sinking >10 mA into 100 Ω load |
| 4 | V– (Negative Supply) | Reference return for dual-supply operation; must be connected even in single-supply configurations |
| 5 | Non-inverting input (Channel B) | Independent high-Z input for second amplifier; electrically isolated from Channel A |
| 6 | Inverting input (Channel B) | Dedicated differential input for second channel; no internal coupling to Channel A |
| 7 | Output (Channel B) | Second independent output with identical drive and swing specs as Pin 3 |
| 8 | V+ (Positive Supply) | Primary power rail; supports up to ±18 V; decoupling capacitor required adjacent to this pin |
Key Features
| Feature | Design Value |
|---|---|
| FET-input architecture | Enables picoampere-level input bias current for ultra-high-impedance sensor interfacing |
| High-output-drive capability | Guaranteed performance into 100 Ω loads - eliminates need for external buffer stages |
| Low-noise floor (40 nV/√Hz @ 1 kHz) | Reduces contribution to system noise budget in precision analog signal chains |
| Wide supply range (±3.5 V to ±18 V) | Supports legacy ±15 V industrial systems and modern low-voltage embedded designs |
| Zener-trimmed input offset | Delivers 1 mV max VIO at 25°C - improves DC accuracy without external calibration |
Applications
| Engine Control Unit Signal Conditioning | Flight Control Analog Front-End |
|---|---|
Use Scenario: Amplifying low-level signals from knock sensors, throttle position sensors, and oxygen sensors in automotive ECUs. IC Role / Device Role / Timing Role: Dual-channel precision amplifier providing gain, filtering, and drive for 12-bit ADC inputs. Use Value: 120 μA/channel supply current extends ECU standby battery life; 1.1 MHz GBW supports transient detection up to 100 kHz. | Use Scenario: Buffering and scaling analog feedback signals from gyros, accelerometers, and servo position sensors in fly-by-wire systems. IC Role / Device Role / Timing Role: Dual op-amp performing rail-compatible signal translation between sensor outputs and fault-tolerant ADCs. Use Value: ±18 V supply tolerance matches avionics power rails; 1 mV VIO ensures <0.01% full-scale error in closed-loop control loops. |
| Analog Input Module for PLCs | Industrial Sensor Interface Board |
Use Scenario: Isolated analog input channels in programmable logic controllers handling 4–20 mA loop receivers and thermocouple amplifiers. IC Role / Device Role / Timing Role: Dual op-amp used in I/V conversion and cold-junction compensation circuits. Use Value: High CMRR (72 dB) rejects common-mode noise from shared ground paths; SOIC-8 footprint simplifies layout in dense I/O modules. | Use Scenario: Signal conditioning for MEMS pressure sensors and strain gauges in factory automation equipment. IC Role / Device Role / Timing Role: Precision amplifier stage providing gain, offset correction, and low-impedance drive to SAR ADC drivers. Use Value: 1012 Ω input resistance prevents loading of high-Z bridge sensors; 2.6 V/μs slew rate supports 10 kHz sensor update rates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual FET-input op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLE2062CDR | Higher 4 mV max input offset voltage (vs. 1 mV for TLE2062ACDR); same SOIC-8 package and electrical specs otherwise | Acceptable where DC accuracy is relaxed (e.g., non-critical signal buffering) | Select when cost sensitivity outweighs need for tight VIO spec |
| TL072CDR | Lower 3 MHz GBW but higher 2.8 V/μs slew rate; 6.5 mV VIO max; same SOIC-8 footprint | Better suited for audio or wideband AC-coupled applications than precision DC-coupled sensing | Choose for bandwidth-critical AC paths where offset drift is less critical |
Compared with TLE2062CDR and TL072CDR, the TLE2062ACDR provides the lowest input offset voltage in the TLE206x family and maintains full specification compliance across 0°C to 70°C - making it optimal for temperature-stable, low-error analog signal chains where DC precision is prioritized over raw speed.
Availability
TLE2062ACDR is available at Aetrix Electronics and suitable for engine control units, flight control systems, and analog input modules requiring stable component supply, long-term manufacturability, and guaranteed traceability.
Supply support for TLE2062ACDR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of heritage in precision op-amps and industrial-grade signal chain components.
The TLE206x product line was designed specifically for high-reliability, low-power, high-voltage analog signal conditioning in aerospace, automotive, and industrial control systems - emphasizing DC precision, robust output drive, and extended temperature operation.
FAQ
What is the maximum operating supply voltage for the TLE2062ACDR?
The TLE2062ACDR supports a total supply voltage range of ±3.5 V to ±18 V, meaning the absolute maximum difference between V+ and V– is 36 V. Operation beyond ±18 V violates Absolute Maximum Ratings and risks permanent damage. The device is fully characterized and guaranteed across this range, including at ±15 V for industrial and avionics applications.
Does the TLE2062ACDR require external compensation for stability?
No, the TLE2062ACDR is unity-gain stable and does not require external compensation. Its internal compensation ensures ≥46° phase margin with 100 pF capacitive load at unity gain, as verified in the datasheet's Figure 6-3. Stability is maintained across all recommended supply voltages and temperatures, eliminating the need for external capacitors or resistor networks in standard configurations.
What is the input offset voltage specification for the TLE2062ACDR at full temperature range?
The TLE2062ACDR has a maximum input offset voltage of 2 mV across its full operating temperature range of 0°C to 70°C. At 25°C, the limit is tighter - 1 mV max - as confirmed in Table 4-2 and Section 5.15 of the datasheet. This graded specification reflects tested performance, not extrapolated values.
Can the TLE2062ACDR drive a 600 Ω load effectively?
Yes, the TLE2062ACDR is explicitly specified to drive 600 Ω loads, with guaranteed output swing of ±12.5 V at ±15 V supply (Section 5.5). Its high-output-drive architecture ensures minimal distortion and full rail-to-rail swing capability into such loads - unlike many micropower op-amps that degrade significantly below 2 kΩ.
Is the TLE2062ACDR pin-compatible with other SOIC-8 dual op-amps like the TL072?
While the TLE2062ACDR shares the standard SOIC-8 pinout (dual op-amp configuration with V+, In– A, In+ A, V–, In+ B, In– B, Out B, Out A), it is not a drop-in replacement for the TL072 due to differences in input stage architecture (JFET vs. bipolar), offset voltage, and noise performance. Layout reuse is possible, but circuit validation is required to confirm stability, DC accuracy, and settling behavior in the target application.
TLE2062ACDR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Amplifier Type:
- J-FET
- Number of Circuits:
- 2
- Output Type:
- -
- Slew Rate:
- 3.4V/µs
- Gain Bandwidth Product:
- 2 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 4 pA
- Voltage - Input Offset:
- 800 µV
- Current - Supply:
- 625µA (x2 Channels)
- Current - Output / Channel:
- 80 mA
- Voltage - Supply Span (Min):
- 7 V
- Voltage - Supply Span (Max):
- 36 V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
TLE2062ACDR FAQ
1.How can I place an order for TLE2062ACDR through Aetrix?
Please submit a Request for Quotation (RFQ) for TLE2062ACDR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLE2062ACDR reliable?
The price and inventory of TLE2062ACDR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLE2062ACDR is usually 5 days.
3.What payment methods are accepted for TLE2062ACDR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLE2062ACDR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLE2062ACDR?
TLE2062ACDR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLE2062ACDR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLE2062ACDR?
For technical support, including TLE2062ACDR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLE2062ACDR requirements.
6.How does Aetrix verify that TLE2062ACDR is sourced from the original manufacturer or authorized distributors?
All TLE2062ACDR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLE2062ACDR meets industry standards.
7.What is the process for return or replacement of TLE2062ACDR?
All TLE2062ACDR units undergo pre-shipment inspection (PSI). If there is an issue with TLE2062ACDR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLE2062ACDR part is unused and in its original packaging.
Return procedure for TLE2062ACDR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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