Texas Instruments TLE2072ACP
- Part No.:
- TLE2072ACP
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
TLE2072ACP.pdf
- Description:
- IC OPAMP JFET 2 CIRCUIT 8DIP
- Quantity:
- Payment:

- Shipping:

Inventory:222
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Product details
Overview
TLE2072ACP from Texas Instruments is a dual JFET-input operational amplifier optimized for high-voltage, low-noise, and high-speed precision applications. It delivers ±19V supply operation, 10MHz unity-gain bandwidth, 32V/μs slew rate, 17nV/√Hz input voltage noise at 1kHz, and ±15pA input bias current - enabling accurate signal conditioning in oscilloscopes, electricity meters, and AC drive power stages.
For engineers reviewing the TLE2072ACP datasheet, TLE2072ACP pinout, TLE2072ACP application, or TLE2072ACP equivalent, key selection criteria include its rail-to-rail input capability, low offset drift (3.2μV/°C), wide common-mode range (±11.9V at ±15V supplies), and PDIP-8 packaging suitable for legacy test equipment and industrial analog front-ends.
Technical Context
The TLE2072ACP uses Excalibur JFET-input architecture with on-chip Zener trimming for DC precision, supporting stable operation up to ±19V supplies while maintaining low input current and low noise. Its unity-gain stability, 56° phase margin, and 300kHz maximum output-swing bandwidth enable robust closed-loop performance in active filters and sensor interfaces.
It features differential inputs operable up to the supply rails, 100MΩ common-mode input resistance, and 6TΩ differential input resistance - making it suitable for high-impedance source amplification without significant loading error or bias-induced offset.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | ±2.25V to ±19V - supports wide dynamic signal range in high-voltage industrial sensing and power stage monitoring. |
| Unity-Gain Bandwidth | 10.6MHz - enables accurate amplification of fast transients in DMMs and digitizers without phase lag. |
| Slew Rate | 32V/μs - ensures faithful reproduction of ≥1MHz full-scale square waves in oscilloscope vertical amplifiers. |
| Input Voltage Noise | 17nV/√Hz at 1kHz - minimizes added noise in low-level sensor signal chains (e.g., shunt-based current measurement). |
| Input Bias Current | ±15pA max at 25°C - preserves accuracy in high-impedance photodiode or piezoelectric sensor interfaces. |
| Input Offset Voltage | 3.5mV max (C-temp grade) - provides baseline DC accuracy for precision gain stages in metering applications. |
| Common-Mode Range | −10.9V to +15V at ±15V supplies - allows direct connection to signals referenced near supply rails in motor control feedback loops. |
Pinout & Package
Package: PDIP-8 (Plastic Dual In-line Package), 9.59mm × 7.94mm footprint, through-hole mountable, RoHS-compliant lead finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Offset Null (N1) | Connects to external potentiometer for manual input offset trimming - critical for DC-coupled precision instrumentation. |
| 2 | Inverting Input (1IN–) | Primary negative input for Channel 1 - accepts differential or single-ended signals with rail-to-rail common-mode capability. |
| 3 | Non-Inverting Input (1IN+) | Primary positive input for Channel 1 - high-impedance JFET node enabling minimal loading of sensitive sources. |
| 4 | VCC– | Negative supply rail - must be decoupled locally to suppress ground bounce in high-slew-rate operation. |
| 5 | Non-Inverting Input (2IN+) | Positive input for Channel 2 - electrically isolated from Channel 1; shares no internal coupling. |
| 6 | Inverting Input (2IN–) | Negative input for Channel 2 - supports independent gain configuration per channel in dual-channel topologies. |
| 7 | VCC+ | Positive supply rail - requires low-ESR ceramic bypass capacitor (0.1μF) adjacent to pin for stability. |
| 8 | Output (2OUT) | Amplified output of Channel 2 - capable of ±20mA continuous drive into resistive loads with <1.5μs settling to 1mV. |
Key Features
| Feature | Design Value |
|---|---|
| Low-noise JFET input stage | 17nV/√Hz at 1kHz enables sub-100μV RMS noise floor in 10kHz bandwidth sensor amplifiers. |
| Rail-to-rail input voltage range | Operates with inputs up to VCC± - eliminates level-shifting circuitry in high-side current sensing and battery-monitoring designs. |
| Excalibur process with Zener trimming | Guarantees ≤3.5mV input offset (TLE2072ACP) - reduces calibration burden in production test fixtures and portable DMMs. |
| Unity-gain stable architecture | No external compensation required - simplifies layout and improves reliability in multi-stage filter and buffer designs. |
| High supply-voltage rejection (82dB) | Maintains DC accuracy despite ±10% supply ripple - critical for operation from unregulated industrial power rails. |
Applications
| AC Drive Power Stage Module | Oscilloscopes & Digitizers |
|---|---|
Use Scenario: Amplifying isolated current-sense signals from IGBT gate drivers in variable-frequency drives. IC Role / Device Role / Timing Role: Dual-channel precision current monitor amplifier with rail-to-rail input and high CMRR (>85dB) rejecting PWM noise. Use Value: Enables accurate real-time motor phase current reconstruction without additional level-shifting or filtering components. | Use Scenario: Vertical amplifier stage in 100MHz-class bench oscilloscopes requiring low distortion and fast settling. IC Role / Device Role / Timing Role: High-slew-rate, low-noise gain block driving ADC input with 32V/μs transient response and <0.4μs 1mV settling. Use Value: Preserves signal fidelity for 10MHz sine waves and 10ns rise-time pulses without overshoot or droop. |
| Electricity Meter | Digital Multimeter (DMM) |
Use Scenario: Voltage and current channel signal conditioning in Class 0.2 polyphase energy meters. IC Role / Device Role / Timing Role: Dual op-amp performing simultaneous shunt-based current amplification and potential divider scaling. Use Value: Delivers <3.5mV offset and <17nV/√Hz noise over −25°C to +70°C - meeting IEC 62053 long-term accuracy requirements. | Use Scenario: Autoranging analog front-end in handheld 6½-digit DMMs measuring μV to 1000V ranges. IC Role / Device Role / Timing Role: Precision gain-setting amplifier with programmable offset null and low thermal drift (3.2μV/°C). Use Value: Reduces calibration frequency and improves 24-hour stability in portable metrology-grade instruments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual JFET-input op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TL072CP | Higher input offset (10mV max), lower slew rate (13V/μs), same PDIP-8 package. | Lower cost but insufficient for 10MHz bandwidth or <1μs settling requirements. | Select when budget constraints outweigh speed/noise needs in non-critical signal paths. |
| OPA2134PA | Lower noise (8nV/√Hz), higher CMRR (120dB), SO-8 only - no PDIP option. | Superior audio and precision instrumentation performance but incompatible with through-hole layouts. | Choose for new SMT designs prioritizing ultra-low noise and rail-to-rail output - not for drop-in replacement. |
Compared with TL072CP and OPA2134PA, the TLE2072ACP uniquely balances high-speed (10.6MHz GBW), low-noise (17nV/√Hz), and through-hole PDIP-8 compatibility - making it the only dual JFET op-amp qualified for legacy industrial test equipment upgrades requiring zero PCB changes.
Availability
TLE2072ACP is available at Aetrix Electronics and suitable for oscilloscopes & digitizers, electricity meters, and AC drive power stage modules requiring stable component supply across extended temperature and long-lifecycle programs.
Supply support for TLE2072ACP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with over 90 years of innovation in precision amplifiers and industrial ICs.
The TLE207x family was designed specifically for high-voltage, low-noise analog signal conditioning in test & measurement, energy metering, and industrial automation - emphasizing DC precision, AC speed, and ruggedness across −40°C to +85°C.
FAQ
What is the maximum supply voltage rating for the TLE2072ACP?
The TLE2072ACP supports a total supply voltage range of ±2.25V to ±19V, meaning the absolute maximum difference between VCC+ and VCC– is 38V. This allows operation in high-voltage industrial systems such as AC drive monitoring and high-range DMM front-ends without external regulation.
Does the TLE2072ACP require external compensation for unity-gain stability?
No, the TLE2072ACP is internally compensated and unity-gain stable. It achieves 56° phase margin at unity gain with 25pF capacitive load, eliminating the need for external compensation networks - simplifying design and improving reliability in gain-of-one buffers and active filters.
What is the input offset voltage specification for the TLE2072ACP at room temperature?
The TLE2072ACP has a maximum input offset voltage of 3.5mV at 25°C (C-suffix grade). This value is guaranteed across the 0°C to 70°C operating range and reflects the device's Zener-trimmed JFET input stage, which maintains low drift (3.2μV/°C typical) over temperature.
Can the TLE2072ACP drive a 600Ω load effectively?
Yes, the TLE2072ACP delivers ±20mA output current and maintains >80dB large-signal voltage gain into 600Ω loads at ±15V supplies. Its output swing reaches ±13.5V at 2mA, making it suitable for driving coaxial cables and legacy test equipment inputs requiring 600Ω termination.
Is the TLE2072ACP pin-compatible with other dual op-amps in PDIP-8 packages?
The TLE2072ACP follows standard dual op-amp pinout (pin 1 = offset null, pins 2/3 = ch1 ±, pin 4 = V–, pins 5/6 = ch2 ±, pin 7 = V+, pin 8 = ch2 out), matching TL072, NE5532, and LM833. However, electrical differences (e.g., offset, noise, slew rate) require verification in each application - it is not a functional drop-in replacement without circuit review.
TLE2072ACP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- J-FET
- Number of Circuits:
- 2
- Output Type:
- -
- Slew Rate:
- 45V/µs
- Gain Bandwidth Product:
- 10 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 1 pA
- Voltage - Input Offset:
- 300 µV
- Current - Supply:
- 3.1mA (x2 Channels)
- Current - Output / Channel:
- 48 mA
- Voltage - Supply Span (Min):
- 4.5 V
- Voltage - Supply Span (Max):
- 38 V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
TLE2072ACP FAQ
1.How can I place an order for TLE2072ACP through Aetrix?
Please submit a Request for Quotation (RFQ) for TLE2072ACP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLE2072ACP reliable?
The price and inventory of TLE2072ACP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLE2072ACP is usually 5 days.
3.What payment methods are accepted for TLE2072ACP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLE2072ACP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLE2072ACP?
TLE2072ACP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLE2072ACP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLE2072ACP?
For technical support, including TLE2072ACP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLE2072ACP requirements.
6.How does Aetrix verify that TLE2072ACP is sourced from the original manufacturer or authorized distributors?
All TLE2072ACP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLE2072ACP meets industry standards.
7.What is the process for return or replacement of TLE2072ACP?
All TLE2072ACP units undergo pre-shipment inspection (PSI). If there is an issue with TLE2072ACP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLE2072ACP part is unused and in its original packaging.
Return procedure for TLE2072ACP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TLE2072ACP Tags

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LM358DT
STMicroelectronics

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LM358DR
Texas Instruments

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LM2904DR
Texas Instruments

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LM358ADR
Texas Instruments
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Texas Instruments
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MCP6006T-E/OT
Microchip Technology

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MCP6006UT-E/OT
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LM324PWR
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LM2902PWR
Texas Instruments
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LM2902DR
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LM358P
Texas Instruments
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