Texas Instruments TLE2072AID
- Part No.:
- TLE2072AID
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TLE2072AID.pdf
- Description:
- IC OPAMP JFET 2 CIRCUIT 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:160
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Product details
Overview
TLE2072AID from Texas Instruments is a dual-channel, JFET-input operational amplifier optimized for high-voltage, low-noise, high-speed precision applications. It delivers ±3.5 mV max input offset voltage at 25°C, 10.6 MHz unity-gain bandwidth, 32 V/μs slew rate, and 17 nV/√Hz input voltage noise at 1 kHz - enabling accurate signal conditioning in oscilloscopes, electricity meters, and flight control units.
For engineers reviewing the TLE2072AID datasheet, TLE2072AID pinout, TLE2072AID application, or TLE2072AID equivalent, this device supports rail-to-rail differential input operation up to ±19 V supply, offers low bias current (±15 pA), and maintains stability with capacitive loads - critical for high-fidelity data acquisition and portable test equipment design.
Technical Context
The TLE2072AID uses Excalibur JFET-input architecture with on-chip Zener trimming for enhanced DC precision. Its wide supply range (±2.25 V to ±19 V) enables direct interfacing with high-dynamic-range sensors and industrial analog front-ends without level-shifting circuitry.
It features unity-gain stability, 56° phase margin at 10 MHz, and operates across −40°C to +85°C. Input common-mode range extends to within 0.8 V of either rail, supporting single-supply configurations when biased appropriately.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channels | Dual - enables matched-pair signal processing in instrumentation and sensor interfaces |
| Supply Voltage Range | ±2.25 V to ±19 V - supports high-voltage transducer outputs and legacy industrial rails |
| Input Offset Voltage (max) | 3.5 mV at 25°C - ensures <0.1% gain error in 12-bit systems with 10 V full-scale |
| Unity-Gain Bandwidth | 10.6 MHz - allows stable closed-loop operation up to ~1 MHz with 10× gain |
| Slew Rate | 32 V/μs - supports 10 Vpp signals up to ~500 kHz without distortion |
| Input Voltage Noise | 17 nV/√Hz at 1 kHz - preserves SNR in low-level audio and sensor amplification |
| Input Bias Current | ±15 pA - minimizes voltage error across high-impedance sources (>100 MΩ) |
Pinout & Package
Package: SOIC-8 (D package), 4.9 mm × 6 mm body, surface-mount, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Inverting Input (Channel 1) | High-impedance node for feedback network connection; accepts rail-to-rail differential inputs |
| 2 | Non-inverting Input (Channel 1) | High-impedance node for reference or sensor input; CMVR extends to within 0.8 V of rails |
| 3 | Output (Channel 1) | Capable of ±20 mA drive; swings to within 1.5 V of rails at 20 mA load |
| 4 | V– (Negative Supply) | Reference for both channels; supports split or single-supply operation |
| 5 | Non-inverting Input (Channel 2) | Independent high-Z input for second signal path; matched specs to Channel 1 |
| 6 | Inverting Input (Channel 2) | Independent high-Z input; fully isolated from Channel 1 except shared supplies |
| 7 | Output (Channel 2) | Independent output stage; no crosstalk specified beyond typical PSRR/CMRR limits |
| 8 | V+ (Positive Supply) | Power rail for both amplifiers; thermal impedance θJA = 97.1°C/W |
Key Features
| Feature | Design Value |
|---|---|
| Low-noise JFET input | 17 nV/√Hz at 1 kHz enables sub-μV signal amplification without dominant noise contribution |
| Zener-trimmed offset | 3.5 mV max (I-grade) reduces calibration burden in metering and DMM front-ends |
| Rail-to-rail differential input | Accepts inputs up to V+ + 0.5 V and V– – 0.5 V - simplifies interface with high-voltage sensors |
| High slew rate & bandwidth | 32 V/μs and 10.6 MHz allow fast settling (<0.4 μs to 1 mV) for multiplexed data acquisition |
| Wide supply range | Operates from ±2.25 V to ±19 V - eliminates need for external charge pumps or regulators |
Applications
| Electricity Metering | Oscilloscope Front-End |
|---|---|
|
Use Scenario: Amplifying shunt-based current sensing and voltage divider outputs in Class 0.2 smart meters. IC Role / Device Role / Timing Role: Dual-channel precision gain stage with matched DC specs for simultaneous voltage/current channel conditioning. Use Value: 3.5 mV max VIO and 17 nV/√Hz noise ensure <0.05% measurement error over temperature and time. |
Use Scenario: Buffering and driving ADC inputs in 100-MHz-class digital oscilloscopes. IC Role / Device Role / Timing Role: High-speed, low-distortion signal conditioner with 32 V/μs slew rate and 10.6 MHz GBW. Use Value: Settles to 1 mV in 0.4 μs, preserving waveform fidelity for 10-ns edge capture. |
| Flight Control Unit | Digital Multimeter (DMM) |
|
Use Scenario: Signal conditioning for inertial sensor outputs (gyroscopes, accelerometers) in avionics subsystems. IC Role / Device Role / Timing Role: Low-bias-current, low-drift amplifier for high-impedance piezoresistive and capacitive sensor interfaces. Use Value: ±15 pA IIB prevents loading of >1 GΩ sensor elements; −40°C to +85°C rating meets DO-160 environmental requirements. |
Use Scenario: Input buffer and autoranging amplifier in handheld 6½-digit DMMs. IC Role / Device Role / Timing Role: Dual op-amp providing guard drive and differential input amplification in ohms/volts measurement paths. Use Value: Matched channel specs and 100 MΩ input resistance enable <10 ppm linearity in 10-V ranges. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual JFET-input op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TL072CDR | Higher VIO (10 mV max), higher noise (18 nV/√Hz), same SOIC-8 package | Limited to commercial temp range (0°C to 70°C); not rated for extended industrial use | Select when cost sensitivity outweighs precision and temperature range requirements |
| OPA2134PA | Lower noise (8 nV/√Hz), lower VIO (1 mV max), but narrower supply (±4.5 V to ±18 V) | Requires tighter supply regulation; lacks guaranteed operation below ±4.5 V | Prefer for ultra-low-noise audio or metrology where supply headroom permits |
Compared with TL072CDR and OPA2134PA, the TLE2072AID uniquely balances low offset (3.5 mV), low noise (17 nV/√Hz), wide supply (±2.25 V to ±19 V), and industrial temperature range (−40°C to +85°C) in a single SOIC-8 solution - making it optimal for embedded test and measurement systems requiring long-term stability without recalibration.
Availability
TLE2072AID is available at Aetrix Electronics and suitable for electricity metering, oscilloscope front-ends, and flight control units requiring stable component supply across extended temperature and voltage operating conditions.
Supply support for TLE2072AID includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of heritage in precision op-amps and industrial signal chains.
The TLE207x family was designed specifically for high-voltage, low-noise, high-speed precision analog applications - targeting test equipment, energy metering, and aerospace systems where DC accuracy and AC performance must coexist.
FAQ
What is the maximum supply voltage for the TLE2072AID?
The TLE2072AID supports a total supply voltage (V+ to V−) up to 38 V, corresponding to ±19 V operation. Absolute maximum ratings specify 0 V to 38 V across the supply pins, with recommended operation between ±2.25 V and ±19 V per the datasheet's Recommended Operating Conditions table. Exceeding ±19 V risks parametric degradation or reliability impact.
Does the TLE2072AID support rail-to-rail input operation?
The TLE2072AID supports rail-to-rail *differential* input voltage operation - meaning the voltage difference between its inverting and non-inverting inputs can span the full supply range (up to V+ − V−). However, its common-mode input voltage range is limited to (V−) − 0.5 V to (V+) + 0.5 V, so individual inputs cannot exceed those bounds. This enables robust interfacing with high-swing sensors while maintaining JFET-input integrity.
What is the input bias current specification for the TLE2072AID at 25°C?
The TLE2072AID has a typical input bias current of ±15 pA at 25°C, with a maximum of ±175 pA over the full −40°C to +85°C operating range. This ultra-low bias current is enabled by its JFET-input architecture and makes the device suitable for high-impedance source applications such as photodiode transimpedance stages or piezoelectric sensor buffers where leakage-induced errors must be minimized.
Is the TLE2072AID unity-gain stable?
Yes, the TLE2072AID is unity-gain stable, with a measured phase margin of 56° at 10.6 MHz under standard test conditions (VCC = ±15 V, RL = 2 kΩ, CL = 25 pF). The datasheet confirms stability in unity-gain follower and inverting configurations without requiring external compensation, enabling straightforward use in buffer and gain-of-one applications across its full operating range.
How does the TLE2072AID differ from the standard TLE2072ID?
The TLE2072AID is the "A" grade variant of the TLE2072 family, featuring tighter input offset voltage specifications: 3.5 mV max (vs. 6 mV max for TLE2072ID) at 25°C, and improved temperature coefficient (3.2 µV/°C typical). Both share identical SOIC-8 packaging, pinout, and operating temperature range (−40°C to +85°C), but the "A" suffix denotes enhanced DC precision for applications demanding higher initial accuracy and long-term stability.
TLE2072AID Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Amplifier Type:
- J-FET
- Number of Circuits:
- 2
- Output Type:
- -
- Slew Rate:
- 45V/µs
- Gain Bandwidth Product:
- 10 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 20 pA
- Voltage - Input Offset:
- 700 µV
- Current - Supply:
- 3.1mA (x2 Channels)
- Current - Output / Channel:
- 48 mA
- Voltage - Supply Span (Min):
- 4.5 V
- Voltage - Supply Span (Max):
- 38 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
TLE2072AID FAQ
1.How can I place an order for TLE2072AID through Aetrix?
Please submit a Request for Quotation (RFQ) for TLE2072AID on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLE2072AID reliable?
The price and inventory of TLE2072AID are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLE2072AID is usually 5 days.
3.What payment methods are accepted for TLE2072AID?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLE2072AID transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLE2072AID?
TLE2072AID orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLE2072AID order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLE2072AID?
For technical support, including TLE2072AID datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLE2072AID requirements.
6.How does Aetrix verify that TLE2072AID is sourced from the original manufacturer or authorized distributors?
All TLE2072AID products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLE2072AID meets industry standards.
7.What is the process for return or replacement of TLE2072AID?
All TLE2072AID units undergo pre-shipment inspection (PSI). If there is an issue with TLE2072AID, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLE2072AID part is unused and in its original packaging.
Return procedure for TLE2072AID:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TLE2072AID Tags

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