My Inquiry
My Account
Toshiba Semiconductor and Storage TLP3823(TP5,F
- Part No.:
- TLP3823(TP5,F
- Manufacturer:
- Toshiba Semiconductor and Storage
- Category:
- Solid State Relays (SSR)
- Package:
- 8-SMD, Gull Wing
- Datasheet:
-
TLP3823(TP5,F.pdf
- Description:
- SSR RELAY SPST-NO 3A 0-100V
- Quantity:
- Payment:
- Shipping:
Inventory:1,500
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TLP3823(TP5,F) from Toshiba Electronic Devices & Storage Corporation is a normally-open photorelay IC comprising an infrared LED optically coupled to a photo-MOSFET output stage in an 8-pin DIP through-hole package. It delivers 3 A maximum ON-state current, 150 mΩ max ON-resistance, and 100 V min OFF-state voltage - enabling direct replacement of mechanical relays in AC/DC power line switching for industrial control systems.
For engineers reviewing the TLP3823(TP5,F) datasheet, TLP3823(TP5,F) pinout, TLP3823(TP5,F) application, or TLP3823(TP5,F) equivalent, key selection criteria include isolation voltage (2500 Vrms), trigger LED current (≤5.0 mA), turn-on/off timing (1.5 ms / 0.1 ms typ.), and A-connection configuration suitability for high-current DC load switching.
Technical Context
The TLP3823(TP5,F) implements a single-pole, single-throw (1-Form-A), normally-open solid-state relay architecture using gallium arsenide (GaAs) LED input and dual-source/drain photo-MOSFET output. Its internal structure isolates input and output via optical coupling with 0.4 mm minimum internal isolation thickness.
It supports three output connection modes (A/B/C); the TLP3823(TP5,F) variant is specified for A-connection use - where pins 5/8 are drains and 6/7 are sources - delivering 3 A continuous current at ≤150 mΩ RON, with thermal derating starting at 25 °C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Configuration | A-connection: dual drain (pins 5,8) and dual source (pins 6,7) for parallel conduction path |
| Max ON-State Current | 3 A continuous - supports direct switching of solenoids, heaters, and PLC output stages without external heatsinking below 50 °C ambient |
| Max ON-Resistance | 150 mΩ - limits I²R power loss to ≤1.35 W at 3 A, enabling low-temperature rise in compact layouts |
| Min OFF-State Voltage | 100 V - suitable for 24–48 V DC control bus isolation and 100 V peak AC line switching with safety margin |
| Trigger LED Current | ≤5.0 mA - compatible with standard microcontroller GPIOs (3.3 V/5 V) using 330–470 Ω series resistors |
| Isolation Voltage | 2500 Vrms - meets UL 1577 and CSA Component Acceptance for reinforced insulation in industrial equipment |
| Turn-On/Off Time | 1.5 ms / 0.1 ms typical - enables precise timing control in test equipment and programmable logic sequencers |
Pinout & Package
Package: 8-pin DIP (dual in-line package), through-hole mounting, pitch 7.62 mm (TLP3823 series), JEDEC MS-001AC compliant. Weight: 0.53 g (typ.). RoHS-compliant, lead-free finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | No Connect | Internally unconnected; must remain floating or grounded per layout best practice to avoid EMI coupling |
| 2 | LED Anode | Positive input for infrared LED; requires current-limiting resistor referenced to logic-level supply |
| 3 | LED Cathode | Ground return for LED drive circuit; ties to system GND or controller ground plane |
| 4 | No Connect | Internally unconnected; no routing or soldering required |
| 5 | MOSFET Drain | High-side output terminal for A-connection; connects to load's positive rail or AC line phase |
| 6 | MOSFET Source | Low-side output terminal for A-connection; returns to load ground or neutral; paralleled with pin 7 |
| 7 | MOSFET Source | Redundant source terminal - internally bonded to pin 6 to halve current density and reduce RON |
| 8 | MOSFET Drain | Second high-side terminal - internally bonded to pin 5 to support 3 A total current with balanced thermal distribution |
Key Features
| Feature | Design Value |
|---|---|
| Normally-open (1-Form-A) operation | Zero leakage current in OFF state ensures fail-safe de-energization of critical loads like emergency stop circuits |
| 2500 Vrms isolation rating | Enables safe separation between microcontroller logic domains and 100 V-class power circuits without additional barrier components |
| Low 5.0 mA max trigger current | Eliminates need for driver transistors - reduces BOM count and PCB area in space-constrained PLC I/O modules |
| Dual-source/dual-drain A-connection | Shares 3 A load current across two parallel MOSFET channels, lowering thermal resistance by ~30% vs. single-channel equivalents |
| UL- and cUL-recognized | Satisfies mandatory safety certification requirements for factory automation and security system deployments in North America |
Applications
| Factory Automation I/O Modules | Programmable Logic Controllers (PLCs) |
|---|---|
|
Use Scenario: Isolated digital output stage driving 24 V DC solenoid valves and indicator lamps in modular I/O racks. IC Role / Device Role / Timing Role: Solid-state replacement for electromechanical relays, providing zero-contact bounce, 1.5 ms response, and >10⁹ cycle lifetime. Use Value: Eliminates maintenance downtime from contact wear and extends mean time between failures (MTBF) beyond 100,000 hours under rated load. |
Use Scenario: Output card switching 48 V DC motor starters and safety interlock circuits in DIN-rail mounted PLC chassis. IC Role / Device Role / Timing Role: High-reliability load switch with reinforced isolation, supporting SIL-2 functional safety architectures via external diagnostics. Use Value: Achieves <1 µA OFF-state leakage and 100 V blocking capability - meeting IEC 61800-5-2 requirements for drive enable/disable paths. |
| Security System Control Panels | Automatic Test Equipment (ATE) |
|
Use Scenario: Zone monitoring outputs activating door locks, alarm sirens, and access control relays in Class 2 low-voltage fire alarm panels. IC Role / Device Role / Timing Role: Fail-safe isolated switch ensuring no false triggering during ESD events or power surges on field wiring. Use Value: 2500 Vrms isolation and 8.0 mm creepage/clearance (TLP3823F variant) meet UL 60950-1 Annex G for fire alarm system separations. |
Use Scenario: Precision load switching in semiconductor parametric testers, applying bias voltages to DUTs while maintaining signal integrity. IC Role / Device Role / Timing Role: Low-capacitance (<0.8 pF) isolated switch minimizing transient injection into sensitive analog measurement paths. Use Value: 720 pF output capacitance and <1 µA OFF-state current prevent charge injection errors during nanosecond-scale settling windows. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar photorelay applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PVG612A | Higher 4 A rating but 200 mΩ RON; 4000 Vrms isolation; SOIC-8 surface-mount package | Better suited for higher-current, space-constrained designs requiring reflow assembly - not pin-compatible with DIP-8 | Select PVG612A only when upgrading current capacity and accepting SMT layout changes; not drop-in for TLP3823(TP5,F). |
| APV1121S | Lower 1.5 A rating, 350 mΩ RON, same 2500 Vrms isolation; DIP-6 package with different pinout | Targeted at cost-sensitive, lower-power instrumentation - lacks dual-source/drain architecture and A-connection optimization | Choose APV1121S only for sub-2 A loads where board real estate allows DIP-6 footprint and thermal design accommodates higher RON. |
Compared with PVG612A and APV1121S, the TLP3823(TP5,F) uniquely balances 3 A current handling, 150 mΩ low RON, and through-hole DIP-8 compatibility - making it optimal for legacy industrial control upgrades where PCB layout reuse and mechanical relay replacement are primary constraints.
Availability
TLP3823(TP5,F) is available at Aetrix Electronics and suitable for factory automation, programmable logic controllers, and security system control panels requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for TLP3823(TP5,F) includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Toshiba Electronic Devices & Storage Corporation designs high-reliability semiconductor components for industrial, automotive, and consumer applications, with emphasis on isolation, power efficiency, and safety compliance.
The TLP3823 series belongs to Toshiba's photorelay product line, engineered specifically for mechanical relay replacement in industrial control systems - prioritizing low RON, high isolation, and long operational life under continuous DC switching duty.
FAQ
What is the maximum continuous load current supported by the TLP3823(TP5,F)?
The TLP3823(TP5,F) supports up to 3 A continuous ON-state current in A-connection configuration at 25 °C ambient. Derating applies linearly at –30 mA/°C above 25 °C, limiting usable current to approximately 2.1 A at 85 °C. This rating is validated for pins 5/8 (drains) and 6/7 (sources) operated in parallel, as defined in Toshiba's recommended operating conditions and absolute maximum ratings tables for the TLP3823(TP5,F).
Does the TLP3823(TP5,F) require an external current-limiting resistor for the LED input?
Yes, the TLP3823(TP5,F) requires an external series resistor to limit LED forward current to ≤5.0 mA (max trigger) and ≤30 mA (absolute max). For a 5 V logic supply, a 680 Ω resistor sets IF ≈ 4.4 mA; for 3.3 V, a 470 Ω resistor yields IF ≈ 4.5 mA. The resistor value must be selected based on actual VF (1.5–1.8 V typ.) and system supply tolerance to ensure reliable turn-on without exceeding absolute ratings.
Can the TLP3823(TP5,F) switch AC loads directly?
The TLP3823(TP5,F) is rated for 100 V minimum OFF-state output voltage and supports both AC and DC loads, but only in configurations where the peak AC voltage remains ≤100 V (e.g., 70 V RMS sine wave). It is not rated for 120/240 V AC mains switching. For such applications, a back-to-back MOSFET configuration or external snubber network is required - neither of which is integrated into the TLP3823(TP5,F) device itself.
What is the isolation structure used in the TLP3823(TP5,F)?
The TLP3823(TP5,F) uses optical isolation: an infrared GaAs LED input stage coupled to a photo-MOSFET output stage via molded resin with ≥0.4 mm internal isolation thickness. This achieves 2500 Vrms withstand voltage per UL 1577 and CSA standards, with ≥7.0 mm creepage and clearance distances on the TLP3823 variant (7.62 mm pitch), verified per Toshiba's isolation characteristics testing protocol.
Is the TLP3823(TP5,F) compatible with lead-free reflow soldering processes?
No - the TLP3823(TP5,F) is a through-hole device intended for wave soldering or hand soldering. Its packaging (TP5 taping option) and 7.62 mm DIP footprint are incompatible with reflow. Per Toshiba's soldering guidelines, flow soldering at 260 °C for ≤10 seconds or iron soldering at ≤260 °C for ≤10 seconds is permitted. Reflow profiles are specified only for surface-mount variants like TLP3823F(LF4,TP4).
TLP3823(TP5,F Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Toshiba Semiconductor and Storage
- Series:
- TLP3823
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Mounting Type:
- Surface Mount
- Circuit:
- SPST-NO (1 Form A)
- Output Type:
- AC, DC
- Voltage - Input:
- 1.64VDC
- Voltage - Load:
- 0 V ~ 100 V
- Load Current:
- 3 A
- On-State Resistance (Max):
- 150 mOhms
- Termination Style:
- Gull Wing
- Operating Temperature:
- -40°C ~ 110°C
- Supplier Device Package:
- 8-SMD
- Approval Agency:
- cUL, UL
- Grade:
- -
- Qualification:
- -
TLP3823(TP5,F FAQ
1.How can I place an order for TLP3823(TP5,F through Aetrix?
Please submit a Request for Quotation (RFQ) for TLP3823(TP5,F on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLP3823(TP5,F reliable?
The price and inventory of TLP3823(TP5,F are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLP3823(TP5,F is usually 5 days.
3.What payment methods are accepted for TLP3823(TP5,F?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLP3823(TP5,F transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLP3823(TP5,F?
TLP3823(TP5,F orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLP3823(TP5,F order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLP3823(TP5,F?
For technical support, including TLP3823(TP5,F datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLP3823(TP5,F requirements.
6.How does Aetrix verify that TLP3823(TP5,F is sourced from the original manufacturer or authorized distributors?
All TLP3823(TP5,F products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLP3823(TP5,F meets industry standards.
7.What is the process for return or replacement of TLP3823(TP5,F?
All TLP3823(TP5,F units undergo pre-shipment inspection (PSI). If there is an issue with TLP3823(TP5,F, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLP3823(TP5,F part is unused and in its original packaging.
Return procedure for TLP3823(TP5,F:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TLP3823(TP5,F Tags
.jpg)
-
G3VM-21UR11(TR05)
Omron Electronics Inc-EMC Div
-
G3VM-61VY3(TR05)
Omron Electronics Inc-EMC Div
-
CPC1017NTR
Littelfuse Inc.
-
CPC1017N
Littelfuse Inc.
-
CPC1006N
Littelfuse Inc.
-
VO1400AEFTR
Vishay Semiconductor Opto Division
-
CPC1006NTR
Littelfuse Inc.
-
TLP175A(TPL,E
Toshiba Semiconductor and Storage
-
CPC1002NTR
Littelfuse Inc.
-
AQY280S
Panasonic Electric Works
-
CPC1117NTR
Littelfuse Inc.
-
CPC1106NTR
Littelfuse Inc.
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
