Toshiba Semiconductor and Storage TLP5751(D4-TP,E
- Part No.:
- TLP5751(D4-TP,E
- Manufacturer:
- Toshiba Semiconductor and Storage
- Category:
- Isolators - Gate Drivers
- Package:
- 6-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
TLP5751(D4-TP,E.pdf
- Description:
- OPTOISO 5KV 1CH GATE DVR 6SO
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TLP5751(D4-TP,E from Toshiba Electronic Devices & Storage Corporation is a reinforced-insulation photocoupler with integrated high-speed photodetector and totem-pole output stage, designed for gate driving IGBTs and MOSFETs in high-noise industrial inverters. It delivers ±1.0 A peak output current, 150 ns max propagation delay, ±35 kV/µs common-mode transient immunity, and operates across -40°C to +110°C in 6-pin SO6L package.
For engineers reviewing the TLP5751(D4-TP,E datasheet, TLP5751(D4-TP,E pinout, TLP5751(D4-TP,E application, or TLP5751(D4-TP,E equivalent, this device is selected for high-reliability isolated gate drive where rail-to-rail output, UVLO protection, and VDE-compliant reinforced insulation (EN IEC 60747-5-5) are required in induction cooktops, air conditioner inverters, and industrial motor drives.
Technical Context
The TLP5751(D4-TP,E integrates an infrared LED input stage with a monolithic photo IC detector featuring internal Faraday shielding and a totem-pole buffer output. Its logic-level truth table enables direct interface with microcontroller GPIOs without external level-shifting.
It implements under-voltage lockout (UVLO) with 12.1 V turn-on and 11.1 V turn-off thresholds, supports 15–30 V supply range, and requires a mandatory 1 µF ceramic bypass capacitor between VCC (Pin 6) and GND (Pin 4) placed within 1 cm of the pins to stabilize high-gain amplifier operation and ensure reliable switching.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Voltage | 5000 Vrms min - meets reinforced insulation requirements per UL 1577, VDE EN IEC 60747-5-5, and CQC GB4943.1 |
| Output Peak Current | ±1.0 A max - drives high-gate-charge IGBTs/MOSFETs directly without external buffers |
| Propagation Delay | 150 ns max - enables >50 kHz switching in inverter applications with tight timing control |
| CMTI | ±35 kV/µs min - suppresses false triggering in high-dV/dt motor drive environments |
| Supply Voltage Range | 15–30 V - compatible with standard industrial gate driver supply rails |
| Operating Temperature | -40°C to +110°C - qualified for under-hood and enclosed inverter module use |
| Threshold Input Current | 4 mA max - ensures low-power MCU compatibility with margin for aging and temperature drift |
Pinout & Package
Package: 6-pin SO6L (Toshiba package code 11-4N1A), surface-mount, creepage/clearance ≥8.0 mm, isolation thickness ≥0.4 mm, height ≤2.3 mm, weight 0.126 g (typ.).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: Anode | LED input anode | Connects to MCU GPIO or driver through current-limiting resistor; forward voltage 1.45–1.70 V @10 mA |
| 2: N.C. | No connection | Internally unconnected; must remain floating - no PCB trace or solder mask bridge |
| 3: Cathode | LED input cathode | Return path for LED current; reverse voltage rating 5 V max |
| 4: GND | Detector ground reference | Reference for output stage and UVLO circuit; requires 1 µF bypass capacitor to Pin 6 |
| 5: VO (Output) | Buffered output terminal | Rail-to-rail totem-pole output; sinks or sources up to ±1.0 A; logic-high = VCC – 0.2 V typ. |
| 6: VCC | Detector supply input | Power input for photodetector and output stage; UVLO active below 12.1 V; must be decoupled to Pin 4 |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail totem-pole output | Enables full-swing gate drive without external pull-up/pull-down resistors, reducing component count and layout area |
| Integrated Faraday shield | Guarantees ±35 kV/µs CMTI performance - critical for noise immunity in 600–1200 V inverter half-bridges |
| Under-voltage lockout (UVLO) | Prevents partial turn-on of power devices by disabling output when VCC drops below 11.1 V (hysteresis 1.0 V) |
| Reinforced insulation certification | VDE EN IEC 60747-5-5 compliance (Option D4) verified - eliminates need for external isolation barriers in safety-critical designs |
| Compact SO6L footprint | 50 % smaller than legacy 8-pin DIP - saves PCB space in densely packed inverter control boards |
Applications
| Induction Cooktop Control | Air Conditioner Inverter |
|---|---|
Use Scenario: Isolated gate drive for IGBT half-bridge in resonant inverter powering induction heating coil. IC Role / Device Role / Timing Role: High-speed signal isolator with rail-to-rail output directly driving IGBT gates at 20–50 kHz switching frequency. Use Value: ±35 kV/µs CMTI prevents false triggering during rapid dV/dt transients across IGBT collector-emitter; 150 ns delay ensures precise dead-time control. | Use Scenario: Gate driving SiC MOSFETs in variable-speed compressor inverter modules operating at elevated ambient temperatures. IC Role / Device Role / Timing Role: Reinforced-isolation gate driver enabling safe MCU-to-power-stage interface in compact, sealed outdoor units. Use Value: -40°C to +110°C rating and VDE-certified reinforced insulation allow deployment in thermally constrained outdoor condenser enclosures without derating. |
| Industrial Motor Drive | MOSFET-Based UPS |
Use Scenario: Driving high-side and low-side N-channel MOSFETs in three-phase inverter stacks for servo and pump drives. IC Role / Device Role / Timing Role: Logic-compatible photocoupler providing galvanic isolation and fast edge response for PWM gate signals. Use Value: 4 mA max threshold current ensures compatibility with 3.3 V/5 V MCUs; ±1.0 A output current supports gate charge requirements of 100 nC+ MOSFETs. | Use Scenario: Isolating gate control signals between DSP controller and power stage in online double-conversion UPS systems. IC Role / Device Role / Timing Role: Safety-certified signal isolator meeting reinforced insulation requirements for Class I equipment per EN 62368-1. Use Value: 5000 Vrms isolation voltage and EN IEC 60747-5-5 (D4 option) compliance satisfy regulatory testing for medical-grade and telecom UPS applications. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar gate driver photocoupler applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ACPL-332J-000E | SO-6 package, ±2.5 A output, 100 ns max propagation delay, 3750 Vrms isolation, no integrated Faraday shield | Lacks VDE-reinforced insulation certification; requires external CMTI enhancement for high-noise inverters | Select when higher peak current and faster switching are prioritized over regulatory certification and CMTI robustness |
| SI8271BD-D-IS | Si-based digital isolator, 4 A output, 200 ns propagation delay, 5000 Vrms isolation, integrated DC-DC converter | No LED aging concerns but requires external power supply filtering; not a photocoupler architecture | Select when long-term LED degradation stability is not required and system-level BOM simplification via integrated isolated supply is preferred |
Compared with ACPL-332J-000E and SI8271BD-D-IS, the TLP5751(D4-TP,E provides certified reinforced insulation and guaranteed ±35 kV/µs CMTI in a proven photocoupler architecture - making it optimal for safety-critical, high-noise industrial inverters where regulatory approval and field reliability are non-negotiable.
Availability
TLP5751(D4-TP,E is available at Aetrix Electronics and suitable for induction cooktops, air conditioner inverters, and industrial motor drives requiring stable component supply, long-lifecycle support, and VDE-compliant reinforced insulation.
Supply support for TLP5751(D4-TP,E includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Toshiba Electronic Devices & Storage Corporation designs and manufactures discrete semiconductors, power devices, and optoelectronics for industrial, automotive, and consumer applications.
The TLP5751 series belongs to Toshiba's high-reliability photocoupler product line, engineered specifically for isolated gate driving in high-voltage, high-noise inverter systems where safety certification, CMTI robustness, and thermal stability are essential.
FAQ
What is the purpose of the 1 µF capacitor required for TLP5751(D4-TP,E?
The 1 µF ceramic capacitor between Pin 6 (VCC) and Pin 4 (GND) stabilizes the internal high-gain linear amplifier in the TLP5751(D4-TP,E photodetector. Without it, the device may exhibit oscillation or improper switching due to supply rail instability. Toshiba specifies placement within 1 cm of the pins to minimize inductance and ensure effective high-frequency decoupling across the -40°C to +110°C operating range.
Does TLP5751(D4-TP,E support both high-side and low-side gate driving?
Yes, the TLP5751(D4-TP,E supports both configurations via its rail-to-rail totem-pole output. When used for high-side driving, it interfaces with bootstrap or isolated DC-DC supplies; for low-side, it connects directly to ground-referenced gate circuits. Its ±1.0 A peak output current and logic-compatible input threshold (≤4 mA) enable flexible integration into half-bridge and three-phase inverter topologies without additional buffering.
What safety certifications apply to TLP5751(D4-TP,E specifically?
The "D4" suffix in TLP5751(D4-TP,E explicitly denotes qualification to EN IEC 60747-5-5 for reinforced insulation. It also carries UL 1577 recognition (File E67349), cUL CSA Component Acceptance (File E67349), and CQC GB4943.1 approval for Japan and Thailand factories - all verified for the exact TLP5751(D4-TP,E ordering variant, not just the base TLP5751 family.
How does the UVLO function in TLP5751(D4-TP,E protect power devices?
The TLP5751(D4-TP,E incorporates an internal under-voltage lockout that disables the output stage when VCC falls below 11.1 V (turn-off) and re-enables it above 12.1 V (turn-on), providing 1.0 V hysteresis. This prevents partial turn-on of IGBTs or MOSFETs during brownout conditions - eliminating shoot-through risk and ensuring clean, full-enhancement gate drive only when supply integrity is confirmed.
Can TLP5751(D4-TP,E replace older 8-pin DIP photocouplers without PCB redesign?
No - the TLP5751(D4-TP,E uses a 6-pin SO6L package (Toshiba 11-4N1A), which has different pin pitch, footprint, and land pattern than legacy 8-pin DIP packages. While it offers 50 % smaller mounting area, direct replacement requires PCB layout revision. Refer to Toshiba's Fig. 15.1 for exact land pattern dimensions and soldering profile requirements for reflow compatibility.
TLP5751(D4-TP,E Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Toshiba Semiconductor and Storage
- Series:
- -
- Package/Case:
- 6-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Optical Coupling
- Number of Channels:
- 1
- Voltage - Isolation:
- 5000Vrms
- Common Mode Transient Immunity (Min):
- 35kV/µs
- Propagation Delay tpLH / tpHL (Max):
- 150ns, 150ns
- Pulse Width Distortion (Max):
- 50ns
- Rise / Fall Time (Typ):
- 15ns, 8ns
- Current - Output High, Low:
- 1A, 1A
- Current - Peak Output:
- 1A
- Voltage - Forward (Vf) (Typ):
- 1.55V
- Current - DC Forward (If) (Max):
- 20 mA
- Voltage - Output Supply:
- 15V ~ 30V
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -40°C ~ 110°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-SO
- Approval Agency:
- CQC, CSA, cUL, UL, VDE
TLP5751(D4-TP,E FAQ
1.How can I place an order for TLP5751(D4-TP,E through Aetrix?
Please submit a Request for Quotation (RFQ) for TLP5751(D4-TP,E on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLP5751(D4-TP,E reliable?
The price and inventory of TLP5751(D4-TP,E are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLP5751(D4-TP,E is usually 5 days.
3.What payment methods are accepted for TLP5751(D4-TP,E?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLP5751(D4-TP,E transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLP5751(D4-TP,E?
TLP5751(D4-TP,E orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLP5751(D4-TP,E order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLP5751(D4-TP,E?
For technical support, including TLP5751(D4-TP,E datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLP5751(D4-TP,E requirements.
6.How does Aetrix verify that TLP5751(D4-TP,E is sourced from the original manufacturer or authorized distributors?
All TLP5751(D4-TP,E products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLP5751(D4-TP,E meets industry standards.
7.What is the process for return or replacement of TLP5751(D4-TP,E?
All TLP5751(D4-TP,E units undergo pre-shipment inspection (PSI). If there is an issue with TLP5751(D4-TP,E, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLP5751(D4-TP,E part is unused and in its original packaging.
Return procedure for TLP5751(D4-TP,E:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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